Sean X. LIN

Person

Watervliet, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device having a self-forming barrier layer at via bottom
- Patent number RE49820
- Issue date Jan 30, 2024
- GLOBALFOUNDRIES U.S. INC.
- Larry Zhao
Information Patent Grant
Controlling back-end-of-line dimensions of semiconductor devices
- Patent number 10,727,120
- Issue date Jul 28, 2020
- GLOBALFOUNDRIES Inc.
- Sean X Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects formed by a metal displacement reaction
- Patent number 10,580,696
- Issue date Mar 3, 2020
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal interconnects for super (skip) via integration
- Patent number 10,573,593
- Issue date Feb 25, 2020
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a self-forming barrier layer at via bottom
- Patent number RE47630
- Issue date Oct 1, 2019
- GLOBALFOUNDRIES Inc.
- Larry Zhao
Information Patent Grant
Multiple patterning with mandrel cuts formed using a block mask
- Patent number 10,395,926
- Issue date Aug 27, 2019
- GLOBALFOUNDRIES Inc.
- Minghao Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects formed by a metal replacement process
- Patent number 10,283,372
- Issue date May 7, 2019
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Liner recess for fully aligned via
- Patent number 10,181,421
- Issue date Jan 15, 2019
- GLOBALFOUNDRIES Inc.
- Errol Todd Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization levels and methods of making thereof
- Patent number 10,134,580
- Issue date Nov 20, 2018
- GLOBALFOUNDRIES Inc.
- Nicholas V. LiCausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cobalt interconnects formed by selective bottom-up fill
- Patent number 10,109,490
- Issue date Oct 23, 2018
- GLOBALFOUNDRIES Inc.
- Sean X. Lin
- C22 - METALLURGY FERROUS OR NON-FERROUS ALLOYS TREATMENT OF ALLOYS OR NON-FER...
Information Patent Grant
Metal interconnects for super (skip) via integration
- Patent number 10,026,687
- Issue date Jul 17, 2018
- GLOBALFOUNDRIES Inc.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a gate contact structure for a semiconductor device
- Patent number 9,853,110
- Issue date Dec 26, 2017
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solution based etching of titanium carbide and titanium nitride str...
- Patent number 9,831,100
- Issue date Nov 28, 2017
- Intermolecular, Inc.
- John Foster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Skip via structures
- Patent number 9,805,972
- Issue date Oct 31, 2017
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits and methods for fabricating integrated circuits...
- Patent number 9,520,321
- Issue date Dec 13, 2016
- GLOBALFOUNDRIES, INC.
- Errol Todd Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of using a metal protection layer to form replacement gate...
- Patent number 9,425,103
- Issue date Aug 23, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper based nitride liner passivation layers for conductive copper...
- Patent number 9,318,436
- Issue date Apr 19, 2016
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having magnetic tunnel junctions (MTJ) and meth...
- Patent number 9,299,745
- Issue date Mar 29, 2016
- GLOBALFOUNDRIES, INC.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Minimizing void formation in semiconductor vias and trenches
- Patent number 9,263,327
- Issue date Feb 16, 2016
- Globalfoundries Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electroless fill of trench in semiconductor structure
- Patent number 9,087,881
- Issue date Jul 21, 2015
- GLOBALFOUNDRIES Inc.
- Sean X. Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for integration of pore stuffing material
- Patent number 9,054,052
- Issue date Jun 9, 2015
- Global Foundries Inc.
- Nicholas Vincent Licausi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of self-forming barrier integration with pore stuffed ULK m...
- Patent number 8,932,934
- Issue date Jan 13, 2015
- Global Foundries Inc.
- Moosung M. Chae
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a self-forming barrier layer at via bottom
- Patent number 8,907,483
- Issue date Dec 9, 2014
- GLOBALFOUNDRIES Inc.
- Larry Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming copper-based nitride liner/passivation layers fo...
- Patent number 8,859,419
- Issue date Oct 14, 2014
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits having low resistance m...
- Patent number 8,778,789
- Issue date Jul 15, 2014
- GLOBALFOUNDRIES, INC.
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming conductive copper-based structures using a coppe...
- Patent number 8,753,975
- Issue date Jun 17, 2014
- GLOBALFOUNDRIES Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits having low resistance d...
- Patent number 8,691,689
- Issue date Apr 8, 2014
- GLOBALFOUNDRIES Inc.
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming copper-based conductive structures by forming a...
- Patent number 8,673,766
- Issue date Mar 18, 2014
- GLOBALFOUNDRIES Inc.
- Sean X. Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming copper-based conductive structures on an integra...
- Patent number 8,517,769
- Issue date Aug 27, 2013
- GLOBALFOUNDRIES Inc.
- Sean X. Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTERCONNECTS FORMED BY A METAL DISPLACEMENT REACTION
- Publication number 20200066585
- Publication date Feb 27, 2020
- GLOBALFOUNDRIES INC.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLING BACK-END-OF-LINE DIMENSIONS OF SEMICONDUCTOR DEVICES
- Publication number 20200066586
- Publication date Feb 27, 2020
- GLOBALFOUNDRIES INC.
- SEAN X LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FORMED BY A METAL REPLACEMENT PROCESS
- Publication number 20190088500
- Publication date Mar 21, 2019
- GLOBALFOUNDRIES INC.
- Sean Xuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LINER RECESS FOR FULLY ALIGNED VIA
- Publication number 20190019726
- Publication date Jan 17, 2019
- GLOBALFOUNDRIES INC.
- Errol Todd RYAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MIDDLE-OF-LINE LOCAL INTERCONNECT STRUCTURES WITH HYBRID FEATURES
- Publication number 20180308752
- Publication date Oct 25, 2018
- GLOBALFOUNDRIES INC.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL INTERCONNECTS FOR SUPER (SKIP) VIA INTEGRATION
- Publication number 20180269150
- Publication date Sep 20, 2018
- GLOBALFOUNDRIES INC.
- Sean Xuan LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AMORPHOUS METAL INTERCONNECTIONS BY SUBTRACTIVE ETCH
- Publication number 20170154816
- Publication date Jun 1, 2017
- GLOBALFOUNDRIES INC.
- Sean X. LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A GATE CONTACT STRUCTURE FOR A SEMICONDUCTOR DEVICE
- Publication number 20170125530
- Publication date May 4, 2017
- GLOBALFOUNDRIES INC.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS...
- Publication number 20160254185
- Publication date Sep 1, 2016
- GLOBALFOUNDRIES, Inc.
- Errol Todd Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Particle removal with minimal etching of silicon-germanium
- Publication number 20160181087
- Publication date Jun 23, 2016
- INTERMOLECULAR INC.
- John Foster
- B08 - CLEANING
Information Patent Application
METHODS OF FORMING REPLACEMENT GATE STRUCTURES FOR SEMICONDUCTOR DE...
- Publication number 20160163601
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solution Based Etching of Titanium Carbide and Titanium Nitride Str...
- Publication number 20150371872
- Publication date Dec 24, 2015
- INTERMOLECULAR INC.
- John Foster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MINIMIZING VOID FORMATION IN SEMICONDUCTOR VIAS AND TRENCHES
- Publication number 20150371899
- Publication date Dec 24, 2015
- GLOBALFOUNDRIES INC.
- Xunyuan ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING MAGNETIC TUNNEL JUNCTIONS (MTJ) AND METH...
- Publication number 20150325622
- Publication date Nov 12, 2015
- GLOBALFOUNDRIES, Inc.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FO...
- Publication number 20140361435
- Publication date Dec 11, 2014
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF SEMICONDUCTOR CONTAMINANT REMOVAL USING SUPERCRITICAL FLUID
- Publication number 20140353805
- Publication date Dec 4, 2014
- GLOBALFOUNDRIES INC.
- Errol Todd RYAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR INTEGRATION OF PORE STUFFING MATERIAL
- Publication number 20140353802
- Publication date Dec 4, 2014
- GLOBALFOUNDRIES INC.
- Nicholas Vincent LICAUSI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF SELF-FORMING BARRIER INTEGRATION WITH PORE STUFFED ULK M...
- Publication number 20140353835
- Publication date Dec 4, 2014
- Moosung M. CHAE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROLESS FILL OF TRENCH IN SEMICONDUCTOR STRUCTURE
- Publication number 20140252616
- Publication date Sep 11, 2014
- Sean X. Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FO...
- Publication number 20140217588
- Publication date Aug 7, 2014
- GLOBALFOUNDRIES INC.
- Xunyuan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING LOW RESISTANCE M...
- Publication number 20140154877
- Publication date Jun 5, 2014
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A SELF-FORMING BARRIER LAYER AT VIA BOTTOM
- Publication number 20140097538
- Publication date Apr 10, 2014
- GLOBALFOUNDRIES Inc.
- Larry Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES BY FORMING A...
- Publication number 20130309863
- Publication date Nov 21, 2013
- Sean X. Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON AN INTEGRA...
- Publication number 20130244421
- Publication date Sep 19, 2013
- GLOBALFOUNDRIES INC.
- Sean X. LIN
- H01 - BASIC ELECTRIC ELEMENTS

Sean X. LIN

Person

Patents Grantslast 30 patents

Semiconductor device having a self-forming barrier layer at via bottom

Controlling back-end-of-line dimensions of semiconductor devices

Interconnects formed by a metal displacement reaction

Metal interconnects for super (skip) via integration

Semiconductor device having a self-forming barrier layer at via bottom

Multiple patterning with mandrel cuts formed using a block mask

Interconnects formed by a metal replacement process

Liner recess for fully aligned via

Metallization levels and methods of making thereof

Cobalt interconnects formed by selective bottom-up fill

Metal interconnects for super (skip) via integration

Method of forming a gate contact structure for a semiconductor device

Solution based etching of titanium carbide and titanium nitride str...

Skip via structures

Integrated circuits and methods for fabricating integrated circuits...

Methods of using a metal protection layer to form replacement gate...

Copper based nitride liner passivation layers for conductive copper...

Integrated circuits having magnetic tunnel junctions (MTJ) and meth...

Minimizing void formation in semiconductor vias and trenches

Electroless fill of trench in semiconductor structure

Methods for integration of pore stuffing material

Methods of self-forming barrier integration with pore stuffed ULK m...

Semiconductor device having a self-forming barrier layer at via bottom

Methods of forming copper-based nitride liner/passivation layers fo...

Methods for fabricating integrated circuits having low resistance m...

Methods of forming conductive copper-based structures using a coppe...

Methods for fabricating integrated circuits having low resistance d...

Methods of forming copper-based conductive structures by forming a...

Methods of forming copper-based conductive structures on an integra...

Patents Applicationslast 30 patents

INTERCONNECTS FORMED BY A METAL DISPLACEMENT REACTION

CONTROLLING BACK-END-OF-LINE DIMENSIONS OF SEMICONDUCTOR DEVICES

INTERCONNECTS FORMED BY A METAL REPLACEMENT PROCESS

LINER RECESS FOR FULLY ALIGNED VIA

MIDDLE-OF-LINE LOCAL INTERCONNECT STRUCTURES WITH HYBRID FEATURES

METAL INTERCONNECTS FOR SUPER (SKIP) VIA INTEGRATION

AMORPHOUS METAL INTERCONNECTIONS BY SUBTRACTIVE ETCH

METHOD OF FORMING A GATE CONTACT STRUCTURE FOR A SEMICONDUCTOR DEVICE

INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS...

Particle removal with minimal etching of silicon-germanium

METHODS OF FORMING REPLACEMENT GATE STRUCTURES FOR SEMICONDUCTOR DE...

Solution Based Etching of Titanium Carbide and Titanium Nitride Str...

MINIMIZING VOID FORMATION IN SEMICONDUCTOR VIAS AND TRENCHES

INTEGRATED CIRCUITS HAVING MAGNETIC TUNNEL JUNCTIONS (MTJ) AND METH...

METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FO...

METHODS OF SEMICONDUCTOR CONTAMINANT REMOVAL USING SUPERCRITICAL FLUID

METHODS FOR INTEGRATION OF PORE STUFFING MATERIAL

METHODS OF SELF-FORMING BARRIER INTEGRATION WITH PORE STUFFED ULK M...

ELECTROLESS FILL OF TRENCH IN SEMICONDUCTOR STRUCTURE

METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FO...

METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING LOW RESISTANCE M...

SEMICONDUCTOR DEVICE HAVING A SELF-FORMING BARRIER LAYER AT VIA BOTTOM

METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES BY FORMING A...

METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON AN INTEGRA...