Sho Long Chen

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 7,941,636
- Issue date May 10, 2011
- Intellectual Venture Funding LLC
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 7,685,402
- Issue date Mar 23, 2010
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 7,555,631
- Issue date Jun 30, 2009
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Video encoding using variable bit rates
- Patent number 7,409,097
- Issue date Aug 5, 2008
- VWEB Corporation
- Dengzhi Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Motion estimation using predetermined pixel patterns and subpatterns
- Patent number 6,934,332
- Issue date Aug 23, 2005
- Vweb Corporation
- Cheung Auyeung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-phase motion estimation system and method
- Patent number 6,891,890
- Issue date May 10, 2005
- Vweb Corporation
- Cheung Auyeung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Motion estimation using multiple search windows
- Patent number 6,813,315
- Issue date Nov 2, 2004
- Vweb Corporation
- Cheung Auyeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 6,249,856
- Issue date Jun 19, 2001
- Seiko Epson Corporation
- Sanjiy Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 6,044,449
- Issue date Mar 28, 2000
- Seiko Epson Corporation
- Sanjiy Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 5,838,986
- Issue date Nov 17, 1998
- Seiko Epson Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid hierarchial/full-search MPEG encoder motion estimation
- Patent number 5,731,850
- Issue date Mar 24, 1998
- Gregory V. Maturi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 5,682,546
- Issue date Oct 28, 1997
- Seiko Epson Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MPEG encoder that concurrently determines video data encoding forma...
- Patent number 5,610,659
- Issue date Mar 11, 1997
- FutureTel, Inc.
- Gregory C. Maturi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 5,560,035
- Issue date Sep 24, 1996
- Seiko Epson Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC microprocessor architecture implementing multiple typed regist...
- Patent number 5,493,687
- Issue date Feb 20, 1996
- Seiko Epson Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RISC Microprocessor Architecture Implementing Multiple Typed Regist...
- Publication number 20100106942
- Publication date Apr 29, 2010
- Sanjiv GARG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RISC microprocessor architecture implementing multiple typed regist...
- Publication number 20070113047
- Publication date May 17, 2007
- Transmeta Corporation
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Video encoding using variable bit rates
- Publication number 20050105815
- Publication date May 19, 2005
- Vweb Corporation
- Dengzhi Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Video encoding using direct mode predicted frames
- Publication number 20030202590
- Publication date Oct 30, 2003
- Qunshan Gu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RISC microprocessor architecture implementing multiple typed regist...
- Publication number 20030115440
- Publication date Jun 19, 2003
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RISC microprocessor architecture implementing multiple register sets
- Publication number 20010034823
- Publication date Oct 25, 2001
- Sanjiv Garg
- G06 - COMPUTING CALCULATING COUNTING

Sho Long Chen

Person

Patents Grantslast 30 patents

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple typed regist...

Video encoding using variable bit rates

Motion estimation using predetermined pixel patterns and subpatterns

Multi-phase motion estimation system and method

Motion estimation using multiple search windows

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple typed regist...

Hybrid hierarchial/full-search MPEG encoder motion estimation

RISC microprocessor architecture implementing multiple typed regist...

MPEG encoder that concurrently determines video data encoding forma...

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple typed regist...

Patents Applicationslast 30 patents

RISC Microprocessor Architecture Implementing Multiple Typed Regist...

RISC microprocessor architecture implementing multiple typed regist...

Video encoding using variable bit rates

Video encoding using direct mode predicted frames

RISC microprocessor architecture implementing multiple typed regist...

RISC microprocessor architecture implementing multiple register sets