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Stefan Graef
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San Jose, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method and system for designing a probe card
Patent number
7,930,219
Issue date
Apr 19, 2011
FormFactor, Inc.
Benjamin N. Eldridge
G01 - MEASURING TESTING
Information
Patent Grant
Method and system for designing a probe card
Patent number
7,593,872
Issue date
Sep 22, 2009
FormFactor, Inc.
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Automated system for designing and testing a probe card
Patent number
7,092,902
Issue date
Aug 15, 2006
FormFactor, Inc.
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Buffer cell insertion and electronic design automation
Patent number
6,766,499
Issue date
Jul 20, 2004
LSI Logic Corporation
Benjamin Mbouombouo
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and system for designing a probe card
Patent number
6,714,828
Issue date
Mar 30, 2004
FormFactor, Inc.
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Utilizing a technology-independent system description incorporating...
Patent number
6,687,661
Issue date
Feb 3, 2004
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Delay/load estimation for use in integrated circuit design
Patent number
6,634,014
Issue date
Oct 14, 2003
LSI Logic Corporation
Grant Lindberg
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Static timing analysis validation tool for ASIC cores
Patent number
6,598,213
Issue date
Jul 22, 2003
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Integrated circuit having on-chip capacitors for supplying power to...
Patent number
6,546,538
Issue date
Apr 8, 2003
LSI Logic Corporation
Shalini Rubdi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Cell interconnect delay library for integrated circuit design
Patent number
6,532,576
Issue date
Mar 11, 2003
LSI Logic Corporation
Benjamin Mbouombouo
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuit modeling
Patent number
6,502,230
Issue date
Dec 31, 2002
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Iterative prediction of circuit delays
Patent number
6,457,160
Issue date
Sep 24, 2002
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock distribution network planning and method therefor
Patent number
6,305,001
Issue date
Oct 16, 2001
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method of selecting and synthesizing metal interconnect wires in in...
Patent number
6,189,131
Issue date
Feb 13, 2001
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method for estimating quiescent current in integrated circuits
Patent number
6,102,962
Issue date
Aug 15, 2000
LSI Logic Corporation
Emery O. Sugasawara
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System for comparing counter blocks and flag registers to determine...
Patent number
6,101,329
Issue date
Aug 8, 2000
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Digital integrated circuit design system and methodology with hardware
Patent number
6,083,269
Issue date
Jul 4, 2000
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Semiconductor integrated circuit failure analysis using magnetic im...
Patent number
6,064,220
Issue date
May 16, 2000
LSI Logic Corporation
Emery Sugasawara
G01 - MEASURING TESTING
Information
Patent Grant
Current waveform analysis for testing semiconductor devices
Patent number
6,037,796
Issue date
Mar 14, 2000
LSI Logic Corp.
Stefan Graef
G01 - MEASURING TESTING
Information
Patent Grant
Intermediate test file conversion and comparison
Patent number
5,974,248
Issue date
Oct 26, 1999
LSI Logic Corporation
Stefan Graef
G01 - MEASURING TESTING
Information
Patent Grant
Method for detecting bus shorts in semiconductor devices
Patent number
5,898,705
Issue date
Apr 27, 1999
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for scan chain with reduced delay penalty
Patent number
5,831,993
Issue date
Nov 3, 1998
LSI Logic Corporation
Stefan Graef
G01 - MEASURING TESTING
Information
Patent Grant
Burn-in activity monitor
Patent number
5,771,267
Issue date
Jun 23, 1998
LSI Logic Corporation
Stefan Graef
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
METHOD AND SYSTEM FOR DESIGNING A PROBE CARD
Publication number
20100011334
Publication date
Jan 14, 2010
FormFactor, Inc.
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method And System For Designing A Probe Card
Publication number
20060294008
Publication date
Dec 28, 2006
FormFactor, Inc.
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Probe card designed by automated system
Publication number
20040181486
Publication date
Sep 16, 2004
Benjamin N. Eldridge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method and system for designing a probe card
Publication number
20030055736
Publication date
Mar 20, 2003
FormFactor, Inc.
Benjamin N. Eldridge
G01 - MEASURING TESTING