Tiao-Yuan Huang

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Body-tied, strained-channel multi-gate device and methods
- Patent number 9,653,552
- Issue date May 16, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body-tied, strained-channel multi-gate device and methods of manufa...
- Patent number 9,406,800
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body-tied, strained-channel multi-gate device and methods of manufa...
- Patent number 9,214,554
- Issue date Dec 15, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body-tied, strained-channel multi-gate device and methods of manufa...
- Patent number 8,946,811
- Issue date Feb 3, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming a MOS transistor with a recessed channel
- Patent number 5,814,544
- Issue date Sep 29, 1998
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS input buffer with NMOS gate coupled to Vss through undoped gat...
- Patent number 5,716,860
- Issue date Feb 10, 1998
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making CMOS output buffer with enhanced ESD resistance
- Patent number 5,618,740
- Issue date Apr 8, 1997
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS input buffer with NMOS gate coupled to V.sub.SS through undope...
- Patent number 5,581,105
- Issue date Dec 3, 1996
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making an integrated circuit structure
- Patent number 5,529,941
- Issue date Jun 25, 1996
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS output buffer with enhanced ESD resistance
- Patent number 5,517,049
- Issue date May 14, 1996
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-finger input buffer with transistor gates capacitively couple...
- Patent number 5,510,728
- Issue date Apr 23, 1996
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor-on-insulator integrated circuit with selectively thin...
- Patent number 5,418,391
- Issue date May 23, 1995
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential treatment to selectively avoid silicide formation on E...
- Patent number 5,413,969
- Issue date May 9, 1995
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM memory cell with tri-level local interconnect
- Patent number 5,394,358
- Issue date Feb 28, 1995
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric electro-static discharge transistors for increased elect...
- Patent number 5,386,134
- Issue date Jan 31, 1995
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for selective salicidation of source/drain regions of a tran...
- Patent number 5,342,798
- Issue date Aug 30, 1994
- VLSI Technology, Inc.
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film varactors
- Patent number 5,038,184
- Issue date Aug 6, 1991
- Xerox Corporation
- Anne Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication a thin film SOI CMOS device
- Patent number 4,988,638
- Issue date Jan 29, 1991
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating double implanted LDD transistor self-aligned...
- Patent number 4,963,504
- Issue date Oct 16, 1990
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simultaneously deposited thin film CMOS TFTs and their method of fa...
- Patent number 4,951,113
- Issue date Aug 21, 1990
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Intra-gate offset high voltage thin film transistor with misalignme...
- Patent number 4,945,067
- Issue date Jul 31, 1990
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double implanted LDD transistor self-aligned with gate
- Patent number 4,907,048
- Issue date Mar 6, 1990
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Intra-gate offset high voltage thin film transistor with misalignme...
- Patent number 4,907,041
- Issue date Mar 6, 1990
- Xerox Corporation
- Tiao-Yuan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of large grain polycrystalline films
- Patent number 4,904,611
- Issue date Feb 27, 1990
- Xerox Corporation
- Anne Chiang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Body-Tied, Strained-Channel Multi-Gate Device and Methods
- Publication number 20160322463
- Publication date Nov 3, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Body-Tied, Strained-Channel Multi-Gate Device and Methods of Manufa...
- Publication number 20160104800
- Publication date Apr 14, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Body-tied, strained-channel multi-gate device and methods of manufa...
- Publication number 20080006908
- Publication date Jan 10, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hong-Nien Lin
- H01 - BASIC ELECTRIC ELEMENTS

Tiao-Yuan Huang

Person

Patents Grantslast 30 patents

Body-tied, strained-channel multi-gate device and methods

Body-tied, strained-channel multi-gate device and methods of manufa...

Body-tied, strained-channel multi-gate device and methods of manufa...

Body-tied, strained-channel multi-gate device and methods of manufa...

Forming a MOS transistor with a recessed channel

CMOS input buffer with NMOS gate coupled to Vss through undoped gat...

Method of making CMOS output buffer with enhanced ESD resistance

CMOS input buffer with NMOS gate coupled to V.sub.SS through undope...

Method for making an integrated circuit structure

CMOS output buffer with enhanced ESD resistance

Multi-finger input buffer with transistor gates capacitively couple...

Semiconductor-on-insulator integrated circuit with selectively thin...

Differential treatment to selectively avoid silicide formation on E...

SRAM memory cell with tri-level local interconnect

Asymmetric electro-static discharge transistors for increased elect...

Method for selective salicidation of source/drain regions of a tran...

Thin film varactors

Method of fabrication a thin film SOI CMOS device

Method for fabricating double implanted LDD transistor self-aligned...

Simultaneously deposited thin film CMOS TFTs and their method of fa...

Intra-gate offset high voltage thin film transistor with misalignme...

Double implanted LDD transistor self-aligned with gate

Intra-gate offset high voltage thin film transistor with misalignme...

Formation of large grain polycrystalline films

Patents Applicationslast 30 patents

Body-Tied, Strained-Channel Multi-Gate Device and Methods

Body-Tied, Strained-Channel Multi-Gate Device and Methods of Manufa...

Body-tied, strained-channel multi-gate device and methods of manufa...