Tien-Ler Lin

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock frequency doubler method and apparatus for serial flash testing
- Patent number 7,502,267
- Issue date Mar 10, 2009
- Winbond Electronics Corporation
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Combination NAND-NOR memory device
- Patent number 6,967,870
- Issue date Nov 22, 2005
- Integrated Memory Technologies, Inc.
- Ching-Shi Jenq
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device having interleaved read and progra...
- Patent number 6,614,715
- Issue date Sep 2, 2003
- Integrated Memory Technologies, Inc.
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device having interleaved read and progra...
- Patent number 6,556,508
- Issue date Apr 29, 2003
- Integrated Memory Technologies, Inc.
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory chip for use in single or multi-chip pack...
- Patent number 6,507,514
- Issue date Jan 14, 2003
- Integrated Memory Technologies, Inc.
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device having interleaved read and progra...
- Patent number 6,469,955
- Issue date Oct 22, 2002
- Integrated Memory Technologies, Inc.
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE
Information Patent Grant
Regulated reference voltage circuit for flash memory device and oth...
- Patent number 6,366,519
- Issue date Apr 2, 2002
- Macronix International Co., Ltd.
- Chun-Hsiung Hung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing high current chip erase in flash...
- Patent number 6,259,625
- Issue date Jul 10, 2001
- Integrated Memory Technologies, Inc.
- Tien L. Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast flash EPROM programming and pre-programming circuit design
- Patent number 6,166,956
- Issue date Dec 26, 2000
- Macronix International Co., Ltd.
- Tom Dang-Hsing Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array
- Patent number 6,134,144
- Issue date Oct 17, 2000
- Integrated Memory Technologies, Inc.
- Tien L. Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing high current during chip erase in...
- Patent number 6,134,149
- Issue date Oct 17, 2000
- Integrated Memory Technologies, Inc.
- Tien L. Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device for fault tolerant data
- Patent number 5,954,828
- Issue date Sep 21, 1999
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast flash EPROM programming and pre-programming circuit design
- Patent number 5,956,273
- Issue date Sep 21, 1999
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast flash EPROM programming and pre-programming circuit design
- Patent number 5,821,909
- Issue date Oct 13, 1998
- Macronix International Co., Ltd.
- Tom Dang-Hsing Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic test circuitry with non-volatile status write
- Patent number 5,818,848
- Issue date Oct 6, 1998
- Macronix International Co,, Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Advanced program verify for page mode flash memory
- Patent number 5,748,535
- Issue date May 5, 1998
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell and array architecture
- Patent number 5,691,938
- Issue date Nov 25, 1997
- Macronix International Co., Ltd.
- Tom Dang-Hsing Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for reconfiguring a high density memory
- Patent number 5,691,945
- Issue date Nov 25, 1997
- Macronix International Co., Ltd.
- Kong-Mou Liou
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making a non-volatile memory cell
- Patent number 5,633,185
- Issue date May 27, 1997
- Macronix International Co., Ltd.
- Tom Dang-Hsing Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic test circuitry with non-volatile status write
- Patent number 5,627,838
- Issue date May 6, 1997
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making flash EPROM with conductive sidewall spacer contac...
- Patent number 5,618,742
- Issue date Apr 8, 1997
- Macronix Internatioal, Ltd.
- Fuchia Shone
- G08 - SIGNALLING
Information Patent Grant
Fast flash EPROM programming and pre-programming circuit design
- Patent number 5,615,153
- Issue date Mar 25, 1997
- Tom D. Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash EPROM with block erase flags for over-erase protection
- Patent number 5,596,530
- Issue date Jan 21, 1997
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast flash EPROM programming and pre-programming circuit design
- Patent number 5,563,822
- Issue date Oct 8, 1996
- Macronix International Co., Ltd.
- Tom D. Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast FLASH EPROM programming and pre-programming circuit design
- Patent number 5,563,823
- Issue date Oct 8, 1996
- Macronix International Co., Ltd.
- Tom D. Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase and program verification circuit for non-volatile memory
- Patent number 5,544,116
- Issue date Aug 6, 1996
- Macronix International Co., Ltd.
- Liang Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast pre-programming circuit for floating gate memory
- Patent number 5,539,688
- Issue date Jul 23, 1996
- Macronix International Co., Ltd.
- Tom D. Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative voltage generator for flash EPROM design
- Patent number 5,532,960
- Issue date Jul 2, 1996
- Macronix International Co., Ltd.
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase and program verification circuit for non-volatile memory
- Patent number 5,528,546
- Issue date Jun 18, 1996
- Macronix International Company, Ltd.
- Liang Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash EPROM integrated circuit architecture
- Patent number 5,526,307
- Issue date Jun 11, 1996
- Macronix International Co., Ltd.
- Tom D. Yiu
- G08 - SIGNALLING

Patents Applicationslast 30 patents

Information Patent Application
Clock frequency doubler method and apparatus for serial flash testing
- Publication number 20080080276
- Publication date Apr 3, 2008
- Winbond Electronics Corporation
- Tien-Ler Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Combination NAND-NOR memory device
- Publication number 20050146936
- Publication date Jul 7, 2005
- Ching-Shi Jenq
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit memory device having interleaved read and progra...
- Publication number 20030039142
- Publication date Feb 27, 2003
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit memory device having interleaved read and progra...
- Publication number 20030031053
- Publication date Feb 13, 2003
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE

Tien-Ler Lin

Person

Patents Grantslast 30 patents

Clock frequency doubler method and apparatus for serial flash testing

Combination NAND-NOR memory device

Integrated circuit memory device having interleaved read and progra...

Integrated circuit memory device having interleaved read and progra...

Integrated circuit memory chip for use in single or multi-chip pack...

Integrated circuit memory device having interleaved read and progra...

Regulated reference voltage circuit for flash memory device and oth...

Method and apparatus for reducing high current chip erase in flash...

Fast flash EPROM programming and pre-programming circuit design

Flash memory array

Method and apparatus for reducing high current during chip erase in...

Non-volatile memory device for fault tolerant data

Fast flash EPROM programming and pre-programming circuit design

Fast flash EPROM programming and pre-programming circuit design

Automatic test circuitry with non-volatile status write

Advanced program verify for page mode flash memory

Non-volatile memory cell and array architecture

Technique for reconfiguring a high density memory

Method of making a non-volatile memory cell

Automatic test circuitry with non-volatile status write

Method of making flash EPROM with conductive sidewall spacer contac...

Fast flash EPROM programming and pre-programming circuit design

Flash EPROM with block erase flags for over-erase protection

Fast flash EPROM programming and pre-programming circuit design

Fast FLASH EPROM programming and pre-programming circuit design

Erase and program verification circuit for non-volatile memory

Fast pre-programming circuit for floating gate memory

Negative voltage generator for flash EPROM design

Erase and program verification circuit for non-volatile memory

Flash EPROM integrated circuit architecture

Patents Applicationslast 30 patents

Clock frequency doubler method and apparatus for serial flash testing

Combination NAND-NOR memory device

Integrated circuit memory device having interleaved read and progra...

Integrated circuit memory device having interleaved read and progra...