Tomio Nakano

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Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor dynamic memory device
- Patent number RE35953
- Issue date Nov 10, 1998
- Fujitsu Limited
- Tomio Nakano
- 365 - Static information storage and retrieval
Information Patent Grant
Semiconductor device having input protective function
- Patent number 5,747,837
- Issue date May 5, 1998
- Fujitsu Limited
- Akihiro Iwase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Voltage reducing circuit
- Patent number 5,309,040
- Issue date May 3, 1994
- Fujitsu Limited
- Tomio Nakano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary semiconductor memory device including cell access tra...
- Patent number 5,051,959
- Issue date Sep 24, 1991
- Fujitsu Limited
- Tomio Nakano
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory having improved refresh timing
- Patent number 4,985,868
- Issue date Jan 15, 1991
- Fujitsu Limited
- Tomio Nakano
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with internal control signal based upon...
- Patent number 4,970,693
- Issue date Nov 13, 1990
- Fujitsu Limited
- Shigeki Nozaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device capable of selective operation of memor...
- Patent number 4,905,201
- Issue date Feb 27, 1990
- Fujitsu Limited
- Tsuyoshi Ohira
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device
- Patent number 4,903,111
- Issue date Feb 20, 1990
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary semiconductor device reducing latch-up phenomenon
- Patent number 4,862,415
- Issue date Aug 29, 1989
- Fujitsu Limited
- Tomio Nakano
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor memory device having stacked-capacitor type memory cells
- Patent number 4,754,313
- Issue date Jun 28, 1988
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit with redundant circuit replacement
- Patent number 4,752,914
- Issue date Jun 21, 1988
- Fujitsu Limited
- Masao Nakano
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic semiconductor memory device having a simultaneous test func...
- Patent number 4,744,061
- Issue date May 10, 1988
- Fujitsu Limited
- Yoshihiro Takemae
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device having a circuit for compensating for d...
- Patent number 4,716,549
- Issue date Dec 29, 1987
- Fujitsu Limited
- Masao Nakano
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having extended period for outputting data
- Patent number 4,707,811
- Issue date Nov 17, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device having fuse-type informatio...
- Patent number 4,707,806
- Issue date Nov 17, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having divided regular circuits
- Patent number 4,660,174
- Issue date Apr 21, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having stacked capacitor-type memory cells
- Patent number 4,649,406
- Issue date Mar 10, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for maintaining the potential of a node of a MOS dynamic ci...
- Patent number 4,649,289
- Issue date Mar 10, 1987
- Fujitsu Limited
- Tomio Nakano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device having stacked capacitor-type memory cells
- Patent number 4,641,166
- Issue date Feb 3, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device
- Patent number 4,636,982
- Issue date Jan 13, 1987
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having active pull-up circuits
- Patent number 4,601,017
- Issue date Jul 15, 1986
- Fujitsu Limited
- Hirohiko Mochizuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic semiconductor memory device
- Patent number 4,597,059
- Issue date Jun 24, 1986
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having clamp circuits
- Patent number 4,592,020
- Issue date May 27, 1986
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Information storing circuit using blown and unblown fuses
- Patent number 4,592,025
- Issue date May 27, 1986
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 4,583,179
- Issue date Apr 15, 1986
- Fujitsu Limited
- Takashi Horii
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 4,581,720
- Issue date Apr 8, 1986
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic semiconductor memory device
- Patent number 4,578,776
- Issue date Mar 25, 1986
- Fujitsu Limited
- Yoshihiro Takemae
- G11 - INFORMATION STORAGE
Information Patent Grant
MIS transistor circuit
- Patent number 4,578,781
- Issue date Mar 25, 1986
- Fujitsu Limited
- Junji Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device for pulling down output terminal voltage
- Patent number 4,570,088
- Issue date Feb 11, 1986
- Fujitsu Limited
- Shigeki Nozaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic semiconductor memory device with balanced sensing arrangement
- Patent number 4,545,037
- Issue date Oct 1, 1985
- Fujitsu Limited
- Tomio Nakano
- G11 - INFORMATION STORAGE

Tomio Nakano

Person

Patents Grantslast 30 patents

Semiconductor dynamic memory device

Semiconductor device having input protective function

Voltage reducing circuit

Complementary semiconductor memory device including cell access tra...

Dynamic random access memory having improved refresh timing

Semiconductor memory device with internal control signal based upon...

Semiconductor memory device capable of selective operation of memor...

Integrated circuit device

Complementary semiconductor device reducing latch-up phenomenon

Semiconductor memory device having stacked-capacitor type memory cells

Semiconductor integrated circuit with redundant circuit replacement

Dynamic semiconductor memory device having a simultaneous test func...

Semiconductor memory device having a circuit for compensating for d...

Semiconductor memory device having extended period for outputting data

Semiconductor integrated circuit device having fuse-type informatio...

Semiconductor memory device having divided regular circuits

Semiconductor memory device having stacked capacitor-type memory cells

Circuit for maintaining the potential of a node of a MOS dynamic ci...

Semiconductor memory device having stacked capacitor-type memory cells

Semiconductor memory device

Semiconductor memory device having active pull-up circuits

Dynamic semiconductor memory device

Semiconductor memory device having clamp circuits

Information storing circuit using blown and unblown fuses

Semiconductor integrated circuit

Semiconductor memory device

Dynamic semiconductor memory device

MIS transistor circuit

Semiconductor device for pulling down output terminal voltage

Dynamic semiconductor memory device with balanced sensing arrangement