Vaidyanathan Kripesh

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Bonding stress testing arrangement and method of determining stress
- Patent number 9,506,823
- Issue date Nov 29, 2016
- Agency for Science, Technology and Research
- Cheryl Sharmani Selvanayagam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and a method of manufacturing a semiconduct...
- Patent number 8,466,550
- Issue date Jun 18, 2013
- Agency for Science, Technology and Research
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RF and MMIC stackable micro-modules
- Patent number 7,592,703
- Issue date Sep 22, 2009
- Agency for Science, Technology and Research
- Vaidyanathan Kripesh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
RF and MMIC stackable micro-modules
- Patent number 7,230,318
- Issue date Jun 12, 2007
- Agency for Science, Technology and Research
- Vaidyanathan Kripesh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wafer level packages and methods of fabrication
- Patent number 7,189,594
- Issue date Mar 13, 2007
- Agency for Science, Technology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra...
- Patent number 7,160,756
- Issue date Jan 9, 2007
- Agency for Science, Techology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for ultra thinning bumped wafers for flip chip
- Patent number 7,141,487
- Issue date Nov 28, 2006
- Agency for Science Technology and Research
- Ganesh Vetrivel Periasamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Soldering agent for use in diffusion soldering processes, and metho...
- Patent number 6,872,464
- Issue date Mar 29, 2005
- Infineon Technologies AG
- Holger Hübner
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wafer-level package for micro-electro-mechanical systems
- Patent number 6,846,725
- Issue date Jan 25, 2005
- Institute of Microelectronics
- Ranganathan Nagarajan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level inter-connector formation method
- Patent number 6,787,456
- Issue date Sep 7, 2004
- Agency for Science, Technology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for contact-connecting a semiconductor component
- Patent number 6,773,956
- Issue date Aug 10, 2004
- Infineon Technologies AG
- Holger Huebner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for fluid-based cooling of heat-generating dev...
- Patent number 6,717,812
- Issue date Apr 6, 2004
- Institute of Microelectronics
- Damaruganath Pinjala
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NEURO-PROBE DEVICE, IMPLANTABLE ELECTRONIC DEVICE AND METHOD OF FOR...
- Publication number 20150148644
- Publication date May 28, 2015
- Kripesh Vaidyanathan
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Application
GUIDE WIRE ARRANGEMENT, STRIP ARRANGEMENT AND METHODS OF FORMING TH...
- Publication number 20130324863
- Publication date Dec 5, 2013
- Daquan Yu
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Application
Bonding Stress Testing Arrangement and Method of Determining Stress
- Publication number 20130199303
- Publication date Aug 8, 2013
- Agency for Science, Technology and Research
- Cheryl Sharmani Selvanayagam
- G01 - MEASURING TESTING
Information Patent Application
Miniature Sensor Tip for Medical Devices and Method of Forming the...
- Publication number 20130053730
- Publication date Feb 28, 2013
- National University of Singapore
- Rama Krishna Kotlanka
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Application
Implantable Device for Detecting Variation in Fluid Flow Rate
- Publication number 20130053711
- Publication date Feb 28, 2013
- Rama Krishna Kotlanka
- G01 - MEASURING TESTING
Information Patent Application
Substrate Arrangement and a Method of Manufacturing a Substrate Arr...
- Publication number 20120126419
- Publication date May 24, 2012
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE AND A METHOD OF MANUFACTURING A SEMICONDUCT...
- Publication number 20120119390
- Publication date May 17, 2012
- Navas Khan Oratti Kalandar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE PACKAGE AND A METHOD FOR MANUFACTURING THE DIE PACKAGE
- Publication number 20110316117
- Publication date Dec 29, 2011
- Agency For Science, Technology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC PACKAGE AND METHOD OF ASSEMBLING THE SAME
- Publication number 20100187682
- Publication date Jul 29, 2010
- Damaruganath Pinjala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE, UNIT, SYSTEM AND METHOD FOR THE MAGNETICALLY-ASSISTED ASSEM...
- Publication number 20100170086
- Publication date Jul 8, 2010
- Agency for Science, Technology and Research
- Qasem Ramadan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RF and MMIC stackable micro-modules
- Publication number 20070222083
- Publication date Sep 27, 2007
- Agency For Science, Technology and Research
- Vaidyanathan Kripesh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Copper interconnect post for connecting a semiconductor chip to a s...
- Publication number 20060223313
- Publication date Oct 5, 2006
- Agency For Science, Technology and Research
- Seung Uk Yoon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra...
- Publication number 20060079025
- Publication date Apr 13, 2006
- Agency For Science, Technology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer level packages and methods of fabrication
- Publication number 20060057832
- Publication date Mar 16, 2006
- Agency for Science, Technology and Research
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for ultra thinning bumped wafers for flip chip
- Publication number 20060003550
- Publication date Jan 5, 2006
- Agency For Science, Technology and Research
- Ganesh Vetrivel Periasamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RF and MMIC stackable micro-modules
- Publication number 20050146049
- Publication date Jul 7, 2005
- Agency For Science, Technology and Research
- Vaidyanathan Kripesh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
WAFER-LEVEL INTER-CONNECTOR FORMATION METHOD
- Publication number 20040185593
- Publication date Sep 23, 2004
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-level package for micro-electro-mechanical systems
- Publication number 20040077154
- Publication date Apr 22, 2004
- Ranganathan Nagarajan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Soldering agent for use in diffusion soldering processes, and metho...
- Publication number 20040025976
- Publication date Feb 12, 2004
- Holger Hubner
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method for contact-connecting a semiconductor component
- Publication number 20030176054
- Publication date Sep 18, 2003
- Holger Huebner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of forming metal surfaces compatible with a wire bonding an...
- Publication number 20020175424
- Publication date Nov 28, 2002
- Vaidyanathan Kripesh
- H01 - BASIC ELECTRIC ELEMENTS

Vaidyanathan Kripesh

Person

Patents Grantslast 30 patents

Bonding stress testing arrangement and method of determining stress

Semiconductor structure and a method of manufacturing a semiconduct...

RF and MMIC stackable micro-modules

RF and MMIC stackable micro-modules

Wafer level packages and methods of fabrication

Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra...

Method for ultra thinning bumped wafers for flip chip

Soldering agent for use in diffusion soldering processes, and metho...

Wafer-level package for micro-electro-mechanical systems

Wafer-level inter-connector formation method

Method for contact-connecting a semiconductor component

Apparatus and method for fluid-based cooling of heat-generating dev...

Patents Applicationslast 30 patents

NEURO-PROBE DEVICE, IMPLANTABLE ELECTRONIC DEVICE AND METHOD OF FOR...

GUIDE WIRE ARRANGEMENT, STRIP ARRANGEMENT AND METHODS OF FORMING TH...

Bonding Stress Testing Arrangement and Method of Determining Stress

Miniature Sensor Tip for Medical Devices and Method of Forming the...

Implantable Device for Detecting Variation in Fluid Flow Rate

Substrate Arrangement and a Method of Manufacturing a Substrate Arr...

SEMICONDUCTOR STRUCTURE AND A METHOD OF MANUFACTURING A SEMICONDUCT...

DIE PACKAGE AND A METHOD FOR MANUFACTURING THE DIE PACKAGE

ELECTRONIC PACKAGE AND METHOD OF ASSEMBLING THE SAME

DEVICE, UNIT, SYSTEM AND METHOD FOR THE MAGNETICALLY-ASSISTED ASSEM...

RF and MMIC stackable micro-modules

Copper interconnect post for connecting a semiconductor chip to a s...

Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra...

Wafer level packages and methods of fabrication

Method for ultra thinning bumped wafers for flip chip

RF and MMIC stackable micro-modules

WAFER-LEVEL INTER-CONNECTOR FORMATION METHOD

Wafer-level package for micro-electro-mechanical systems

Soldering agent for use in diffusion soldering processes, and metho...

Method for contact-connecting a semiconductor component

Process of forming metal surfaces compatible with a wire bonding an...