Volker Mauer

Person

Princes Risborough, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for performing buffer fill level controlled d...
- Patent number 10,136,384
- Issue date Nov 20, 2018
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexible input structure for arithmetic processing block
- Patent number 10,003,341
- Issue date Jun 19, 2018
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelined systolic finite impulse response filter
- Patent number 9,966,933
- Issue date May 8, 2018
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamically programmable digital signal processing blocks for finit...
- Patent number 9,748,928
- Issue date Aug 29, 2017
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for implementing feedback loops
- Patent number 9,660,624
- Issue date May 23, 2017
- Altera Corporation
- Nima Safari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-standard peak canceling circuitry
- Patent number 9,485,129
- Issue date Nov 1, 2016
- Altera Corporation
- Benjamin Thomas Cope
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamically programmable digital signal processing blocks for finit...
- Patent number 9,438,203
- Issue date Sep 6, 2016
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelined systolic finite impulse response filter
- Patent number 9,379,687
- Issue date Jun 28, 2016
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for adjusting transmit signal clipping thresh...
- Patent number 9,337,782
- Issue date May 10, 2016
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for performing digital predistortion using ti...
- Patent number 9,036,734
- Issue date May 19, 2015
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Matrix operations in an integrated circuit device
- Patent number 8,959,136
- Issue date Feb 17, 2015
- Altera Corporation
- Colman C. Cheung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource sharing in decoder architectures
- Patent number 8,914,716
- Issue date Dec 16, 2014
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
QR decomposition in an integrated circuit device
- Patent number 8,812,576
- Issue date Aug 19, 2014
- Altera Corporation
- Volker Mauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular digital signal processing circuitry with optionally usable,...
- Patent number 8,751,551
- Issue date Jun 10, 2014
- Altera Corporation
- Keone Streicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable device with specialized multiplier blocks
- Patent number 8,620,980
- Issue date Dec 31, 2013
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular digital signal processing circuitry with optionally usable,...
- Patent number 8,620,977
- Issue date Dec 31, 2013
- Altera Corporation
- Keone Streicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configuring a CIC filter in a programmable integrated circuit device
- Patent number 8,583,715
- Issue date Nov 12, 2013
- Altera Corporation
- Zhengjun Pan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Priming of metrics used by convolutional decoders
- Patent number 8,578,255
- Issue date Nov 5, 2013
- Altera Corporation
- Zhengjun Pan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Avoiding interleaver memory conflicts
- Patent number 8,572,456
- Issue date Oct 29, 2013
- Altera Corporation
- Zhengjun Pan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular digital signal processing circuitry with optionally usable,...
- Patent number 8,549,055
- Issue date Oct 1, 2013
- Altera Corporation
- Keone Streicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Specialized processing block for programmable integrated circuit de...
- Patent number 8,543,634
- Issue date Sep 24, 2013
- Altera Corporation
- Lei Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for configuring a finite impulse response filter in a progra...
- Patent number 8,386,550
- Issue date Feb 26, 2013
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data resequencing
- Patent number 8,291,291
- Issue date Oct 16, 2012
- Altera Corporation
- Zhengjun Pan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Peak windowing for crest factor reduction
- Patent number 8,005,177
- Issue date Aug 23, 2011
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Efficient rounding circuits and methods in configurable integrated...
- Patent number 7,948,267
- Issue date May 24, 2011
- Altera Corporation
- Volker Mauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined interpolation and decimation filter for programmable logic...
- Patent number 7,814,137
- Issue date Oct 12, 2010
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive sampling rate converter
- Patent number 7,680,233
- Issue date Mar 16, 2010
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Peak windowing for crest factor reduction
- Patent number 7,586,995
- Issue date Sep 8, 2009
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adaptive sampling rate converter
- Patent number 7,369,637
- Issue date May 6, 2008
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for implementing a multiple constraint length...
- Patent number 7,260,154
- Issue date Aug 21, 2007
- Altera Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Filtering with Tensor Structures
- Publication number 20250021305
- Publication date Jan 16, 2025
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DECOMPOSED DIGITAL FILTER
- Publication number 20230128025
- Publication date Apr 27, 2023
- Intel Corporation
- Volker Mauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Reducing Filter Distortion In Data Using Emphasis
- Publication number 20230096355
- Publication date Mar 30, 2023
- Intel Corporation
- Volker Mauer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fast Fourier Transform (FFT) Based Digital Signal Processing (DSP)...
- Publication number 20220014199
- Publication date Jan 13, 2022
- Intel Corporation
- Volker Mauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...
- Publication number 20140082035
- Publication date Mar 20, 2014
- Altera Corporation
- Keone Streicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...
- Publication number 20130332497
- Publication date Dec 12, 2013
- Altera Corporation
- Keone Streicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...
- Publication number 20100228806
- Publication date Sep 9, 2010
- Keone Streicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESOURCE SHARING IN DECODER ARCHITECTURES
- Publication number 20090228768
- Publication date Sep 10, 2009
- Altera Corporation
- Volker Mauer
- H03 - BASIC ELECTRONIC CIRCUITRY

Volker Mauer

Person

Patents Grantslast 30 patents

Methods and apparatus for performing buffer fill level controlled d...

Flexible input structure for arithmetic processing block

Pipelined systolic finite impulse response filter

Dynamically programmable digital signal processing blocks for finit...

Methods and apparatus for implementing feedback loops

Multi-standard peak canceling circuitry

Dynamically programmable digital signal processing blocks for finit...

Pipelined systolic finite impulse response filter

Methods and apparatus for adjusting transmit signal clipping thresh...

Methods and apparatus for performing digital predistortion using ti...

Matrix operations in an integrated circuit device

Resource sharing in decoder architectures

QR decomposition in an integrated circuit device

Modular digital signal processing circuitry with optionally usable,...

Programmable device with specialized multiplier blocks

Modular digital signal processing circuitry with optionally usable,...

Configuring a CIC filter in a programmable integrated circuit device

Priming of metrics used by convolutional decoders

Avoiding interleaver memory conflicts

Modular digital signal processing circuitry with optionally usable,...

Specialized processing block for programmable integrated circuit de...

Method for configuring a finite impulse response filter in a progra...

Data resequencing

Peak windowing for crest factor reduction

Efficient rounding circuits and methods in configurable integrated...

Combined interpolation and decimation filter for programmable logic...

Adaptive sampling rate converter

Peak windowing for crest factor reduction

Adaptive sampling rate converter

Method and apparatus for implementing a multiple constraint length...

Patents Applicationslast 30 patents

Filtering with Tensor Structures

SYSTEMS AND METHODS FOR DECOMPOSED DIGITAL FILTER

Techniques For Reducing Filter Distortion In Data Using Emphasis

Fast Fourier Transform (FFT) Based Digital Signal Processing (DSP)...

MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...

MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...

MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE,...

RESOURCE SHARING IN DECODER ARCHITECTURES