Ying Zhou

Person

Tigard, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Interconnects having sealing structures to enable selective metal c...
- Patent number 9,984,922
- Issue date May 29, 2018
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects having sealing structures to enable selective metal c...
- Patent number 9,437,545
- Issue date Sep 6, 2016
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transceiver clock architecture with transmit PLL and receive slave...
- Patent number 9,237,000
- Issue date Jan 12, 2016
- Intel Corporation
- Aaron Martin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interconnects having sealing structures to enable selective metal c...
- Patent number 8,928,125
- Issue date Jan 6, 2015
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnects having sealing structures to enable selective metal c...
- Patent number 8,058,710
- Issue date Nov 15, 2011
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable delay for clock phase error correction
- Patent number 7,545,194
- Issue date Jun 9, 2009
- Intel Corporation
- Suwei Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interconnects having sealing structures to enable selective metal c...
- Patent number 7,402,519
- Issue date Jul 22, 2008
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming self-passivating interconnects and resulting devices
- Patent number 7,402,509
- Issue date Jul 22, 2008
- Intel Corporation
- Mauro J. Kobrinsky
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Depositing an oxide
- Patent number 7,192,890
- Issue date Mar 20, 2007
- Intel Corporation
- Ying Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing adhesion of silicon nitride films to carbon-containing ox...
- Patent number 7,071,129
- Issue date Jul 4, 2006
- Intel Corporation
- Chia-Hong Jan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device having a high-k gate diele...
- Patent number 6,867,102
- Issue date Mar 15, 2005
- Intel Corporation
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device having a high-k gate diele...
- Patent number 6,806,146
- Issue date Oct 19, 2004
- Intel Corporation
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device having an ultra-thin high-...
- Patent number 6,787,440
- Issue date Sep 7, 2004
- Intel Corporation
- Christopher G. Parker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device having a high-k gate diele...
- Patent number 6,689,675
- Issue date Feb 10, 2004
- Intel Corporation
- Christopher G. Parker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving nucleation and adhesion of CVD and ALD films d...
- Patent number 6,605,549
- Issue date Aug 12, 2003
- Intel Corporation
- Jihperng Leu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
SIGNAL PHASE OPTIMIZATION IN MEMORY INTERFACE TRAINING
- Publication number 20180069692
- Publication date Mar 8, 2018
- Intel Corporation
- Tonia G. MORRIS
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...
- Publication number 20160372366
- Publication date Dec 22, 2016
- Intel Corporation
- Jun HE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...
- Publication number 20150097292
- Publication date Apr 9, 2015
- Intel Corporation
- Jun HE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...
- Publication number 20120007242
- Publication date Jan 12, 2012
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnects having sealing structures to enable selective metal c...
- Publication number 20080179748
- Publication date Jul 31, 2008
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable delay for clock phase error correction
- Publication number 20080012653
- Publication date Jan 17, 2008
- Intel Corporation
- Suwei Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transceiver clock architecture with transmit PLL and receive slave...
- Publication number 20070291828
- Publication date Dec 20, 2007
- Aaron Martin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus to eliminate clock phase error in a multi-phas...
- Publication number 20070164797
- Publication date Jul 19, 2007
- Hon-Mo Raymond Law
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Interconnects having sealing structures to enable selective metal c...
- Publication number 20060273431
- Publication date Dec 7, 2006
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming self-passivating interconnects and resulting devices
- Publication number 20060220197
- Publication date Oct 5, 2006
- Mauro J. Kobrinsky
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Atomic layer deposition of high quality high-k transition metal and...
- Publication number 20060045968
- Publication date Mar 2, 2006
- Matthew V. Metz
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Depositing an oxide
- Publication number 20050095792
- Publication date May 5, 2005
- Ying Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Adhesion between carbon doped oxide and etch stop layers
- Publication number 20050087517
- Publication date Apr 28, 2005
- Andrew Ott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a semiconductor device having a high-k gate diele...
- Publication number 20040235251
- Publication date Nov 25, 2004
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a semiconductor device having an ultra-thin high-...
- Publication number 20040110361
- Publication date Jun 10, 2004
- Christopher G. Parker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Enhancing adhesion of silicon nitride films to carbon-containing ox...
- Publication number 20040051176
- Publication date Mar 18, 2004
- Chia-Hong Jan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for improving nucleation and adhesion of CVD and ALD films d...
- Publication number 20030205823
- Publication date Nov 6, 2003
- Jihperng Leu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method for improving nucleation and adhesion of CVD and ALD films d...
- Publication number 20030064607
- Publication date Apr 3, 2003
- Jihperng Leu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Person

Patents Grantslast 30 patents

Interconnects having sealing structures to enable selective metal c...

Interconnects having sealing structures to enable selective metal c...

Transceiver clock architecture with transmit PLL and receive slave...

Interconnects having sealing structures to enable selective metal c...

Interconnects having sealing structures to enable selective metal c...

Programmable delay for clock phase error correction

Interconnects having sealing structures to enable selective metal c...

Method of forming self-passivating interconnects and resulting devices

Depositing an oxide

Enhancing adhesion of silicon nitride films to carbon-containing ox...

Method for making a semiconductor device having a high-k gate diele...

Method for making a semiconductor device having a high-k gate diele...

Method for making a semiconductor device having an ultra-thin high-...

Method for making a semiconductor device having a high-k gate diele...

Method for improving nucleation and adhesion of CVD and ALD films d...

Patents Applicationslast 30 patents

SIGNAL PHASE OPTIMIZATION IN MEMORY INTERFACE TRAINING

INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...

INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...

INTERCONNECTS HAVING SEALING STRUCTURES TO ENABLE SELECTIVE METAL C...

Interconnects having sealing structures to enable selective metal c...

Programmable delay for clock phase error correction

Transceiver clock architecture with transmit PLL and receive slave...

Method and apparatus to eliminate clock phase error in a multi-phas...

Interconnects having sealing structures to enable selective metal c...

Method of forming self-passivating interconnects and resulting devices

Atomic layer deposition of high quality high-k transition metal and...

Depositing an oxide

Adhesion between carbon doped oxide and etch stop layers

Method for making a semiconductor device having a high-k gate diele...

Method for making a semiconductor device having an ultra-thin high-...

Enhancing adhesion of silicon nitride films to carbon-containing ox...

Method for improving nucleation and adhesion of CVD and ALD films d...

Method for improving nucleation and adhesion of CVD and ALD films d...