Yoshio Matsuda

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Content addressable memory device having match line equalizer circuit
- Patent number 8,169,807
- Issue date May 1, 2012
- Renesas Electronics Corporation
- Katsumi Dosaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Wiring design support apparatus for bond wire of semiconductor devices
- Patent number 7,725,847
- Issue date May 25, 2010
- Mitsubishi Denki Kabushiki Kaisha
- Akihiro Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design support apparatus and method for designing semiconductor pac...
- Patent number 6,802,048
- Issue date Oct 5, 2004
- Renesas Technology Corp.
- Akihiro Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device for simple cache system
- Patent number 6,404,691
- Issue date Jun 11, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 6,075,732
- Issue date Jun 13, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Tsukasa Ooishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 5,982,678
- Issue date Nov 9, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Tsukasa Ooishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and data transferring structure and met...
- Patent number 5,894,440
- Issue date Apr 13, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Masaki Tsukude
- G11 - INFORMATION STORAGE
Information Patent Grant
Random access memory with a plurality amplifier groups for reading...
- Patent number 5,867,436
- Issue date Feb 2, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Kiyohiro Furutani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random access memory with a plurality amplifier groups for reading...
- Patent number 5,636,163
- Issue date Jun 3, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Kiyohiro Furutani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device for simple cache system
- Patent number 5,588,130
- Issue date Dec 24, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit line structure for semiconductor memory device
- Patent number 5,550,769
- Issue date Aug 27, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Hideto Hidaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having an SRAM as a cache memory integr...
- Patent number 5,509,132
- Issue date Apr 16, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Yoshio Matsuda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 5,504,713
- Issue date Apr 2, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Tsukasa Ooishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing a curved surface multi-layer wiring board
- Patent number 5,462,838
- Issue date Oct 31, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Masahito Sato
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Bit line structure for semiconductor memory device with bank separa...
- Patent number 5,461,589
- Issue date Oct 24, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Hideto Hidaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing a curved surface multi-layer wiring board
- Patent number 5,449,591
- Issue date Sep 12, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Masahito Sato
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Bit line structure for semiconductor memory device
- Patent number 5,416,734
- Issue date May 16, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Hideto Hidaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic crosspoint switching device operating at a high signal t...
- Patent number 5,412,380
- Issue date May 2, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Yoshio Matsuda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Random access memory with plurality of amplifier groups
- Patent number 5,375,088
- Issue date Dec 20, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kiyohiro Furutani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for driving word line in block access memory
- Patent number 5,371,714
- Issue date Dec 6, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Yoshio Matsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device for simple cache system with selective...
- Patent number 5,353,427
- Issue date Oct 4, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of testing switches and switching circuit
- Patent number 5,347,270
- Issue date Sep 13, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Yoshio Matsuda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Random access memory with a plurality of amplifier groups
- Patent number 5,293,598
- Issue date Mar 8, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Kiyohiro Furutani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 5,289,417
- Issue date Feb 22, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Tsukasa Ooishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line structure for semiconductor memory device
- Patent number 5,280,443
- Issue date Jan 18, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Hideto Hidaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared-sense amplifier control signal generating circuit in dynamic...
- Patent number 5,267,214
- Issue date Nov 30, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing semiconductor memory device having stacked...
- Patent number 5,250,458
- Issue date Oct 5, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Katsuhiro Tsukamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device for simple cache system
- Patent number 5,226,147
- Issue date Jul 6, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device with a built-in cache memory and operat...
- Patent number 5,226,139
- Issue date Jul 6, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Kazuyasu Fujishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for driving word line in block access memory
- Patent number 5,222,047
- Issue date Jun 22, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Yoshio Matsuda
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC DEVICES AND METHODS OF MANUFACTUING ELECTRONIC DEVICES
- Publication number 20240292547
- Publication date Aug 29, 2024
- Amkor Technology Singapore Holding Pte. Ltd.
- Shaun Bowers
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CONTENT ADDRESSABLE MEMORY DEVICE HAVING MATCH LINE EQUALIZER CIRCUIT
- Publication number 20090113122
- Publication date Apr 30, 2009
- RENESAS TECHNOLOGY CORP.
- Katsumi Dosaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Support Apparatus for Semiconductor Devices
- Publication number 20080250363
- Publication date Oct 9, 2008
- Mitsubishi Denki Kabushiki Kaisha
- Akihiro Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design support apparatus for semiconductor devices
- Publication number 20030192019
- Publication date Oct 9, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Akihiro Goto
- G06 - COMPUTING CALCULATING COUNTING

Yoshio Matsuda

Person

Patents Grantslast 30 patents

Content addressable memory device having match line equalizer circuit

Wiring design support apparatus for bond wire of semiconductor devices

Design support apparatus and method for designing semiconductor pac...

Semiconductor memory device for simple cache system

Semiconductor memory device with redundancy circuit

Semiconductor memory device with redundancy circuit

Semiconductor memory device and data transferring structure and met...

Random access memory with a plurality amplifier groups for reading...

Random access memory with a plurality amplifier groups for reading...

Semiconductor memory device for simple cache system

Bit line structure for semiconductor memory device

Semiconductor memory device having an SRAM as a cache memory integr...

Semiconductor memory device with redundancy circuit

Method for manufacturing a curved surface multi-layer wiring board

Bit line structure for semiconductor memory device with bank separa...

Method for manufacturing a curved surface multi-layer wiring board

Bit line structure for semiconductor memory device

Electronic crosspoint switching device operating at a high signal t...

Random access memory with plurality of amplifier groups

Method and apparatus for driving word line in block access memory

Semiconductor memory device for simple cache system with selective...

Method of testing switches and switching circuit

Random access memory with a plurality of amplifier groups

Semiconductor memory device with redundancy circuit

Bit line structure for semiconductor memory device

Shared-sense amplifier control signal generating circuit in dynamic...

Method for manufacturing semiconductor memory device having stacked...

Semiconductor memory device for simple cache system

Semiconductor memory device with a built-in cache memory and operat...

Method and apparatus for driving word line in block access memory

Patents Applicationslast 30 patents

ELECTRONIC DEVICES AND METHODS OF MANUFACTUING ELECTRONIC DEVICES

CONTENT ADDRESSABLE MEMORY DEVICE HAVING MATCH LINE EQUALIZER CIRCUIT

Design Support Apparatus for Semiconductor Devices

Design support apparatus for semiconductor devices