Bit line control circuits

Industry

CPC
G11C7/12

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/12Bit line control circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory circuit and method of operating the same
- Patent number 12,183,428
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Tzu Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Turbo mode SRAM for high performance
- Patent number 12,183,429
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Michael Clinton
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit-cell architecture based in-memory compute
- Patent number 12,183,424
- Issue date Dec 31, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Data reading/writing method, memory, storage apparatus, and terminal
- Patent number 12,183,425
- Issue date Dec 31, 2024
- Huawei Technologies Co., Ltd.
- Huifang Jiao
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline system architecture supporting erase operation and I-V cha...
- Patent number 12,176,053
- Issue date Dec 24, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Ramesh Raghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having switching device of page buffer and erase meth...
- Patent number 12,176,058
- Issue date Dec 24, 2024
- Macronix International Co., Ltd.
- Jung-Chuan Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device configured to store parity data and method of...
- Patent number 12,176,056
- Issue date Dec 24, 2024
- SK hynix Inc.
- Byoung Sung You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device
- Patent number 12,176,062
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- He-Zhou Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing-in-memory architecture
- Patent number 12,176,063
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Chun Shih
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...
- Patent number 12,170,110
- Issue date Dec 17, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and electronic device
- Patent number 12,170,125
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Yu Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device
- Patent number 12,165,731
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Chen Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage amplifier based on cascaded charge pump boosting
- Patent number 12,166,459
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-Ho Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for controlling power management operations in...
- Patent number 12,165,739
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier, memory device and operation method thereof
- Patent number 12,165,733
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Win-San Khwa
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustable memory cell reliability management
- Patent number 12,154,655
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Daniele Balluchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit with sense amplifier calibration mechanism
- Patent number 12,142,342
- Issue date Nov 12, 2024
- Industrial Technology Research Institute
- Chih-Sheng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with selective precharging
- Patent number 12,142,346
- Issue date Nov 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ed McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer, memory device having page buffer, and method of operat...
- Patent number 12,142,345
- Issue date Nov 12, 2024
- SK Hynix Inc.
- Chang Yeop Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibration methods and structures for partitioned memory architect...
- Patent number 12,136,468
- Issue date Nov 5, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Floating data line circuit and method
- Patent number 12,136,460
- Issue date Nov 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Manish Arora
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device and control method of semiconductor st...
- Patent number 12,119,081
- Issue date Oct 15, 2024
- Fujitsu Limited
- Hiroshi Nakadai
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse memory reading circuit with controllable reading time
- Patent number 12,119,069
- Issue date Oct 15, 2024
- WUXI ESIONTECH CO., LTD.
- Zhengzhou Cao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 12,119,076
- Issue date Oct 15, 2024
- Kioxia Corporation
- Takayuki Miyazaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive circuit, method for driving drive circuit, and memory
- Patent number 12,119,083
- Issue date Oct 15, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuhao Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier circuit and data read method
- Patent number 12,112,824
- Issue date Oct 8, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Guifen Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reading data based on a program status of...
- Patent number 12,112,826
- Issue date Oct 8, 2024
- SK Hynix Inc.
- Kang Woo Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-port SRAM cell and layout method
- Patent number 12,114,473
- Issue date Oct 8, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with programmable number of filters
- Patent number 12,106,822
- Issue date Oct 1, 2024
- MediaTek Singapore Pte Ltd.
- Chetan Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single column select architecture for sense amplifier circuity
- Patent number 12,106,820
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Luoqi Li
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE
- Publication number 20240420748
- Publication date Dec 19, 2024
- NVIDIA Corp.
- Cagri Erbagci
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Charger Circuit of Memory Device and Methods For Operating The...
- Publication number 20240412766
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Masaya Hamada
- G11 - INFORMATION STORAGE
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION
- Publication number 20240404568
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Riccardo ZURLA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
- Publication number 20240395294
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE C...
- Publication number 20240395351
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Kyu Sung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
FLOATING DATA LINE CIRCUIT AND METHOD
- Publication number 20240395333
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Manish ARORA
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE AMPLIFIER BASED ON CASCADED CHARGE PUMP BOOSTING
- Publication number 20240388267
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Ho Chang
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTE-IN-MEMORY CIRCUIT BASED ON CHARGE REDISTRIBUTION, AND CONTR...
- Publication number 20240386922
- Publication date Nov 21, 2024
- Peking University
- Yimao CAI
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES INCLUDING MULTIPLE READ MODES AND METHODS FOR SAME
- Publication number 20240386924
- Publication date Nov 21, 2024
- MICRON TECHNOLOGY, INC.
- THEODORE T. PEKNY
- G11 - INFORMATION STORAGE
Information Patent Application
CONTENT ADDRESSABLE MEMORY FOR LARGE SEARCH WORDS
- Publication number 20240386923
- Publication date Nov 21, 2024
- Macronix International Co., Ltd.
- Hang-Ting Lue
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240381606
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-PORT SRAM CELL AND LAYOUT METHOD
- Publication number 20240381612
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
PAGE BUFFER, SEMICONDUCTOR DEVICE INCLUDING PAGE BUFFER, AND OPERAT...
- Publication number 20240379137
- Publication date Nov 14, 2024
- SK HYNIX INC.
- Won Jae CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC SENSING LEVELS FOR NONVOLATILE MEMORY DEVICES
- Publication number 20240355368
- Publication date Oct 24, 2024
- Infineon Technologies, LLC
- Shivananda SHETTY
- G11 - INFORMATION STORAGE
Information Patent Application
Memory and Read Circuit Thereof
- Publication number 20240355369
- Publication date Oct 24, 2024
- ZHEJIANG HIKSTOR TECHNOLOGY CO., LTD.
- Haijun SUN
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD
- Publication number 20240355372
- Publication date Oct 24, 2024
- Huawei Technologies Co., Ltd
- Leibin NI
- G11 - INFORMATION STORAGE
Information Patent Application
FOUR-POLY-PITCH SRAM CELL WITH BACKSIDE METAL TRACKS
- Publication number 20240349474
- Publication date Oct 17, 2024
- Taiwan Semiconductor Manufacturing Co., LTD
- Kuo-Hsiu Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM
- Publication number 20240339136
- Publication date Oct 10, 2024
- Silicon Storage Technology, Inc.
- Kha Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, READ CLOCK GENERATION CIRCUIT, AND METHOD FOR CONTRO...
- Publication number 20240339140
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- SANJEEV KUMAR JAIN
- G11 - INFORMATION STORAGE
Information Patent Application
Tracking Circuitry and Memory Devices Including the Same
- Publication number 20240339141
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORY
- Publication number 20240331741
- Publication date Oct 3, 2024
- SANDISK TECHNOLOGIES LLC
- Iris Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY, OPERATION METHOD OF MEMORY, AND MEMORY SYSTEM
- Publication number 20240331749
- Publication date Oct 3, 2024
- Yangtze Memory Technologies Co., Ltd.
- Chong Jin
- G11 - INFORMATION STORAGE
Information Patent Application
USING EMBEDDED SWITCHES FOR REDUCING CAPACITIVE LOADING ON A MEMORY...
- Publication number 20240331740
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Chia-Ta Yu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device and Method of Operating the Same
- Publication number 20240331750
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shiba Mohanty
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE LOGIC CIRCUIT AND METHOD
- Publication number 20240312501
- Publication date Sep 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shang-Chi WU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT ARCHITECTURE WITH MULTIPLEXING BETWEEN MEMORY BANKS
- Publication number 20240312496
- Publication date Sep 19, 2024
- QUALCOMM Incorporated
- Pradeep RAJ
- G11 - INFORMATION STORAGE
Information Patent Application
POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...
- Publication number 20240312500
- Publication date Sep 19, 2024
- SK HYNIX INC.
- Mino KIM
- G11 - INFORMATION STORAGE
Information Patent Application
High Speed Differential ROM
- Publication number 20240304223
- Publication date Sep 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Suresh Balasubramanian
- G11 - INFORMATION STORAGE
Information Patent Application
ACTIVE CURRENT CONSUMPTION SAVE MODE FOR NON-VOLATILE MEMORY USING...
- Publication number 20240296877
- Publication date Sep 5, 2024
- Western Digital Technologies, Inc.
- Ke Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES PROVIDING TEST MODE RELATED TO RELIABILITY
- Publication number 20240282350
- Publication date Aug 22, 2024
- SK HYNIX INC.
- Yun Suk HONG
- G11 - INFORMATION STORAGE

Bit line control circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory circuit and method of operating the same

Turbo mode SRAM for high performance

Bit-cell architecture based in-memory compute

Data reading/writing method, memory, storage apparatus, and terminal

Wordline system architecture supporting erase operation and I-V cha...

Memory device having switching device of page buffer and erase meth...

Semiconductor device configured to store parity data and method of...

Memory device

Computing-in-memory architecture

Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...

Memory device and electronic device

Memory device

Voltage amplifier based on cascaded charge pump boosting

Systems and methods for controlling power management operations in...

Sense amplifier, memory device and operation method thereof

Adjustable memory cell reliability management

Memory circuit with sense amplifier calibration mechanism

Memory device with selective precharging

Page buffer, memory device having page buffer, and method of operat...

Calibration methods and structures for partitioned memory architect...

Floating data line circuit and method

Semiconductor storage device and control method of semiconductor st...

Anti-fuse memory reading circuit with controllable reading time

Semiconductor integrated circuit

Drive circuit, method for driving drive circuit, and memory

Sense amplifier circuit and data read method

Apparatus and method for reading data based on a program status of...

Three-port SRAM cell and layout method

Memory array with programmable number of filters

Single column select architecture for sense amplifier circuity

Patents Applicationslast 30 patents

SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE

Pre-Charger Circuit of Memory Device and Methods For Operating The...

IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION

MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM

SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE C...

FLOATING DATA LINE CIRCUIT AND METHOD

VOLTAGE AMPLIFIER BASED ON CASCADED CHARGE PUMP BOOSTING

COMPUTE-IN-MEMORY CIRCUIT BASED ON CHARGE REDISTRIBUTION, AND CONTR...

APPARATUSES INCLUDING MULTIPLE READ MODES AND METHODS FOR SAME

CONTENT ADDRESSABLE MEMORY FOR LARGE SEARCH WORDS

SEMICONDUCTOR DEVICE

THREE-PORT SRAM CELL AND LAYOUT METHOD

PAGE BUFFER, SEMICONDUCTOR DEVICE INCLUDING PAGE BUFFER, AND OPERAT...

DYNAMIC SENSING LEVELS FOR NONVOLATILE MEMORY DEVICES

Memory and Read Circuit Thereof

CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD

FOUR-POLY-PITCH SRAM CELL WITH BACKSIDE METAL TRACKS

ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM

MEMORY DEVICE, READ CLOCK GENERATION CIRCUIT, AND METHOD FOR CONTRO...

Tracking Circuitry and Memory Devices Including the Same

NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORY

MEMORY, OPERATION METHOD OF MEMORY, AND MEMORY SYSTEM

USING EMBEDDED SWITCHES FOR REDUCING CAPACITIVE LOADING ON A MEMORY...

Semiconductor Device and Method of Operating the Same

BIT LINE LOGIC CIRCUIT AND METHOD

MEMORY CIRCUIT ARCHITECTURE WITH MULTIPLEXING BETWEEN MEMORY BANKS

POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...

High Speed Differential ROM

ACTIVE CURRENT CONSUMPTION SAVE MODE FOR NON-VOLATILE MEMORY USING...

SEMICONDUCTOR DEVICES PROVIDING TEST MODE RELATED TO RELIABILITY