Bump or bump-like direct electrical connections from substrate to substrate

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H01L2225/0652

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups

Current Industry

H01L2225/0652Bump or bump-like direct electrical connections from substrate to substrate

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Chip package and manufacturing method thereof
- Patent number 12,322,705
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chuei-Tang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer reconstitution and die-stitching
- Patent number 12,322,730
- Issue date Jun 3, 2025
- Apple Inc.
- Sanjay Dabral
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric Stackup Structure for SoC package substrates
- Patent number 12,322,721
- Issue date Jun 3, 2025
- Apple Inc.
- Yikang Deng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package using a coreless signal distribution structure
- Patent number 12,322,731
- Issue date Jun 3, 2025
- Amkor Technology Singapore Holding Pte Ltd.
- Do Hyung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device
- Patent number 12,315,844
- Issue date May 27, 2025
- Kioxia Corporation
- Tomoya Sanuki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and manufacturing method thereof
- Patent number 12,315,831
- Issue date May 27, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit device and electronic system including the same
- Patent number 12,302,576
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Jeeyong Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device and methods for forming the same
- Patent number 12,300,317
- Issue date May 13, 2025
- Yangtze Memory Technologies Co., Ltd.
- Mingkang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device package and method of manufacturing the same
- Patent number 12,300,560
- Issue date May 13, 2025
- Advanced Semiconductor Engineering, Inc.
- Ming-Han Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method
- Patent number 12,300,575
- Issue date May 13, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages and methods of forming the same
- Patent number 12,293,985
- Issue date May 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chia Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PSPI-based patterning method for RDL
- Patent number 12,288,781
- Issue date Apr 29, 2025
- STATS ChipPAC Pte. Ltd.
- ChangOh Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages
- Patent number 12,288,752
- Issue date Apr 29, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Symbiotic network on layers
- Patent number 12,283,572
- Issue date Apr 22, 2025
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Javier A. DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated voltage regulator and passive components
- Patent number 12,278,215
- Issue date Apr 15, 2025
- Adeia Semiconductor Inc.
- Javier A. Delacruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High bandwidth package structure
- Patent number 12,278,166
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Harry-Haklay Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device interface and method
- Patent number 12,277,056
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacking structure, package structure and method of fabricating the...
- Patent number 12,272,674
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package
- Patent number 12,272,652
- Issue date Apr 8, 2025
- Samsung Electronics Co., Ltd.
- Jiwon Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages
- Patent number 12,261,151
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Hao Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device interface and method
- Patent number 12,253,943
- Issue date Mar 18, 2025
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bond pads for semiconductor die assemblies and associated methods a...
- Patent number 12,255,163
- Issue date Mar 18, 2025
- Micron Technology, Inc.
- Bharat Bhushan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Secure semiconductor integration and method for making thereof
- Patent number 12,255,189
- Issue date Mar 18, 2025
- BroadPak Corporation
- Farhang Yazdani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming three-dimensional memory devices
- Patent number 12,255,181
- Issue date Mar 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Kun Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device
- Patent number 12,249,593
- Issue date Mar 11, 2025
- Nagase & Co., Ltd.
- Yoichiro Kurita
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimensional circuit implementing machine trained network
- Patent number 12,248,869
- Issue date Mar 11, 2025
- Adeia Semiconductor Inc.
- Steven L. Teig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices, systems, and methods for stacked die packages
- Patent number 12,243,850
- Issue date Mar 4, 2025
- Flex Ltd.
- Cheng Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Offset pads over TSV
- Patent number 12,243,851
- Issue date Mar 4, 2025
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Bongsub Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through stack bridge bonding devices and associated methods
- Patent number 12,237,301
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Chin Hui Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method for fabricating the same
- Patent number 12,237,253
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Jun Hyeong Park
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING CONDUCTIVE PAD WITH PROTRUSION AND M...
- Publication number 20250183208
- Publication date Jun 5, 2025
- NANYA TECHNOLOGY CORPORATION
- Yi-Jen LO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250185237
- Publication date Jun 5, 2025
- Samsung Electronics Co., Ltd.
- Changyoung Lee
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR PACKAGE WITH SYSTEM TEST RING
- Publication number 20250174500
- Publication date May 29, 2025
- MEDIATEK INC.
- Cing-Yao Jhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250174572
- Publication date May 29, 2025
- Samsung Electronics Co., Ltd.
- Hyun Ung Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Device Assembly in Computer System
- Publication number 20250165420
- Publication date May 22, 2025
- Rambus Inc.
- Scott C. Best
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PANEL LEVEL FABRICATION OF STACKED ELECTRONIC DEVICE PACKAGES WITH...
- Publication number 20250167083
- Publication date May 22, 2025
- NXP USA, Inc.
- Sharan Kishore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250167178
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Youngkun JEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER RECONSTITUTION AND DIE-STITCHING
- Publication number 20250157991
- Publication date May 15, 2025
- Apple Inc.
- Sanjay Dabral
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250157524
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Changyoung LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC ASSEMBLIES EMPLOYING COPPER IN MULTIPLE LOCATIONS
- Publication number 20250157969
- Publication date May 15, 2025
- Kuprion Inc.
- Alfred A. Zinn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STORAGE DEVICE
- Publication number 20250151294
- Publication date May 8, 2025
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Shunpei YAMAZAKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND RELATED METHODS
- Publication number 20250149512
- Publication date May 8, 2025
- SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Seungwon IM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PASSIVATION STRUCTURE WITH PLANAR TOP SURFACES
- Publication number 20250140627
- Publication date May 1, 2025
- TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.
- Yi-Hsiu Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLY FROM PROCESSED SUBSTRATE
- Publication number 20250125196
- Publication date Apr 17, 2025
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Cyprian Emeka Uzoh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
HONEYCOMB PATTERN FOR CONDUCTIVE FEATURES
- Publication number 20250118694
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shenggao Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT DIE-TWO-DIE CONNECTION THROUGH AN INTERPOSER WITHOUT VIAS
- Publication number 20250112191
- Publication date Apr 3, 2025
- Intel Corporation
- Thomas WAGNER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTU...
- Publication number 20250105181
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Jumyong PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
- Publication number 20250104761
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20250105216
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Jing Cheng LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250105116
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- JU-IL CHOI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHOD OF FABRICATING THE SAME
- Publication number 20250105117
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Sangseok HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OVERSIZED VIA AS THROUGH-SUBSTRATE-VIA (TSV) STOP LAYER
- Publication number 20250105098
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Min-Feng Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF HEATING SEMICONDUCTOR ST...
- Publication number 20250096102
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Kazuma HASEGAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STACKING STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20250096204
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
- Publication number 20250096203
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-Kang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING PACKAGE STRUCTURE
- Publication number 20250087648
- Publication date Mar 13, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jing-Cheng LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE-SIDED MULTICHIP PACKAGES WITH DIRECT DIE-TO-DIE COUPLING
- Publication number 20250079381
- Publication date Mar 6, 2025
- NXP USA, Inc.
- Michael B. Vincent
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES WITH THERMAL DISSIPATION
- Publication number 20250079261
- Publication date Mar 6, 2025
- UTAC Headquarters Pte. Ltd.
- IL Kwon SHIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL BONDING SCHEME AND ASSOCIATED SYSTEMS AND METHODS
- Publication number 20250079405
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Kelvin Tan Aik Boo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STIFFENER WITH INTEGRATED CONNECTORS
- Publication number 20250079276
- Publication date Mar 6, 2025
- ADVANCED MICRO DEVICES, INC.
- Manish DUBEY
- H01 - BASIC ELECTRIC ELEMENTS

Bump or bump-like direct electrical connections from substrate to substrate

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Chip package and manufacturing method thereof

Wafer reconstitution and die-stitching

Asymmetric Stackup Structure for SoC package substrates

Semiconductor package using a coreless signal distribution structure

Semiconductor memory device

Package structure and manufacturing method thereof

Integrated circuit device and electronic system including the same

Three-dimensional memory device and methods for forming the same

Semiconductor device package and method of manufacturing the same

Semiconductor package and method

Integrated circuit packages and methods of forming the same

PSPI-based patterning method for RDL

Semiconductor packages

Symbiotic network on layers

Integrated voltage regulator and passive components

High bandwidth package structure

Memory device interface and method

Stacking structure, package structure and method of fabricating the...

Semiconductor package

Integrated circuit packages

Memory device interface and method

Bond pads for semiconductor die assemblies and associated methods a...

Secure semiconductor integration and method for making thereof

Methods for forming three-dimensional memory devices

Electronic device

Three dimensional circuit implementing machine trained network

Devices, systems, and methods for stacked die packages

Offset pads over TSV

Through stack bridge bonding devices and associated methods

Semiconductor package and method for fabricating the same

Patents Applicationslast 30 patents

SEMICONDUCTOR STRUCTURE HAVING CONDUCTIVE PAD WITH PROTRUSION AND M...

SEMICONDUCTOR MEMORY DEVICE

SEMICONDUCTOR PACKAGE WITH SYSTEM TEST RING

SEMICONDUCTOR PACKAGE

Stacked Semiconductor Device Assembly in Computer System

PANEL LEVEL FABRICATION OF STACKED ELECTRONIC DEVICE PACKAGES WITH...

SEMICONDUCTOR PACKAGE

WAFER RECONSTITUTION AND DIE-STITCHING

SEMICONDUCTOR MEMORY DEVICE

ELECTRONIC ASSEMBLIES EMPLOYING COPPER IN MULTIPLE LOCATIONS

STORAGE DEVICE

SEMICONDUCTOR PACKAGE AND RELATED METHODS

PASSIVATION STRUCTURE WITH PLANAR TOP SURFACES

MICROELECTRONIC ASSEMBLY FROM PROCESSED SUBSTRATE

HONEYCOMB PATTERN FOR CONDUCTIVE FEATURES

DIRECT DIE-TWO-DIE CONNECTION THROUGH AN INTERPOSER WITHOUT VIAS

SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTU...

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGES AND METHOD OF FABRICATING THE SAME

OVERSIZED VIA AS THROUGH-SUBSTRATE-VIA (TSV) STOP LAYER

SEMICONDUCTOR STORAGE DEVICE AND METHOD OF HEATING SEMICONDUCTOR ST...

THREE-DIMENSIONAL STACKING STRUCTURE AND MANUFACTURING METHOD THEREOF

MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE

METHOD FOR FORMING PACKAGE STRUCTURE

DOUBLE-SIDED MULTICHIP PACKAGES WITH DIRECT DIE-TO-DIE COUPLING

SEMICONDUCTOR PACKAGES WITH THERMAL DISSIPATION

THREE-DIMENSIONAL BONDING SCHEME AND ASSOCIATED SYSTEMS AND METHODS

STIFFENER WITH INTEGRATED CONNECTORS