Patent Application
20250167083
Embodiments of the subject matter described herein relate to methods of forming packages for electronic devices that include multiple circuit boards or other substrates.
Electronic devices such as integrated circuits are often packaged in polymer or ceramic housings which can be designed to protect the devices from damage, help dissipate heat, and to provide macroscopic contacts that allow the devices to be coupled to other devices on printed circuit boards and other substrates. In some applications, it is desirable to provide a hollow or gas-filled cavity within a package to accommodate high-frequency components.
In an example embodiment, a method includes receiving a first substrate panel having an upper surface and lower surface and receiving a second substrate panel having an upper surface and lower surface. The first substrate panel includes a first circuit substrate and the second substrate panel includes a first interposer substrate having an aperture that passes through the first interposer substrate.
The method further includes bonding the lower surface of the second substrate panel to the upper surface of the first substrate panel such that the aperture of the first interposer substrate is positioned above the first circuit substrate on the upper surface of the first substrate panel; and bonding a first cover to the upper surface of second substrate panel such that a first cavity is formed between the first circuit substrate and the first cover.
The method further includes dicing channels in the second substrate panel that pass through the first interposer substrate and expose portions of the upper surface of the first substrate panel that surround the first circuit substrate. The method further includes dispensing a molding material in the channels in the second substrate panel such that aperture in the first interposer substrate is surrounded by the molding material. The method further includes producing a singulated device assembly by dicing through a portion of the molding material in the channels in the second substrate panel and through portions of the first substrate panel underneath the channels.
The singulated device assembly includes the first circuit substrate; the first interposer substrate bonded to an upper surface of the first circuit substrate at a lower surface of the first interposer substrate; and the first cover bonded to an upper surface of the first interposer substrate.
In another example embodiment, a method includes providing a panel assembly. The panel assembly includes a first substrate panel that includes a set of first circuit substrates that include electronic components; and a second substrate panel bonded above the first substrate panel that includes a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel.
The method further includes partially dicing the panel assembly to form channels that pass through the second substrate panel. The method further includes singulating the panel assembly into singulated circuit assemblies by dicing through a portion of the molding material in the channels that pass through the second substrate panel and dicing through the first substrate panel beneath the channels.
Each singulated circuit assembly includes a first circuit substrate; a first interposer substrate bonded above the first circuit substrate and including a first aperture disposed above a first portion of the first circuit substrate; a first cover bonded above the first aperture such that a first cavity is formed above the portion of the first circuit substrate; and molding material that at least partially surrounds the first interposer substrate.
In yet another example embodiment, a method includes providing a panel assembly including a first substrate panel and a second substrate panel. The first substrate panel includes a set of first circuit substrates that include electronic components and the second substrate panel is bonded above the first substrate panel. The second substrate panel includes a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel.
The method also includes partially dicing the panel assembly to form channels that pass through the second substrate panel. The method also includes singulating the panel assembly into singulated circuit assemblies by dicing through a portion of molding material in the channels that pass through the second substrate panel and dicing through the first substrate panel beneath the channels.
Each singulated circuit assembly includes a first circuit substrate that includes a thermally-conductive structure that passes through the first circuit substrate; a first interposer substrate bonded above the first circuit substrate and including a first aperture disposed above a first portion of the first circuit substrate; a first cover bonded above the first aperture such that a first cavity is formed above the portion of the first circuit substrate; and an electronic device disposed on an upper surface of the first circuit substrate and thermally coupled to a lower surface of the first circuit substrate via the thermally-conductive structure.
In one more embodiments, each singulated assembly further includes a portion of the molding material in the channels that pass through the second substrate panel that remains after dicing through the channels. In one or more embodiments, each singulated assembly further includes one or more electronic components disposed on or within the first circuit substrate that are electrically coupled to an electrical contact outside the first cavity via an electrical interconnect within the first interposer substrate. In one or more embodiments, the molding material electrically isolates electrically conductive structures of the first interposer substrate.
The present disclosure is illustrated by way of examples, embodiments and the like and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. The figures along with the detailed description are incorporated and form part of the specification and serve to further illustrate examples, embodiments and the like, and explain various principles and advantages, in accordance with the present disclosure, wherein:
The following detailed description provides examples for the purposes of understanding and is not intended to limit the invention or the application and uses of the same. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or the following detailed description.
For simplicity and clarity of illustration, the drawing figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the invention. Additionally, elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements or regions in the figures may be exaggerated relative to other elements or regions to help improve understanding of embodiments of the invention.
The terms “first,” “second,” “third,” “fourth” and the like in the description and the claims, if any, may be used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms “comprise,” “include,” “have” and any variations thereof, are intended to cover non-exclusive inclusions, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term “coupled,” as used herein, is defined as directly or indirectly connected in an electrical or non-electrical manner. As used herein the terms “substantial” and “substantially” mean sufficient to accomplish the stated purpose in a practical manner and that minor imperfections, if any, are not significant for the stated purpose.
Directional references such as “top,” “bottom,” “left,” “right,” “above,” “below,” and so forth, unless otherwise stated, are not intended to require any preferred orientation and are made with reference to the orientation of the corresponding figure or figures for purposes of illustration.
Unless explicitly stated otherwise, the use of terms “approximately,” “substantially” and similar terms in connection with dimensions, relative positioning, or orientation of various features indicates that the dimensions, positioning, or orientation of those features are subject to tolerances and/or expected process variations of equipment and processes chosen to form the described features. Unless explicitly stated otherwise, the use of terms “approximately,” “substantially” and similar terms in connection measurable values or characteristics is subject to the expected measurement accuracy of equipment and methods used to measure those values or characteristics and/or within tolerance limits specified by technical standards applicable to the technologies described.
It will be appreciated that the steps of various processes described herein are non-limiting examples of suitable processes according to embodiments and are for the purposes of illustration. Embodiments herein may use any suitable processes including those that omit steps described herein, perform those steps and similar steps in different orders, and the like. It will also be appreciated that well-known features and techniques may be omitted for clarity.
Conventional techniques for packaging and encapsulating electronic devices include methods in which components are stacked on top of each or otherwise occupy multiple levels. However, such methods often involve bonding of one or more discrete monolithic devices or packaged devices on a substrate or directly on another monolithic device or packaged device, which can have disadvantages. As one example, the performance of radio-frequency (RF), microwave (MW) and millimeter-wave (mmWave) devices may be impaired when such devices and/or related components coupled to those devices are surrounded by dielectric materials such as polymer molding materials due to signal losses caused by attenuation of high frequency signals due to absorption within the dielectric(s).
Accordingly, benefits of embodiments herein can include enabling cost-effective manufacturing of multilevel electronic device assemblies with cavities above sensitive components that can be gas-filled, evacuated, or filled with other materials to achieve desired performance characteristics. Stacked assemblies according to one or more embodiments can have any suitable number of levels and devices on different levels can be isolated or interconnected as desired by way of interposer substrates which can include interconnections between layers and can also form part of metallic shield structures suitable for isolating selected layers or devices from electromagnetic interference.
Along these lines,
A carrier such as the carrier 120 can include active and passive electronic devices on its surfaces (e.g., the lower surface 121 and the upper surface 122). Such carriers can include electrically conductive interconnects such as the interconnects 115 disposed within the carrier and on its upper and lower surfaces. As shown, interconnects such as the interconnects 115 can include metalized pads such as those shown on the lower surface 121 and/or the upper surface 122 of the carrier 120 and electronic devices (which can include active devices, passive devices, or both in any suitable arrangements) can be coupled to such pads using any suitable methods to the interconnects. As examples, electronic devices 102 (e.g., semiconductor device die) are shown wire-bonded to interconnects 115 at the upper surface 122 of the carrier 120. As further examples, passive components 106 (e.g., discrete resistors, capacitors, inductors, and the like) are shown with metallic contacts bonded to interconnects on the upper surface 122 of the carrier 120. As a further example an electronic devices 108 is depicted with metal pillars bonded to interconnects 115 on the upper surface 122 of the carrier 120.
A carrier such as the carrier 120 can be mechanically coupled to other structures (e.g., the cover 190) in a stacked arrangement by way of an interposer substrate, or “interposer” (e.g., the interposer 150 shown). Interposer substrates can include electrical interconnects 155 and can be bonded or otherwise mechanically coupled between adjacent structures (e.g., between the carrier 120 and the cover 190 or between two carriers as described below in connection with
In one or more embodiments, a carrier such as the carrier 120 is also electrically coupled to one or more other such carriers in an assembly such as the assembly 200 of
It will be appreciated that when a carrier (e.g., the carrier 120) is coupled to a lidded interposer (e.g., the interposer 150 having the aperture 159 that passes through it to which the cover 190 has been bonded) or when two or more carriers (e.g., carriers 120) are mechanically coupled to each other via interposers (e.g., interposers 150), a cavity can be formed between two adjacent carriers (e.g., the cavity 180 of
In one or more embodiments, an interposer such as the interposer 150 is surrounded by one or more volumes of molding material (e.g., the molding material 175, shown in
As shown in
It will be appreciated that the assembly 200 is a non-limiting example and that embodiments herein can include any suitable number of carriers and interposers and fabricated from any suitable materials and including any number and type of suitable devices. In other words, assemblies fabricated according to embodiments herein can include two are more “tiers”, each of which may be populated on one or both surfaces with any suitable components.
Each carrier (e.g., a carrier 120, 220) can include active and passive electronic devices on its lower surface, upper surface, or both surfaces. Each carrier can include electrically conductive interconnects (e.g., interconnects 115, 215) disposed within the carrier and on its top and lower surfaces. As shown, interconnects 115 can include metalized pads on the lower surface 121 and/or the upper surface 122 of the carrier 120 and electronic devices (which can include active devices, passive devices, or both in any suitable arrangements) can be coupled to such pads using any suitable methods to interconnects 115. Components or other structures on or within the carrier substrate 120 can be electrically coupled to components on or within the carrier 220 by way of the interconnects 155 of the interposer 150 and interconnects 215 of the carrier 220.
The carriers 120, 220 are mechanically coupled to each other in a stacked arrangement by way of the interposer 150. In the example of
It will be appreciated that when two or more carriers (e.g., carriers 120) are mechanically coupled to each other via interposers (e.g., interposers 150), a cavity can be formed between the two carriers (e.g., the cavity 280 between the carrier 120 and the carrier 220). When compared to other approaches in which a single circuit substrate is sealed in a lidded package to create a hollow or gas-filled cavity, embodiments herein allow such cavities to be incorporated into high density packages with multiple circuit layers (e.g., multiple carriers 120 or 220) and to be manufactured in high-volume processes as will be described further below. Furthermore, an assembly such as the assembly 200 may include multiple hollow or gas-filled cavities separated from each other by portions of an interposer substrate.
It will be understood that the assemblies 100, 200 and other assemblies depicted herein are for purposes of illustration and may show elements which are omitted in certain embodiments or show elements which are absent and that elements may be added or omitted purely to provide illustrative examples. Along these lines, in embodiments described herein, interconnects (e.g., interconnects 115 and interconnects 155) can be arranged in any suitable manner. For instance, as shown in
The process 300 is an example of a so-called panel level process in which multiple discrete (or “singulated”) substrates or assemblies are fabricated in parallel from larger substrates (“panels”). For ease of understanding the process 300 is described with reference to formation of two discrete assemblies 100(1) and 100(2) (e.g., assemblies 100). However, it will be understood that in processes according to embodiments herein, many more than two assemblies may be produced and also that individual assemblies need not be identical to each other and can differ in their layouts and/or components.
At step 310, an assembly is provided which is formed for by a first substrate panel 312 which includes two or more carriers (e.g., two identical carriers 120, as shown in
At step 320, the panel 315 is diced to singulate the individual interposers 150 from each other as shown, without dicing the underlying panel 312. Alternatively, in one or more embodiments, a panel such as the panel 312 may be partially diced, without separating the panel 312 into individual carriers.
At step 330, the interposers 150 are molded by dispensing or otherwise forming volumes of a molding material (e.g., the molding material 175) surrounding the singulated interposers 150. In one or more embodiments, the molding material fills voids between the interposers 150 and the (to be singulated) carriers 120 of the panel 312. Any suitably flowable material or combination of materials may be used as molding materials such as the molding material 175 according to embodiments herein. For example, polymer materials, including adhesives, liquid crystal polymers and other materials may all be used.
At step 340, the assemblies 100 represented by the assembly 100(1) and the assembly 100(2) are fully singulated by dicing through the volume of molding material between each interposer 150 and through the panel 312. Any suitable method or combination of methods can be used to dice or singulated the assemblies 100 including the use of wafer sawing, laser cutting or scoring, water jetting, and the like as nonlimiting examples. As one non-limiting example one or more carriers or interposers may be formed from ceramic materials such as alumina, aluminum nitride, barium titanate and the long and can include conductive traces formed by direct bonding of copper or other methods. Such substrates can benefit from laser scoring followed by cleaving to singulate individual substrates from each other.
It will be appreciated that, in embodiments which include an interposer such as the interposer 450 or related interposers, pins and sockets may be arranged in any suitable manner. For instance, an interposer may have only sockets on both surfaces and the corresponding pins may be disposed on the carriers. Alternatively, a carrier (e.g., a carrier 420) and/or an interposer (e.g., the interposer 450) may have both sockets (e.g., a socket 426 or 456) and pins (e.g., pins 427 or 457) on one or both of top and lower surfaces, distributed in any suitable arrangement. It will be understood that assemblies such as the assembly 400 and related assemblies can be fabricated in bulk using panel level processes such as the process 300 or similar processes.
As above, “multi-tier” packages can be fabricated according to embodiments herein.
The assembly 500 includes molding material 575 (e.g., molding material 175 or 475) that can seal gaps between the interposers 550 (i.e., the interposers 550A and 550B) and the carriers 520 (i.e., the carriers 520A, 520B, and 520C). It will be understood that, in one or more embodiments, molding material such as the molding material 575 can be applied around all substrates in a tiered assembly such as the assembly 500 (i.e., the molding material can also surround the sides of the carrier 520C and/or extend onto all or part of the upper surface 522C of the carrier 520C and/or extended onto all or part of the lower surface 521A of the carrier 520A). Similarly, in one or more embodiments, molding material such as the molding material 575 is selectively applied to or more substrates or interfaces between substrates (e.g., at an interface between an interposer 550 and a carrier 520).
Multi-tiered assemblies such as the assembly 500 and other assemblies with two or more tiers can be fabricated in panel-level processes related to the process 300 of
As shown in
It will be understood that interposers according to embodiments herein are described for purposes of illustration as continuous substrates provided with apertures (e.g., apertures 159 or 459) are intended as nonlimiting examples. For instance, in one or more embodiments, an interposer (e.g., an interposer 150, 450, 550, or 650) is formed from individual interposer units (which may be referred to as “bricks” or “blocks”) which are individually bonded to carriers (e.g., carriers 120, 420, 520, or 620) which can be bonded together by a molding material or other adhesive material. In one or more embodiments such embodiments, individual units are molded to form a single interposer substrate prior to being bonded to one or more carriers, whereas in one or more such embodiments, individual interposer units are molded together after they are bonded to one or more carriers.
Features of embodiments may be understood by way of one or more of the following examples:
Example 1: a method or device that includes a first substrate panel having an upper surface and lower surface, the first substrate panel including a first circuit substrate; and a second substrate panel having an upper surface and lower surface that includes a first interposer substrate having an aperture that passes through the first interposer substrate. The lower surface of the second substrate panel is bonded the upper surface of the first substrate panel such that the aperture of the first interposer substrate is positioned above the first circuit substrate on the upper surface of the first substrate panel. A first is bonded cover to the upper surface of second substrate panel such that a first cavity is formed between the first circuit substrate and the first cover. Channels are diced in the second substrate panel that pass through the first interposer substrate and expose portions of the upper surface of the first substrate panel that surround the first circuit substrate. A molding material is dispensed in the channels in the second substrate panel such that aperture in the first interposer substrate is surrounded by the molding material.
A singulated device assembly is produced by dicing through a portion of the molding material in the channels in the second substrate panel and through portions of the first substrate panel underneath the channels. The singulated device assembly includes the first circuit substrate; the first interposer substrate bonded to an upper surface of the first circuit substrate at a lower surface of the first interposer substrate; and the first cover bonded to an upper surface of the first interposer substrate.
Example 2: The device or method of Examples 1, where the portion of the molding material that surrounds the first cavity seals gaps between the first interposer substrate and the first circuit substrate.
Example 3: The device or method of Example 1 or Example 2 where first cover is formed by bonding a lower surface of a third substrate panel to the upper surface of the second substrate panel, the third substrate panel including a second circuit substrate disposed above the aperture in the first interposer substrate; and the singulated device assembly further includes the second circuit substrate bonded to the upper surface of the first interposer substrate.
Example 4: The device or method of any of Examples 1-3 where one or more electrical components are bonded and electrically coupled to a lower surface of the second circuit substrate that is also bonded to the first interposer substrate.
Example 5: The device or method of any of Examples 1˜4 where a first electronic component bonded to the second circuit substrate is electrically coupled to first circuit substrate via the first interposer substrate.
Example 6: The device or method of any of Examples 3-5, also includes a fourth substrate panel having an upper surface and a lower surface, the fourth substrate panel including a second interposer substrate with an aperture that passes through the second interposer substrate; and fifth substrate panel having an upper surface and a lower surface, the fifth substrate panel including a third circuit substrate.
The lower surface of the fourth substrate panel is bonded to the upper surface of the third substrate panel such that the aperture in the second interposer substrate is disposed above the second circuit substrate. The lower surface of the fifth substrate panel is bonded to the upper surface of the fourth substrate panel such that a second cavity is formed between the second circuit substrate and the third circuit substrate. Channels are diced that pass through the fifth substrate panel and the fourth substrate panel and separate the third circuit substrate from the fifth substrate panel and the separate the second interposer substrate from the fourth substrate panel.
The molding material is dispensed in the channels in the fourth substrate panel such that aperture in the second interposer substrate is surrounded by the molding material and producing the singulated device assembly further includes dicing through a portion of the molding material in the channels in the fourth substrate panel and in the channels in the fifth substrate panel.
The singulated device assembly further includes the second interposer substrate; the third circuit substrate bonded to the second interposer substrate; and the second cavity disposed between the third circuit substrate and the second interposer substrate.
Example 7: The device or method of Example 1 that also includes a third substrate panel having an upper surface and a lower surface, the third substrate panel including a second interposer substrate with an aperture that passes through the second interposer substrate.
The lower surface of the third substrate panel is bonded to the upper surface of the second substrate panel such that the aperture in the second interposer substrate is disposed above the first cover and a second cover is bonded to the upper surface of the fourth substrate panel such that a second cavity is formed between the second interposer substrate and the second cover. Channels are diced that pass through the third substrate panel that separate the second interposer substrate from the third substrate panel.
The molding material is dispensed in the channels in the third substrate panel such that aperture in the second interposer substrate is surrounded by the molding material and producing the singulated device assembly further includes dicing through a portion of the molding material in the channels in the third substrate panel. The singulated device assembly further includes the second interposer substrate; the second cover bonded to the second interposer substrate; and the second cavity disposed between the second cover and the second interposer substrate.
Example 8: The device or method of Example 7 where the first cover is formed by a second circuit substrate.
Example 9: A device or method in which a panel assembly that includes a first substrate panel that includes a set of first circuit substrates that include electronic components; and a second substrate panel bonded above the first substrate panel that includes a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel. The panel assembly is partially diced to form channels that pass through the second substrate panel. The panel assembly is singulated into singulated circuit assemblies by dicing through a portion of the molding material in the channels that pass through the second substrate panel and dicing through the first substrate panel beneath the channels.
Each singulated circuit assembly includes a first circuit substrate; a first interposer substrate bonded above the first circuit substrate and including a first aperture disposed above a first portion of the first circuit substrate; a first cover bonded above the first aperture such that a first cavity is formed above the portion of the first circuit substrate; and molding material that at least partially surrounds the first interposer substrate.
Example 10: The device or method of Examples 9 in channels that pass through the second substrate panel are filled with the molding material.
Example 11: The device or method of any of Example 9 or Example 10, where the molding material seals gaps between the first interposer substrate and the first circuit substrate.
Example 12: The device or method of any of Examples 9-11 where the molding material electrically isolates electrical interconnections between the first interposer substrate and the first circuit substrate.
Example 13: The device or method of any of Examples 9-12, where the first cover of each singulated circuit assembly is formed by a second circuit substrate bonded above the first interposer substrate.
Example 14: The device or method of any of Examples 9-13, where the panel assembly also includes a third substrate panel bonded above the second substrate panel that includes a set of second interposer substrates having apertures disposed above corresponding first circuit substrates of the first substrate panel; and a fourth substrate panel that includes a set of second circuit substrates bonded to the third substrate panel above the apertures of the second interposer substrates;
Each singulated circuit assembly also includes a second interposer substrate bonded above the first cover and including a second aperture disposed above the first cover; and a second circuit substrate bonded above the second interposer substrate such that a second cavity is formed above the first cover.
Example 15: The device or method of any of Examples 9-14 where the first cover of each singulated circuit assembly is formed by a third circuit substrate bonded between the first interposer substrate and the second interposer substrate.
Example 16: The device or method of any of Examples 9-15, where the panel assembly further includes a third substrate panel that includes a set of second circuit substrates; and dicing through a portion of the third substrate panel above the channels that pass through the second substrate panel. The cover of each singulated circuit assembly is formed by a corresponding second circuit substrate of the set of second circuit substrates.
Example 17: The device or method of any of Examples 9-16, where the third substrate panel is bonded to the second substrate panel.
Example 18: the device or method of any of Examples 9-17, where the panel assembly also includes a third substrate panel bonded above the second substrate panel that includes a set of second circuit substrates that form the first cover of each singulated circuit assembly; a fourth substrate panel that includes a set of second interposer substrates having apertures disposed above corresponding second circuit substrates of the second substrate panel; and a fifth substrate panel that includes a set of third circuit substrates bonded to the fourth substrate panel above the apertures of the second interposer substrates.
Each singulated circuit assembly also includes a second interposer substrate bonded above the second circuit substrate and including a second aperture disposed above second circuit substrate; and a third circuit substrate bonded above the second interposer substrate such that a second cavity is formed above second circuit substrate.
Example 19: A device or method that includes a panel assembly including a first substrate panel that includes a set of first circuit substrates that include electronic components; and a second substrate panel bonded above the first substrate panel that includes a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel.
The panel assembly is partially diced to form channels that pass through the second substrate panel. The panel assembly is singulated into singulated circuit assemblies by dicing through a portion of molding material in the channels that pass through the second substrate panel and dicing through the first substrate panel beneath the channels.
Each singulated circuit assembly includes a first circuit substrate that includes a thermally-conductive structure that passes through the first circuit substrate; a first interposer substrate bonded above the first circuit substrate and including a first aperture disposed above a first portion of the first circuit substrate; a first cover bonded above the first aperture such that a first cavity is formed above the portion of the first circuit substrate; and an electronic device disposed on an upper surface of the first circuit substrate and thermally coupled to a lower surface of the first circuit substrate via the thermally-conductive structure.
Example 20: The device or method of Example 19, where each singulated assembly further includes one or more electronic components disposed on or within the first circuit substrate that are electrically coupled to an electrical contact outside the first cavity via an electrical interconnect within the first interposer substrate.
Example 21: The device or method of Example 19 or Example 20 where each singulated assembly also includes a portion of the molding material in the channels that pass through the second substrate panel that remains after dicing through the channels; and the molding material electrically isolates electrically conductive structures of the first interposer substrate.
The preceding detailed description and examples are merely illustrative in nature and are not intended to limit the embodiments of the subject matter or the application and uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no Intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or detailed description.
It should be understood that this invention is not limited in its application to the details of construction and the arrangement of components set forth in the preceding description or illustrated in the accompanying drawings. The invention is capable of other embodiments and of being practiced or of being carried out in various ways. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting. The use of “including,” “comprising,” or “having” and variations thereof herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Unless specified or limited otherwise, the terms “mounted,” “connected,” “supported,” and “coupled” and variations thereof are used broadly and encompass both direct and indirect mountings, connections, supports, and couplings. Further, “connected” and “coupled” are not restricted to physical or mechanical connections or couplings.
The preceding discussion is presented to enable a person skilled in the art to make and use embodiments of the invention. Various modifications to the illustrated embodiments will be readily apparent to those skilled in the art, and the generic principles herein can be applied to other embodiments and applications without departing from embodiments of the invention. Thus, embodiments of the invention are not intended to be limited to embodiments shown, but are to be accorded the widest scope consistent with the principles and features disclosed herein. The preceding detailed description is to be read with reference to the figures, in which like elements in different figures have like reference numerals. The Figures, which are not necessarily to scale, depict selected embodiments and are not intended to limit the scope of embodiments of the invention. Skilled artisans will recognize the examples provided herein have many useful alternatives and fall within the scope of embodiments of the invention.
The connecting lines shown in the various figures contained herein are intended to represent exemplary functional relationships and/or physical couplings between the various elements. It should be noted that many alternative or additional functional relationships or physical connections may be present in one or more embodiments of the subject matter. In addition, certain terminology may also be used herein for the purpose of reference only, and thus are not intended to be limiting, and the terms “first,” “second” and other such numerical terms referring to structures do not imply a sequence or order unless clearly indicated by the context.
The foregoing description refers to elements or nodes or features being “connected” or “coupled” together. As used herein, unless expressly stated otherwise, “connected” means that one element is directly joined to (or directly communicates with) another element, and not necessarily mechanically. Likewise, unless expressly stated otherwise, “coupled” means that one element is directly or indirectly joined to (or directly or indirectly communicates with, electrically or otherwise) another element, and not necessarily mechanically. Thus, although the schematic shown in the figures depict one exemplary arrangement of elements, additional intervening elements, devices, features, or components may be present in one or more embodiments of the depicted subject matter.
