Generation of test inputs

Industry

CPC
G01R31/3183

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/3183Generation of test inputs

Industries

Patents Grantslast 30 patents

Information Patent Grant
Integrating machine learning delay estimation in FPGA-based emulati...
- Patent number 12,140,628
- Issue date Nov 12, 2024
- Synopsys, Inc.
- Yanhua Yi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device under test synchronization with automated test equipment che...
- Patent number 12,140,632
- Issue date Nov 12, 2024
- Synopsys, Inc.
- Yongkang Hu
- G01 - MEASURING TESTING
Information Patent Grant
Multiple clock and clock cycle selection for x-tolerant logic built...
- Patent number 12,117,488
- Issue date Oct 15, 2024
- Synopsys, Inc.
- Peter Wohl
- G01 - MEASURING TESTING
Information Patent Grant
System and method for access control of a plurality of instruments...
- Patent number 12,111,356
- Issue date Oct 8, 2024
- Erik Larsson
- G01 - MEASURING TESTING
Information Patent Grant
Secure testing mode
- Patent number 12,105,139
- Issue date Oct 1, 2024
- Advanced Micro Devices, Inc.
- Vidyashankar Viswanathan
- G01 - MEASURING TESTING
Information Patent Grant
Virtual quality control interpolation and process feedback in the p...
- Patent number 12,105,137
- Issue date Oct 1, 2024
- SanDisk Technologies LLC
- Yusuke Ikawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan compression through pin data encoding
- Patent number 12,105,145
- Issue date Oct 1, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Grant
Emulation of JTAG/SCAN test interface protocols using SPI communica...
- Patent number 12,092,690
- Issue date Sep 17, 2024
- SILICONCH SYSTEMS PVT LTD
- Rakesh Kumar Polasa
- G01 - MEASURING TESTING
Information Patent Grant
Scan tree construction
- Patent number 12,092,691
- Issue date Sep 17, 2024
- Tsinghua University
- Can Xiang
- G01 - MEASURING TESTING
Information Patent Grant
System and method for device under test (DUT) validation reuse acro...
- Patent number 12,078,676
- Issue date Sep 3, 2024
- MARVELL ASIA PTE. LTD.
- Nimalan Siva
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor package test apparatus and method
- Patent number 12,072,370
- Issue date Aug 27, 2024
- Samsung Electronics Co., Ltd.
- Sung Ok Kim
- G01 - MEASURING TESTING
Information Patent Grant
Embedded PHY (EPHY) IP core for FPGA
- Patent number 12,066,488
- Issue date Aug 20, 2024
- SanDisk Technologies, Inc.
- Doron Ganon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and devices for high-speed input/output margin te...
- Patent number 12,055,584
- Issue date Aug 6, 2024
- Tektronix, Inc.
- Daniel S. Froelich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decompression circuit, circuit generation method, and IC chip
- Patent number 12,050,248
- Issue date Jul 30, 2024
- Huawei Technologies Co., Ltd.
- Yu Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Silicon test structures for separate measurement of NMOS and PMOS t...
- Patent number 12,044,732
- Issue date Jul 23, 2024
- NVIDIA Corporation
- Prashant Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid solver for integrated circuit diagnostics and testing
- Patent number 12,038,478
- Issue date Jul 16, 2024
- Xerox Corporation
- Aleksandar B. Feldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stress-testing electrical components using telemetry modeling
- Patent number 12,038,479
- Issue date Jul 16, 2024
- Cisco Technology, Inc.
- James Edwin Turman
- G01 - MEASURING TESTING
Information Patent Grant
System for testing antenna-in-package modules and method for using...
- Patent number 12,025,657
- Issue date Jul 2, 2024
- Ohmplus Technology Inc.
- Hsi-Tseng Chou
- G01 - MEASURING TESTING
Information Patent Grant
Method for semiconductor device interface circuitry functionality a...
- Patent number 12,025,663
- Issue date Jul 2, 2024
- Celerint, LLC
- Howard H. Roberts
- G01 - MEASURING TESTING
Information Patent Grant
Programmable test compression architecture input/output shift regis...
- Patent number 12,013,434
- Issue date Jun 18, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for integrated circuit testing
- Patent number 12,007,439
- Issue date Jun 11, 2024
- Winbond Electronics Corp.
- Kuo-Min Liao
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit including test circuit and method of manufacturi...
- Patent number 12,000,888
- Issue date Jun 4, 2024
- Samsung Electronics Co., Ltd.
- Changho Han
- G01 - MEASURING TESTING
Information Patent Grant
Electronic device test method and test device
- Patent number 11,994,558
- Issue date May 28, 2024
- Realtek Semiconductor Corp.
- Han-Yun Tsai
- G11 - INFORMATION STORAGE
Information Patent Grant
Tests for integrated circuit (IC) chips
- Patent number 11,994,559
- Issue date May 28, 2024
- Texas Instruments Incorporated
- Lakshmanan Balasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification of hardware design for data transformation component
- Patent number 11,995,386
- Issue date May 28, 2024
- Imagination Technologies Limited
- Sam Elliott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connecting random variables to coverage targets using an ensemble o...
- Patent number 11,983,474
- Issue date May 14, 2024
- Synopsys, Inc.
- Parijat Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic tester and testing method
- Patent number 11,971,450
- Issue date Apr 30, 2024
- Rohde & Schwarz GmbH & Co. KG
- Yi Jin
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods of testing adverse device conditions
- Patent number 11,965,927
- Issue date Apr 23, 2024
- Apple Inc.
- Jay Mayur Khandhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-die debug stop clock trigger
- Patent number 11,946,969
- Issue date Apr 2, 2024
- Apple Inc.
- Charles J. Fleckenstein
- G01 - MEASURING TESTING
Information Patent Grant
Test architecture for electronic circuits, corresponding device and...
- Patent number 11,940,492
- Issue date Mar 26, 2024
- STMicroelectronics S.r.l.
- Lorenzo Re Fiorentin
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION
- Publication number 20240385241
- Publication date Nov 21, 2024
- STMicroelectronics International N.V.
- Sandeep JAIN
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATED TEST EQUIPMENT, DEVICE UNDER TEST, TEST SETUP METHODS USI...
- Publication number 20240369615
- Publication date Nov 7, 2024
- Advantest Corporation
- Klaus-Dieter HILLIGES
- G01 - MEASURING TESTING
Information Patent Application
Embedded PHY (EPHY) IP Core for FPGA
- Publication number 20240369628
- Publication date Nov 7, 2024
- SANDISK TECHNOLOGIES, INC.
- Doron GANON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SEMICONDUCTOR DEVICE INTERFACE CIRCUITRY FUNCTIONALITY A...
- Publication number 20240361386
- Publication date Oct 31, 2024
- CELERINT, LLC.
- Howard H. ROBERTS
- G01 - MEASURING TESTING
Information Patent Application
OPTICAL TUNING TEST SYSTEM USING PARALLEL OVEN PIPELINES WITH PARAL...
- Publication number 20240353491
- Publication date Oct 24, 2024
- Tektronix, Inc.
- John J. Pickerd
- G01 - MEASURING TESTING
Information Patent Application
TECHNOLOGIES FOR AUTOMATED TEST PATTERN GENERATION FOR LOGIC CIRCUI...
- Publication number 20240353488
- Publication date Oct 24, 2024
- Auburn University
- Ujjwal Guin
- G01 - MEASURING TESTING
Information Patent Application
TESTING SYSTEM AND TESTING METHOD
- Publication number 20240345164
- Publication date Oct 17, 2024
- ASMedia Technology Inc.
- Te-Ming Kung
- G01 - MEASURING TESTING
Information Patent Application
Method and System of Developing and Executing Test Program for Veri...
- Publication number 20240337683
- Publication date Oct 10, 2024
- Microtest S.p.A.
- Giuseppe AMELIO
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGISTER
- Publication number 20240337691
- Publication date Oct 10, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Utilizing Idle Computing Capacity
- Publication number 20240329133
- Publication date Oct 3, 2024
- Tapster Robotics, Inc.
- Jason Randolph Huggins
- G01 - MEASURING TESTING
Information Patent Application
VERIFICATION OF HARDWARE DESIGN FOR DATA TRANSFORMATION COMPONENT
- Publication number 20240320407
- Publication date Sep 26, 2024
- Imagination Technologies Limited
- Sam Elliott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN SELF-TEST ENHANCEMENTS
- Publication number 20240319268
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Gaurav VERMA
- B60 - VEHICLES IN GENERAL
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND EVALUATION SYSTEM
- Publication number 20240319271
- Publication date Sep 26, 2024
- Rohm Co., Ltd.
- Hideki Miyoshi
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...
- Publication number 20240302432
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Hobin SONG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FORWARD ERROR CORRECTION (FEC) ENCODED PHYSICAL LAYER TEST PATTERN
- Publication number 20240248135
- Publication date Jul 25, 2024
- Cisco Technology, Inc.
- Fabio Bottoni
- G01 - MEASURING TESTING
Information Patent Application
EMULATION OF JTAG/SCAN TEST INTERFACE PROTOCOLS USING SPI COMMUNICA...
- Publication number 20240219464
- Publication date Jul 4, 2024
- SILICONCH SYSTEMS PVT LTD
- Rakesh Kumar POLASA
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR INTEGRATED CIRCUIT TESTING
- Publication number 20240219465
- Publication date Jul 4, 2024
- WINBOND ELECTRONICS CORP.
- Kuo-Min Liao
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATED TEST PATTERN GENERATION FOR TESTING DESIGN REDACTING RECO...
- Publication number 20240201257
- Publication date Jun 20, 2024
- University of Florida Research Foundation, Incorporated
- Greg M. Stitt
- G01 - MEASURING TESTING
Information Patent Application
METHOD, DEVICE, AND SYSTEM FOR DETECTING FUSE CONFIGURATION FOR TRI...
- Publication number 20240159827
- Publication date May 16, 2024
- Samsung Electronics Co., Ltd.
- Jaecheol Lee
- G01 - MEASURING TESTING
Information Patent Application
TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...
- Publication number 20240159828
- Publication date May 16, 2024
- SK HYNIX INC.
- Jin Suk OH
- G01 - MEASURING TESTING
Information Patent Application
Scan Tree Construction
- Publication number 20240151771
- Publication date May 9, 2024
- TSINGHUA UNIVERSITY
- Can Xiang
- G01 - MEASURING TESTING
Information Patent Application
Automatic Test Pattern Generation-Based Circuit Verification Method...
- Publication number 20240125850
- Publication date Apr 18, 2024
- Huawei Technologies Co., Ltd
- Huiling Zhen
- G01 - MEASURING TESTING
Information Patent Application
DEEP LEARNING-BASED MLCC STACKED ALIGNMENT INSPECTION SYSTEM AND ME...
- Publication number 20240103076
- Publication date Mar 28, 2024
- Korea University of Technology and Education Industry-University Cooperation...
- Heung-Seon OH
- G01 - MEASURING TESTING
Information Patent Application
LOW POWER ENVIRONMENT FOR HIGH PERFORMANCE PROCESSOR WITHOUT LOW PO...
- Publication number 20240094287
- Publication date Mar 21, 2024
- Advantest Corporation
- Edmundo De La Puente
- G01 - MEASURING TESTING
Information Patent Application
Integrating Machine Learning Delay Estimation in FPGA-Based Emulati...
- Publication number 20240094290
- Publication date Mar 21, 2024
- Synopsys, Inc.
- Yanhua Yi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRESS-TESTING ELECTRICAL COMPONENTS USING TELEMETRY MODELING
- Publication number 20240085477
- Publication date Mar 14, 2024
- Cisco Technology, Inc.
- James Edwin Turman
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS
- Publication number 20240087668
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ankita Patidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR USING A TESTBED T...
- Publication number 20240069099
- Publication date Feb 29, 2024
- KEYSIGHT TECHNOLOGIES, INC.
- Christian Paul Sommers
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR ACCESS CONTROL OF A PLURALITY OF INSTRUMENTS...
- Publication number 20240061041
- Publication date Feb 22, 2024
- Erik Larsson
- G01 - MEASURING TESTING
Information Patent Application
CONTAINERIZED ORCHESTRATION OF SECURE SOCKET LAYER VIRTUAL PRIVATE...
- Publication number 20240036112
- Publication date Feb 1, 2024
- AT&T INTELLECTUAL PROPERTY I, L.P.
- Elmer Cruz
- G01 - MEASURING TESTING

Generation of test inputs

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Integrating machine learning delay estimation in FPGA-based emulati...

Device under test synchronization with automated test equipment che...

Multiple clock and clock cycle selection for x-tolerant logic built...

System and method for access control of a plurality of instruments...

Secure testing mode

Virtual quality control interpolation and process feedback in the p...

Scan compression through pin data encoding

Emulation of JTAG/SCAN test interface protocols using SPI communica...

Scan tree construction

System and method for device under test (DUT) validation reuse acro...

Semiconductor package test apparatus and method

Embedded PHY (EPHY) IP core for FPGA

Systems, methods, and devices for high-speed input/output margin te...

Decompression circuit, circuit generation method, and IC chip

Silicon test structures for separate measurement of NMOS and PMOS t...

Hybrid solver for integrated circuit diagnostics and testing

Stress-testing electrical components using telemetry modeling

System for testing antenna-in-package modules and method for using...

Method for semiconductor device interface circuitry functionality a...

Programmable test compression architecture input/output shift regis...

Method and apparatus for integrated circuit testing

Integrated circuit including test circuit and method of manufacturi...

Electronic device test method and test device

Tests for integrated circuit (IC) chips

Verification of hardware design for data transformation component

Connecting random variables to coverage targets using an ensemble o...

Electronic tester and testing method

Systems and methods of testing adverse device conditions

Multi-die debug stop clock trigger

Test architecture for electronic circuits, corresponding device and...

Patents Applicationslast 30 patents

CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION

AUTOMATED TEST EQUIPMENT, DEVICE UNDER TEST, TEST SETUP METHODS USI...

Embedded PHY (EPHY) IP Core for FPGA

METHOD FOR SEMICONDUCTOR DEVICE INTERFACE CIRCUITRY FUNCTIONALITY A...

OPTICAL TUNING TEST SYSTEM USING PARALLEL OVEN PIPELINES WITH PARAL...

TECHNOLOGIES FOR AUTOMATED TEST PATTERN GENERATION FOR LOGIC CIRCUI...

TESTING SYSTEM AND TESTING METHOD

Method and System of Developing and Executing Test Program for Veri...

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGISTER

System and Method for Utilizing Idle Computing Capacity

VERIFICATION OF HARDWARE DESIGN FOR DATA TRANSFORMATION COMPONENT

BUILT-IN SELF-TEST ENHANCEMENTS

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND EVALUATION SYSTEM

BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...

FORWARD ERROR CORRECTION (FEC) ENCODED PHYSICAL LAYER TEST PATTERN

EMULATION OF JTAG/SCAN TEST INTERFACE PROTOCOLS USING SPI COMMUNICA...

METHOD AND APPARATUS FOR INTEGRATED CIRCUIT TESTING

AUTOMATED TEST PATTERN GENERATION FOR TESTING DESIGN REDACTING RECO...

METHOD, DEVICE, AND SYSTEM FOR DETECTING FUSE CONFIGURATION FOR TRI...

TEST MODE CONTROL CIRCUIT, SEMICONDUCTOR APPARATUS AND SYSTEM, AND...

Scan Tree Construction

Automatic Test Pattern Generation-Based Circuit Verification Method...

DEEP LEARNING-BASED MLCC STACKED ALIGNMENT INSPECTION SYSTEM AND ME...

LOW POWER ENVIRONMENT FOR HIGH PERFORMANCE PROCESSOR WITHOUT LOW PO...

Integrating Machine Learning Delay Estimation in FPGA-Based Emulati...

STRESS-TESTING ELECTRICAL COMPONENTS USING TELEMETRY MODELING

SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS

METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR USING A TESTBED T...

SYSTEM AND METHOD FOR ACCESS CONTROL OF A PLURALITY OF INSTRUMENTS...

CONTAINERIZED ORCHESTRATION OF SECURE SOCKET LAYER VIRTUAL PRIVATE...