Input/output (I/0) data interface arrangements

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CPC
G11C7/10

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GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/10Input/output (I/0) data interface arrangements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Apparatuses and methods for storing and writing multiple parameter...
- Patent number 12,308,090
- Issue date May 20, 2025
- Dean D. Gans
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier including pre-amplifying circuit and memory device...
- Patent number 12,308,088
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Byungkyu Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory package having stacked array dies and reduced driver load
- Patent number 12,308,087
- Issue date May 20, 2025
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices
- Patent number 12,308,089
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient, width-adjustable signaling interface
- Patent number 12,300,345
- Issue date May 13, 2025
- RAMBUS INC.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 12,300,349
- Issue date May 13, 2025
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device, controller and memory system
- Patent number 12,300,355
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Kuiyon Mun
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die termination
- Patent number 12,301,227
- Issue date May 13, 2025
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Equalizer for removing inter symbol interference of data signal by...
- Patent number 12,301,236
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Daehoon Na
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transmission circuit, method and semiconductor memory
- Patent number 12,300,308
- Issue date May 13, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhonglai Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable memory module designed to implement computing operat...
- Patent number 12,300,347
- Issue date May 13, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Roman Gauchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for signal transmission, circuit and memory
- Patent number 12,300,348
- Issue date May 13, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kiho Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Receiving circuit and memory
- Patent number 12,300,350
- Issue date May 13, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,300,352
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Jaewoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory devices
- Patent number 12,300,302
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Hee-Woong Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Unchangeable physical unclonable function in non-volatile memory
- Patent number 12,301,712
- Issue date May 13, 2025
- Macronix International Co., Ltd.
- Chun-Hsiung Hung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-bandwidth memory module architecture
- Patent number 12,300,346
- Issue date May 13, 2025
- Advanced Micro Devices, Inc.
- Aaron John Nygren
- G11 - INFORMATION STORAGE
Information Patent Grant
Die disablement
- Patent number 12,300,351
- Issue date May 13, 2025
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage conversion circuit and memory
- Patent number 12,301,237
- Issue date May 13, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kangling Ji
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and memory system
- Patent number 12,300,353
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Seung-Jun Shin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device using semiconductor element
- Patent number 12,302,548
- Issue date May 13, 2025
- Unisantis Electronics Singapore Pte. Ltd.
- Masakazu Kakumu
- G11 - INFORMATION STORAGE
Information Patent Grant
Resumption of program or erase operations in memory
- Patent number 12,300,332
- Issue date May 13, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory subsystem calibration using substitute results
- Patent number 12,293,808
- Issue date May 6, 2025
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for mitigating single-event-transients
- Patent number 12,294,363
- Issue date May 6, 2025
- ZERO-ERROR SYSTEMS PTE LTD
- Joseph Sylvester Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device including selective bit line and source l...
- Patent number 12,293,088
- Issue date May 6, 2025
- SK hynix Inc.
- Chan Hui Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for memory alignment
- Patent number 12,293,105
- Issue date May 6, 2025
- John D. Leidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static random-access memory (SRAM) apparatus and method for reducin...
- Patent number 12,293,806
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
3D memory circuit
- Patent number 12,293,108
- Issue date May 6, 2025
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Javier A. DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Offset calibration training method for adjusting data receiver offs...
- Patent number 12,293,807
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Younggil Go
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS
- Publication number 20250157509
- Publication date May 15, 2025
- Micron Technology, Inc.
- Alberto Troia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE, METHOD OF CONTROLLING INITIALIZATION OF...
- Publication number 20250157505
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Yo Han LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND COMPUTATION METHOD THEREOF
- Publication number 20250157508
- Publication date May 15, 2025
- Macronix International Co., Ltd.
- Huai-Mu Wang
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE PERFORMING DUMMY READ OPERATION, AND METHOD OF OPERA...
- Publication number 20250157510
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Yun-Ki CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...
- Publication number 20250157513
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Sanguk Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF
- Publication number 20250157515
- Publication date May 15, 2025
- Faraday Technology Corp.
- Sivaramakrishnan Subramanian
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-POWER STATIC RANDOM ACCESS MEMORY
- Publication number 20250157530
- Publication date May 15, 2025
- UNTETHER AI CORPORATION
- Saijagan SAIJAGAN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, AND METHOD OF OPERATING TH...
- Publication number 20250157554
- Publication date May 15, 2025
- SK HYNIX INC.
- Byoung Sung YOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20250157503
- Publication date May 15, 2025
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...
- Publication number 20250157511
- Publication date May 15, 2025
- SK HYNIX INC.
- Chang Kwon LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME
- Publication number 20250157512
- Publication date May 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Tzu CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND OPERATION METHOD OF MEMORY DEVICE
- Publication number 20250157504
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- DONGHUN LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE CHIP AND READ OPERATION METHOD
- Publication number 20250157506
- Publication date May 15, 2025
- Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Yan Qiang DU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TRAFFIC MONITORING
- Publication number 20250157514
- Publication date May 15, 2025
- Micron Technology, Inc.
- Aaron P. Boehm
- G11 - INFORMATION STORAGE
Information Patent Application
GENERATING AND EXECUTING A CONTROL FLOW
- Publication number 20250156192
- Publication date May 15, 2025
- Lodestar Licensing Group LLC
- Kyle B. Wheeler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR SCATTER AND GATHER
- Publication number 20250157502
- Publication date May 15, 2025
- Lodestar Licensing Group LLC
- Jason T. Zawodny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERA...
- Publication number 20250157507
- Publication date May 15, 2025
- SK HYNIX INC.
- Soo Yeol CHAI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY MODULE
- Publication number 20250149075
- Publication date May 8, 2025
- RENESAS ELECTRONICS CORPORATION
- Kazunori YAMANE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250149076
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
PACKET ROUTING BETWEEN MEMORY DEVICES AND RELATED APPARATUSES, METH...
- Publication number 20250147660
- Publication date May 8, 2025
- Micron Technology, Inc.
- John D. Leidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Assemblies Comprising Memory Cells and Select Gates; and Methods of...
- Publication number 20250149072
- Publication date May 8, 2025
- Micron Technology, Inc.
- Ugo Russo
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF
- Publication number 20250149074
- Publication date May 8, 2025
- Yue SHENG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250149073
- Publication date May 8, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Sheng CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20250140294
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CALIBRATING ADJUSTABLE IMPEDANCES OF A...
- Publication number 20250141432
- Publication date May 1, 2025
- Lodestar Licensing Group LLC
- Dean Gans
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL SHIFTING CIRCUIT
- Publication number 20250141451
- Publication date May 1, 2025
- STMicroelectronics International N.V.
- Thomas Pierre Georges Jouanneau
- G11 - INFORMATION STORAGE
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD
- Publication number 20250139026
- Publication date May 1, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED CHIP SELECT SIGNAL TRAINING
- Publication number 20250138571
- Publication date May 1, 2025
- QUALCOMM Incorporated
- Farrukh AQUIL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...
- Publication number 20250131953
- Publication date Apr 24, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE

Input/output (I/0) data interface arrangements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Apparatuses and methods for storing and writing multiple parameter...

Sense amplifier including pre-amplifying circuit and memory device...

Memory package having stacked array dies and reduced driver load

Semiconductor memory devices

Area-efficient, width-adjustable signaling interface

Memory module multiple port buffer techniques

Non-volatile memory device, controller and memory system

On-die termination

Equalizer for removing inter symbol interference of data signal by...

Data transmission circuit, method and semiconductor memory

Reconfigurable memory module designed to implement computing operat...

Method for signal transmission, circuit and memory

Receiving circuit and memory

Semiconductor device

Nonvolatile memory devices

Unchangeable physical unclonable function in non-volatile memory

High-bandwidth memory module architecture

Die disablement

Voltage conversion circuit and memory

Memory device and memory system

Memory device using semiconductor element

Resumption of program or erase operations in memory

Memory subsystem calibration using substitute results

Circuit for mitigating single-event-transients

Nonvolatile memory device including selective bit line and source l...

Apparatuses and methods for memory alignment

Write merging on stores with different privilege levels

Static random-access memory (SRAM) apparatus and method for reducin...

3D memory circuit

Offset calibration training method for adjusting data receiver offs...

Patents Applicationslast 30 patents

ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS

NONVOLATILE MEMORY DEVICE, METHOD OF CONTROLLING INITIALIZATION OF...

MEMORY DEVICE AND COMPUTATION METHOD THEREOF

STORAGE DEVICE PERFORMING DUMMY READ OPERATION, AND METHOD OF OPERA...

SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...

MEMORY PHYSICAL LAYER INTERFACE, MEMORY APPARATUS AND METHOD THEREOF

LOW-POWER STATIC RANDOM ACCESS MEMORY

SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, AND METHOD OF OPERATING TH...

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SI...

MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME

MEMORY DEVICE, MEMORY SYSTEM, AND OPERATION METHOD OF MEMORY DEVICE

STORAGE CHIP AND READ OPERATION METHOD

MEMORY TRAFFIC MONITORING

GENERATING AND EXECUTING A CONTROL FLOW

APPARATUSES AND METHODS FOR SCATTER AND GATHER

NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERA...

SEMICONDUCTOR DEVICE AND MEMORY MODULE

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

PACKET ROUTING BETWEEN MEMORY DEVICES AND RELATED APPARATUSES, METH...

Assemblies Comprising Memory Cells and Select Gates; and Methods of...

MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF

SEMICONDUCTOR DEVICE

SHARED DECODER CIRCUIT AND METHOD

APPARATUSES AND METHODS FOR CALIBRATING ADJUSTABLE IMPEDANCES OF A...

LEVEL SHIFTING CIRCUIT

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD

ENHANCED CHIP SELECT SIGNAL TRAINING

MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...