Input/output (I/0) data interface arrangements

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CPC
G11C7/10

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GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/10Input/output (I/0) data interface arrangements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 12,321,284
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage generation circuit for SRAM
- Patent number 12,322,472
- Issue date Jun 3, 2025
- NXP B.V.
- Hubert Martin Bode
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller for a memory device
- Patent number 12,321,190
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock mode determination in a memory system
- Patent number 12,321,600
- Issue date Jun 3, 2025
- Mosaid Technologies Incorporated
- Peter B. Gillingham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense amplifier with read circuit for compute-in-memory
- Patent number 12,322,435
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chieh Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor devices and semiconductor systems calibrating termina...
- Patent number 12,322,470
- Issue date Jun 3, 2025
- SK hynix Inc.
- Sang Sic Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Read cache memory
- Patent number 12,321,608
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Eugene Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conditional write back scheme for memory
- Patent number 12,322,468
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Richard C. Murphy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing page buffer circuits in memory devices
- Patent number 12,322,469
- Issue date Jun 3, 2025
- Macronix International Co., Ltd.
- Ji-Yu Hung
- G11 - INFORMATION STORAGE
Information Patent Grant
Contention-free dual-voltage logic cell
- Patent number 12,322,471
- Issue date Jun 3, 2025
- NVIDIA Corp.
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining read voltage offset in memory devices
- Patent number 12,322,473
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,321,285
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for ordering bits in a memory device
- Patent number 12,314,723
- Issue date May 27, 2025
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh operation in multi-die memory
- Patent number 12,315,547
- Issue date May 27, 2025
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Grant
Activate commands for memory preparation
- Patent number 12,315,593
- Issue date May 27, 2025
- Micron Technology, Inc.
- Andreas Schneider
- G11 - INFORMATION STORAGE
Information Patent Grant
Write leveling circuit applied to memory, and method and apparatus...
- Patent number 12,315,595
- Issue date May 27, 2025
- Zhiqiang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Via configurable edge-combiner with duty cycle correction
- Patent number 12,316,328
- Issue date May 27, 2025
- Altera Corporation
- Chooi Pei Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Conflict detection and address arbitration for routing scatter and...
- Patent number 12,314,572
- Issue date May 27, 2025
- Synopsys, Inc.
- Karthik Thucanakkenpalayam Sundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling memory module clock buffer power in a system with a sin...
- Patent number 12,315,594
- Issue date May 27, 2025
- Dell Products L.P.
- Isaac Q. Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Scheduling of read operations and write operations based on a data...
- Patent number 12,314,193
- Issue date May 27, 2025
- Micron Technology, Inc.
- Wei Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output control interface circuit for static random access memory an...
- Patent number 12,315,591
- Issue date May 27, 2025
- Realtek Semiconductor Corp.
- Kuo-Chi Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller operable in data loop-back mode
- Patent number 12,314,113
- Issue date May 27, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-voltage RAM used to cross clock and voltage domains
- Patent number 12,315,589
- Issue date May 27, 2025
- NVIDIA Corporation
- Jason Golbus
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device configured to reduce verification time and operating...
- Patent number 12,315,590
- Issue date May 27, 2025
- Samsung Electronics Co., Ltd.
- Hyunjun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses for timing control in write path
- Patent number 12,315,592
- Issue date May 27, 2025
- Micron Technology, Inc.
- Shingo Mitsubori
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for storing and writing multiple parameter...
- Patent number 12,308,090
- Issue date May 20, 2025
- Dean D. Gans
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier including pre-amplifying circuit and memory device...
- Patent number 12,308,088
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Byungkyu Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory package having stacked array dies and reduced driver load
- Patent number 12,308,087
- Issue date May 20, 2025
- Netlist, Inc.
- Hyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices
- Patent number 12,308,089
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient, width-adjustable signaling interface
- Patent number 12,300,345
- Issue date May 13, 2025
- RAMBUS INC.
- Frederick A. Ware
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY WITH PARALLEL MAIN AND TEST INTERFACES
- Publication number 20250182839
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE INCLUDING THE...
- Publication number 20250181450
- Publication date Jun 5, 2025
- Samsung Electronics Co., Ltd.
- Jungho Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE WITH LOCAL SYNCHRONIZATION
- Publication number 20250181504
- Publication date Jun 5, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory controllers, systems and methods supporting multiple request...
- Publication number 20250182801
- Publication date Jun 5, 2025
- Rambus Inc.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARD DISK CONTROL SYSTEM AND METHOD, AND RELATED COMPONENT
- Publication number 20250182799
- Publication date Jun 5, 2025
- Suzhou MetaBrain Intelligent Technology Co., Ltd
- Fudong LIU
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INDICATING ROW ACTIVATION
- Publication number 20250182800
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20250182802
- Publication date Jun 5, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Jo
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...
- Publication number 20250182834
- Publication date Jun 5, 2025
- MEDIATEK INC.
- Tzu-Hsien Yang
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE
- Publication number 20250173093
- Publication date May 29, 2025
- Micron Technology, Inc.
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION MEMORY CELL
- Publication number 20250174256
- Publication date May 29, 2025
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SOURCE LINE CONTROL
- Publication number 20250174257
- Publication date May 29, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLICATION AND ACCUMULATION (MAC) OPERATOR AND PROCESSING-IN-ME...
- Publication number 20250173122
- Publication date May 29, 2025
- SK HYNIX INC.
- Choung Ki SONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD REDUCED MEMORY MODULE
- Publication number 20250176102
- Publication date May 29, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHIFT CIRCUIT, MEMORY CONTROLLER, AND MEMORY SYSTEM
- Publication number 20250174254
- Publication date May 29, 2025
- Yangtze Memory Technologies Co., Ltd.
- Zhiwei ZHUANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES, OPERATING METHODS THEREOF, MEMORY SYSTEMS
- Publication number 20250174296
- Publication date May 29, 2025
- Yangtze Memory Technologies Co., Ltd.
- Xiaodong Mei
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH SPEED MEMORY DEVICE WITH DATA MASKING
- Publication number 20250174253
- Publication date May 29, 2025
- Yangtze Memory Technologies Co., Ltd.
- Chunfei DENG
- G11 - INFORMATION STORAGE
Information Patent Application
PAGE BUFFERS AND OPERATION METHODS THEREOF, MEMORY DEVICES, AND MEM...
- Publication number 20250174255
- Publication date May 29, 2025
- Yangtze Memory Technologies Co., Ltd.
- Weiwei He
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250166672
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Application
DATA STROBE TOGGLING BY A CONTROLLER
- Publication number 20250166676
- Publication date May 22, 2025
- Micron Technology, Inc.
- Leonid Minz
- G11 - INFORMATION STORAGE
Information Patent Application
System Control Using Sparse Data
- Publication number 20250165404
- Publication date May 22, 2025
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATING DATA WITH STACKED MEMORY DIES
- Publication number 20250165413
- Publication date May 22, 2025
- Lodestar Licensing Group LLC
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS OF MEMORY ACCESS CONTROL
- Publication number 20250166673
- Publication date May 22, 2025
- Micron Technology, Inc.
- MANAMI SENOO
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT, MEMORY CONTROLLER INCLUDING THE IMPE...
- Publication number 20250166675
- Publication date May 22, 2025
- SK HYNIX INC.
- In Soo LEE
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME DEVIC...
- Publication number 20250166670
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Daehyeon JO
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE ENDED SENSE AMPLIFIER WITH CURRENT PULSE CIRCUIT
- Publication number 20250166671
- Publication date May 22, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Siva Kumar Chinthu
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND-DIFFERENTIATED STORAGE OF INTERNALLY AND EXTERNALLY SOURCED...
- Publication number 20250165387
- Publication date May 22, 2025
- Rambus Inc.
- Thomas J. Sheffler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON CHIP FOR REDUCING WAKE-UP TIME, METHOD OF OPERATING SAME,...
- Publication number 20250165054
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Hee Dong SHIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INCLUDING PAGE BUFFER, MEMORY SYSTEM INCLUDING PAGE B...
- Publication number 20250166674
- Publication date May 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yan WANG
- G11 - INFORMATION STORAGE
Information Patent Application
CALIBRATION DEVICES AND OPERATING METHODS THEREOF
- Publication number 20250166677
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Jichull Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250166678
- Publication date May 22, 2025
- NANYA TECHNOLOGY CORPORATION
- Chien Yu Chen
- G11 - INFORMATION STORAGE

Input/output (I/0) data interface arrangements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus to facilitate atomic operations in victim cache

Voltage generation circuit for SRAM

Memory controller for a memory device

Clock mode determination in a memory system

Sense amplifier with read circuit for compute-in-memory

Semiconductor devices and semiconductor systems calibrating termina...

Read cache memory

Conditional write back scheme for memory

Managing page buffer circuits in memory devices

Contention-free dual-voltage logic cell

Determining read voltage offset in memory devices

Victim cache with write miss merging

Apparatuses and methods for ordering bits in a memory device

Refresh operation in multi-die memory

Activate commands for memory preparation

Write leveling circuit applied to memory, and method and apparatus...

Via configurable edge-combiner with duty cycle correction

Conflict detection and address arbitration for routing scatter and...

Controlling memory module clock buffer power in a system with a sin...

Scheduling of read operations and write operations based on a data...

Output control interface circuit for static random access memory an...

Memory controller operable in data loop-back mode

Multi-voltage RAM used to cross clock and voltage domains

Memory device configured to reduce verification time and operating...

Apparatuses for timing control in write path

Apparatuses and methods for storing and writing multiple parameter...

Sense amplifier including pre-amplifying circuit and memory device...

Memory package having stacked array dies and reduced driver load

Semiconductor memory devices

Area-efficient, width-adjustable signaling interface

Patents Applicationslast 30 patents

MEMORY WITH PARALLEL MAIN AND TEST INTERFACES

MEMORY DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE INCLUDING THE...

MEMORY MODULE WITH LOCAL SYNCHRONIZATION

Memory controllers, systems and methods supporting multiple request...

HARD DISK CONTROL SYSTEM AND METHOD, AND RELATED COMPONENT

TECHNIQUES FOR INDICATING ROW ACTIVATION

SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...

WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE

CONFIGURATION MEMORY CELL

MEMORY DEVICE WITH SOURCE LINE CONTROL

MULTIPLICATION AND ACCUMULATION (MAC) OPERATOR AND PROCESSING-IN-ME...

LOAD REDUCED MEMORY MODULE

SHIFT CIRCUIT, MEMORY CONTROLLER, AND MEMORY SYSTEM

MEMORY DEVICES, OPERATING METHODS THEREOF, MEMORY SYSTEMS

HIGH SPEED MEMORY DEVICE WITH DATA MASKING

PAGE BUFFERS AND OPERATION METHODS THEREOF, MEMORY DEVICES, AND MEM...

MEMORY CIRCUIT AND METHOD OF OPERATING SAME

DATA STROBE TOGGLING BY A CONTROLLER

System Control Using Sparse Data

COMMUNICATING DATA WITH STACKED MEMORY DIES

APPARATUSES AND METHODS OF MEMORY ACCESS CONTROL

IMPEDANCE CALIBRATION CIRCUIT, MEMORY CONTROLLER INCLUDING THE IMPE...

NON-VOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME DEVIC...

SINGLE ENDED SENSE AMPLIFIER WITH CURRENT PULSE CIRCUIT

COMMAND-DIFFERENTIATED STORAGE OF INTERNALLY AND EXTERNALLY SOURCED...

SYSTEM ON CHIP FOR REDUCING WAKE-UP TIME, METHOD OF OPERATING SAME,...

MEMORY DEVICE INCLUDING PAGE BUFFER, MEMORY SYSTEM INCLUDING PAGE B...

CALIBRATION DEVICES AND OPERATING METHODS THEREOF

MEMORY DEVICE