Input/output (I/0) data interface arrangements

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G11C7/10

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GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/10Input/output (I/0) data interface arrangements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Fast reference voltage training for I/O interface
- Patent number 12,367,915
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoders, decoders, and semiconductor memory devices including the...
- Patent number 12,367,916
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Byongmo Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and memory system with both long and short sub word lines co...
- Patent number 12,367,945
- Issue date Jul 22, 2025
- SK Hynix Inc.
- Sang Woo Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device, read method for nonvolatile memory devic...
- Patent number RE50501
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Chul Bum Kim
Information Patent Grant
Acceleration of data queries in memory
- Patent number 12,367,935
- Issue date Jul 22, 2025
- Mark A. Helm
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-destructive mode cache programming in NAND flash memory devices
- Patent number 12,367,941
- Issue date Jul 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Jason Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device including sense amplifier that senses...
- Patent number 12,367,912
- Issue date Jul 22, 2025
- Kabushiki Kaisha Toshiba
- Tsuyoshi Midorikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for memory module data drivers
- Patent number 12,367,913
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Split array architecture for analog neural memory in a deep learnin...
- Patent number 12,367,386
- Issue date Jul 22, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for controlling power assertion in a memory device
- Patent number 12,367,917
- Issue date Jul 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with region-specific memory access scheduling
- Patent number 12,366,960
- Issue date Jul 22, 2025
- Advanced Micro Devices, Inc.
- Yi Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page buffer circuit with bit line select transistor
- Patent number 12,367,936
- Issue date Jul 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Teng Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,360,667
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sheng-Po Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage of secure data in 6T SRAM cells using hot carr...
- Patent number 12,361,987
- Issue date Jul 15, 2025
- BTQ Technologies Corp.
- Zachary Irving Belateche
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system
- Patent number 12,361,989
- Issue date Jul 15, 2025
- SK hynix Inc.
- Kang Sub Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmitting data signals on separate layers of a memory module, an...
- Patent number 12,361,978
- Issue date Jul 15, 2025
- Lodestar Licensing Group LLC
- Yogesh Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and operating method with page buffer includin...
- Patent number 12,361,986
- Issue date Jul 15, 2025
- SK Hynix Inc.
- Hyung Jin Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction memory device with fast data access
- Patent number 12,360,848
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise reduction in sense amplifiers for non-volatile memory
- Patent number 12,361,984
- Issue date Jul 15, 2025
- SanDisk Technologies, Inc.
- Iris Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for faster bitcell operation
- Patent number 12,361,992
- Issue date Jul 15, 2025
- MARVELL ASIA PTE. LTD.
- Eric D. Hunt-Schroeder
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,361,985
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 12,361,988
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture supporting both conventional memory access mode...
- Patent number 12,361,982
- Issue date Jul 15, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage devices having multi drop structure
- Patent number 12,361,983
- Issue date Jul 15, 2025
- Samsung Electronics Co., Ltd.
- Jae-Sang Yun
- G11 - INFORMATION STORAGE
Information Patent Grant
Indicating a status of a memory built-in self-test for multiple mem...
- Patent number 12,362,031
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection for a semiconductor device
- Patent number 12,362,032
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Matthew Young
- G11 - INFORMATION STORAGE
Information Patent Grant
Control apparatus, memory, signal processing method, and electronic...
- Patent number 12,354,706
- Issue date Jul 8, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jingwei Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge current surge in digital compute in memory
- Patent number 12,354,657
- Issue date Jul 8, 2025
- Mediatek Inc.
- Chetan Deshpande
- G11 - INFORMATION STORAGE
Information Patent Grant
Die for a printhead
- Patent number 12,350,932
- Issue date Jul 8, 2025
- Hewlett-Packard Development Company, L.P.
- Scott A. Linn
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance adjusting circuit and impedance adjusting method for zero...
- Patent number 12,354,685
- Issue date Jul 8, 2025
- NANYA TECHNOLOGY CORPORATION
- Yu-Wei Chen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM
- Publication number 20250239284
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Kuiyon Mun
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE CALIBRATION CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INC...
- Publication number 20250239280
- Publication date Jul 24, 2025
- Research & Business Foundation Sungkyunkwan University
- Junha Lee
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...
- Publication number 20250239282
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Hojun Yoon
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE
- Publication number 20250240192
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Timothy M. Hollis
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD FOR OPERATING MEMORY DEVICE
- Publication number 20250239281
- Publication date Jul 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haruki MORI
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FO...
- Publication number 20250239323
- Publication date Jul 24, 2025
- Western Digital Technologies, Inc.
- Chengqing Hu
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE TYPES OF WRITE OPERATIONS
- Publication number 20250232744
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT HAVING INTERNAL READ-MODIFY-WRITE OPERATION
- Publication number 20250231714
- Publication date Jul 17, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250231694
- Publication date Jul 17, 2025
- SK HYNIX INC.
- Chan Hui JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH THREADED TRANSACTION SUPPORT
- Publication number 20250231686
- Publication date Jul 17, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20250225083
- Publication date Jul 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM
- Publication number 20250226013
- Publication date Jul 10, 2025
- SK HYNIX INC.
- Tae Ho LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUTPUT LATCH AND AMPLIFIER
- Publication number 20250226014
- Publication date Jul 10, 2025
- NVIDIA Corp.
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
HIERARCHICAL BANK GROUP TIMING
- Publication number 20250218476
- Publication date Jul 3, 2025
- Rambus Inc.
- John Eric LINSTADT
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...
- Publication number 20250218507
- Publication date Jul 3, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yue Sheng
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR CONTROLLING SENSE AMPLIFIER AND CONTROL DEVICE USING THE...
- Publication number 20250218474
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS INCLUDING THE SAME
- Publication number 20250218478
- Publication date Jul 3, 2025
- Samsung Electronics Co., Ltd.
- Junbae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD WITH MULTI-BIT OPERATION
- Publication number 20250218479
- Publication date Jul 3, 2025
- Samsung Electronics Co., Ltd.
- Sungmeen MYUNG
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUIT AND MEMORY
- Publication number 20250218480
- Publication date Jul 3, 2025
- CXMT Corporation
- Jun Yang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT
- Publication number 20250217070
- Publication date Jul 3, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Compute-in-Memory with Current Transition Detection
- Publication number 20250218475
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Seohee KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH RESET VOLTAGE CONTROL
- Publication number 20250218477
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ali Taghvaei
- G11 - INFORMATION STORAGE
Information Patent Application
RTT TRIM METHOD
- Publication number 20250218483
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Ryo Fujimaki
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY
- Publication number 20250218481
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- Yorinobu Fujino
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT, SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRANSMISSION...
- Publication number 20250218484
- Publication date Jul 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Shun-Ke WU
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE SENSING AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20250210072
- Publication date Jun 26, 2025
- Samsung Electronics Co., Ltd.
- MIJI JANG
- G11 - INFORMATION STORAGE
Information Patent Application
SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS
- Publication number 20250210073
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Application
DECISION FEEDBACK EQUALIZER, AND MEMORY DEVICE AND MEMORY SYSTEM IN...
- Publication number 20250210077
- Publication date Jun 26, 2025
- Samsung Electronics Co., Ltd.
- Dongin Seo
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...
- Publication number 20250210079
- Publication date Jun 26, 2025
- SK HYNIX INC.
- Nam Hyeok JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20250210074
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE

Input/output (I/0) data interface arrangements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Fast reference voltage training for I/O interface

Encoders, decoders, and semiconductor memory devices including the...

Memory and memory system with both long and short sub word lines co...

Nonvolatile memory device, read method for nonvolatile memory devic...

Acceleration of data queries in memory

Non-destructive mode cache programming in NAND flash memory devices

Semiconductor storage device including sense amplifier that senses...

Apparatuses, systems, and methods for memory module data drivers

Split array architecture for analog neural memory in a deep learnin...

Systems and methods for controlling power assertion in a memory device

Memory system with region-specific memory access scheduling

Page buffer circuit with bit line select transistor

Semiconductor device

Non-volatile storage of secure data in 6T SRAM cells using hot carr...

Semiconductor system

Transmitting data signals on separate layers of a memory module, an...

Semiconductor device and operating method with page buffer includin...

Error correction memory device with fast data access

Noise reduction in sense amplifiers for non-volatile memory

Method and apparatus for faster bitcell operation

Memory device

Adaptive write operations for a memory device

Memory architecture supporting both conventional memory access mode...

Storage devices having multi drop structure

Indicating a status of a memory built-in self-test for multiple mem...

Error detection for a semiconductor device

Control apparatus, memory, signal processing method, and electronic...

Reducing precharge current surge in digital compute in memory

Die for a printhead

Impedance adjusting circuit and impedance adjusting method for zero...

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM

IMPEDANCE CALIBRATION CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INC...

CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...

MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE

MEMORY DEVICE AND METHOD FOR OPERATING MEMORY DEVICE

NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FO...

CONFIGURABLE TYPES OF WRITE OPERATIONS

MEMORY COMPONENT HAVING INTERNAL READ-MODIFY-WRITE OPERATION

MEMORY DEVICE AND OPERATING METHOD THEREOF

MEMORY SYSTEM WITH THREADED TRANSACTION SUPPORT

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM

OUTPUT LATCH AND AMPLIFIER

HIERARCHICAL BANK GROUP TIMING

MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...

METHOD FOR CONTROLLING SENSE AMPLIFIER AND CONTROL DEVICE USING THE...

SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS INCLUDING THE SAME

DEVICE AND METHOD WITH MULTI-BIT OPERATION

CLOCK GENERATION CIRCUIT AND MEMORY

MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT

Compute-in-Memory with Current Transition Detection

MEMORY DEVICE WITH RESET VOLTAGE CONTROL

RTT TRIM METHOD

LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY

MEMORY CIRCUIT, SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRANSMISSION...

BITLINE SENSING AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME

SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS

DECISION FEEDBACK EQUALIZER, AND MEMORY DEVICE AND MEMORY SYSTEM IN...

MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...

MEMORY DEVICE AND METHOD OF OPERATING THE SAME