Input/output (I/0) data interface arrangements

Industry

CPC
G11C7/10

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/10Input/output (I/0) data interface arrangements

Industries

Patents Grantslast 30 patents

Information Patent Grant
Generating and executing a control flow
- Patent number 12,223,328
- Issue date Feb 11, 2025
- Kyle B. Wheeler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for addressing memory caches
- Patent number 12,222,871
- Issue date Feb 11, 2025
- RAMBUS INC.
- Trung Diep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component having internal read-modify-write operation
- Patent number 12,223,207
- Issue date Feb 11, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system
- Patent number 12,224,033
- Issue date Feb 11, 2025
- Kioxia Corporation
- Akira Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance calibration circuit
- Patent number 12,224,746
- Issue date Feb 11, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yanian Shao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device related to calibrating termination resistance
- Patent number 12,224,747
- Issue date Feb 11, 2025
- SK hynix Inc.
- Chae Sung Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods of memory access control with section prede...
- Patent number 12,224,037
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Manami Senoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module with data buffering
- Patent number 12,222,878
- Issue date Feb 11, 2025
- Netlist, Inc.
- Jefferey C. Solomon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache processes with adaptive dynamic start voltage calculation for...
- Patent number 12,224,019
- Issue date Feb 11, 2025
- Intel Corporation
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed memory device with data masking
- Patent number 12,224,036
- Issue date Feb 11, 2025
- Yangtze Memory Technologies Co., Ltd.
- Chunfei Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and data approximation search method thereof
- Patent number 12,224,034
- Issue date Feb 11, 2025
- Macronix International Co., Ltd.
- Chih-Chang Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and intelligent operation method thereof
- Patent number 12,224,038
- Issue date Feb 11, 2025
- Macronix International Co., Ltd.
- Kuan-Chih Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Bias generation circuit and memory circuit
- Patent number 12,217,818
- Issue date Feb 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhonglai Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing device, memory controller, and method for performing an i...
- Patent number 12,217,819
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Counter circuit
- Patent number 12,217,820
- Issue date Feb 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yinchuan Gu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor storage device
- Patent number 12,216,924
- Issue date Feb 4, 2025
- Kioxia Corporation
- Tsuyoshi Atsumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current measurement for power converter circuits
- Patent number 12,216,515
- Issue date Feb 4, 2025
- Apple Inc.
- Shawn Searles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing data transfers in semiconductor devices by separating circ...
- Patent number 12,218,665
- Issue date Feb 4, 2025
- Macronix International Co., Ltd.
- Yi-Fan Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device and operating method with multiple channels
- Patent number 12,217,821
- Issue date Feb 4, 2025
- SK Hynix Inc.
- Seung Han Ryu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with source line control
- Patent number 12,217,822
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing-in-memory devices having multiplication-and-accumulation...
- Patent number 12,217,019
- Issue date Feb 4, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor wiring device and method
- Patent number 12,217,816
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Hidenori Yamaguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Device with client configuration and related method
- Patent number 12,210,880
- Issue date Jan 28, 2025
- STMicroelectronics S.r.l.
- Roberta Vittimani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system, and operation method of memory device
- Patent number 12,211,581
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Donghun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 12,211,586
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit and method for reading data from a memory device durin...
- Patent number 12,211,570
- Issue date Jan 28, 2025
- Realtek Semiconductor Corp.
- Li-Wei Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout for dual in-line memory to support 128-byte cache line proce...
- Patent number 12,211,577
- Issue date Jan 28, 2025
- Tachyum Ltd.
- Radoslav Danilak
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS
- Publication number 20250054860
- Publication date Feb 13, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO
- Publication number 20250054525
- Publication date Feb 13, 2025
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
ONE-TIME PROGRAMMABLE MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE...
- Publication number 20250054558
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE, AND OPERATION METHOD OF I...
- Publication number 20250055459
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Moon-Chul Choi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE
- Publication number 20250054526
- Publication date Feb 13, 2025
- SK HYNIX INC.
- Chan Keun KWON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR
- Publication number 20250054524
- Publication date Feb 13, 2025
- KIOXIA Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Application
SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...
- Publication number 20250054527
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Cheng Cheng Ang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATION OF SOFT DECISION DATA FOR MEMORY DEVICES
- Publication number 20250054563
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Sehwan Park
- G11 - INFORMATION STORAGE
Information Patent Application
TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...
- Publication number 20250046348
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Keun Soo Song
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY
- Publication number 20250046353
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G11 - INFORMATION STORAGE
Information Patent Application
REAL TIME SYNDROME CHECK
- Publication number 20250045157
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME
- Publication number 20250046377
- Publication date Feb 6, 2025
- Yangtze Memory Technologies Co., Ltd.
- Weijun WAN
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY, AND ASSOCIATED SYSTEMS...
- Publication number 20250045203
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DIE TERMINATION OPTIMIZATION
- Publication number 20250045234
- Publication date Feb 6, 2025
- Dell Products L.P.
- Douglas S. Winterberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME
- Publication number 20250046349
- Publication date Feb 6, 2025
- SK HYNIX INC.
- Su Han LEE
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR EFFICIENT 3D SRAM-BASED COMPUTE-IN-MEMORY
- Publication number 20250046350
- Publication date Feb 6, 2025
- Rain Neuromorphics Inc.
- Mohammed Elneanaei Abdelmoneem Fouda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION
- Publication number 20250046352
- Publication date Feb 6, 2025
- SK HYNIX INC.
- Young Mok JEONG
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...
- Publication number 20250046374
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tyler L. Betz
- G11 - INFORMATION STORAGE
Information Patent Application
POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE M...
- Publication number 20250046351
- Publication date Feb 6, 2025
- Western Digital Technologies, Inc.
- Abhishek Singhania
- G11 - INFORMATION STORAGE
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE FOR GENERATING A DELAY SIGNAL, AND A METHOD OF OPERA...
- Publication number 20250046354
- Publication date Feb 6, 2025
- Samsung Electronics Co., Ltd.
- LAESANG JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...
- Publication number 20250037757
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- TAEYOUNG OH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READOUT CIRCUIT
- Publication number 20250037745
- Publication date Jan 30, 2025
- INFINEON TECHNOLOGIES AG
- Mihail Jefremow
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SEN...
- Publication number 20250037747
- Publication date Jan 30, 2025
- Lodestar Licensing Group, LLC
- Troy A. Manning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MATRIX FORMATION FOR PERFORMING COMPUTATIONAL OPERATIONS IN MEMORY
- Publication number 20250029642
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Paolo Fantini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON CHIP (SOC) WITH PROCESSOR AND INTEGRATED FERROELECTRIC ME...
- Publication number 20250029646
- Publication date Jan 23, 2025
- SEAGATE TECHNOLOGY LLC
- Jon D. TRANTHAM
- G11 - INFORMATION STORAGE
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE RELATED TO SIGNAL TRANSMISSION
- Publication number 20250029640
- Publication date Jan 23, 2025
- SK HYNIX INC.
- Kyung Jun CHO
- G11 - INFORMATION STORAGE
Information Patent Application
Multibit High Density Read Only Memory Using Multiple Reference Biases
- Publication number 20250029669
- Publication date Jan 23, 2025
- Taalas Inc.
- Ljubisa Bajic
- G11 - INFORMATION STORAGE

Input/output (I/0) data interface arrangements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Generating and executing a control flow

Methods and apparatuses for addressing memory caches

Memory component having internal read-modify-write operation

Memory system

Impedance calibration circuit

Semiconductor device related to calibrating termination resistance

Apparatuses and methods of memory access control with section prede...

Memory module with data buffering

Cache processes with adaptive dynamic start voltage calculation for...

High speed memory device with data masking

Memory device and data approximation search method thereof

Memory device and intelligent operation method thereof

Bias generation circuit and memory circuit

Computing device, memory controller, and method for performing an i...

Counter circuit

Memory device for supporting command bus training mode and method o...

Semiconductor device and semiconductor storage device

Current measurement for power converter circuits

Managing data transfers in semiconductor devices by separating circ...

Storage device and operating method with multiple channels

Memory device with source line control

Processing-in-memory devices having multiplication-and-accumulation...

Atomic compare and swap in a coherent cache system

Semiconductor wiring device and method

Device with client configuration and related method

Memory device, memory system, and operation method of memory device

Signal generator for controlling timing of signal in memory device

Aggressive write flush scheme for a victim cache

Test circuit and method for reading data from a memory device durin...

Layout for dual in-line memory to support 128-byte cache line proce...

Patents Applicationslast 30 patents

VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS

MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO

ONE-TIME PROGRAMMABLE MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE...

MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE, AND OPERATION METHOD OF I...

MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE

MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR

SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...

GENERATION OF SOFT DECISION DATA FOR MEMORY DEVICES

TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...

DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY

REAL TIME SYNDROME CHECK

MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME

SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY, AND ASSOCIATED SYSTEMS...

ON-DIE TERMINATION OPTIMIZATION

MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME

METHODS FOR EFFICIENT 3D SRAM-BASED COMPUTE-IN-MEMORY

SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION

REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...

POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE M...

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

STORAGE DEVICE FOR GENERATING A DELAY SIGNAL, AND A METHOD OF OPERA...

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...

MEMORY READOUT CIRCUIT

APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SEN...

MATRIX FORMATION FOR PERFORMING COMPUTATIONAL OPERATIONS IN MEMORY

SYSTEM ON CHIP (SOC) WITH PROCESSOR AND INTEGRATED FERROELECTRIC ME...

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

MEMORY DEVICE RELATED TO SIGNAL TRANSMISSION

Multibit High Density Read Only Memory Using Multiple Reference Biases