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CPC
Y10S148/111

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Patents Grantslast 30 patents

Information Patent Grant
Fabrication process of compound semiconductor device comprising L-s...
- Patent number 5,432,126
- Issue date Jul 11, 1995
- NEC Corporation
- Hirokazu Oikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing integrated circuits with very narrow elec...
- Patent number 5,399,525
- Issue date Mar 21, 1995
- Thomson-CSF Semiconducteurs Specifiques
- Pierre Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor device employing oxide sidewalls
- Patent number 5,366,913
- Issue date Nov 22, 1994
- Rohm Co., Ltd.
- Hironobu Nakao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a single electrode level CCD
- Patent number 5,314,836
- Issue date May 24, 1994
- Eastman Kodak Company
- James P. Lavine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making CCD having a single level electrode of single crys...
- Patent number 5,302,544
- Issue date Apr 12, 1994
- Eastman Kodak Company
- James P. Lavine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a non-volatile memory cell using spacers
- Patent number 5,256,584
- Issue date Oct 26, 1993
- Commissariat a l'Energie Atomique
- Joel Hartmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming nanometer-scale trenches and holes
- Patent number 5,246,879
- Issue date Sep 21, 1993
- The United States of America as represented by the Secretary of the Navy
- David S. Y. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optimizing doping control in short channel MOS
- Patent number 5,215,937
- Issue date Jun 1, 1993
- Advanced Micro Devices, Inc.
- Darrell M. Erb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for defining and forming an active region of very limited d...
- Patent number 5,130,272
- Issue date Jul 14, 1992
- SGS-Thomson Microelectronics S.r.l.
- Giuseppe Ferla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of nanometer lithography
- Patent number 5,110,760
- Issue date May 5, 1992
- The United States of America as represented by the Secretary of the Navy
- David S. Y. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device fabrication
- Patent number 5,106,764
- Issue date Apr 21, 1992
- AT&T Bell Laboratories
- Lloyd R. Harriott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating a narrow width EEPROM with single diffusion electrode f...
- Patent number 5,094,968
- Issue date Mar 10, 1992
- Atmel Corporation
- Steven J. Schumann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a bipolar transistor with spacers
- Patent number 5,063,167
- Issue date Nov 5, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Teruyuki Shimura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a monolithically integrated optoelectronic device
- Patent number 5,001,080
- Issue date Mar 19, 1991
- Fujitsu Limited of 1015
- Osamu Wada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a self-aligned field-effect transistor by the use...
- Patent number 4,975,382
- Issue date Dec 4, 1990
- Rohm Co., Ltd.
- Satoru Takasugi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 4,967,254
- Issue date Oct 30, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Teruyuki Shimura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor devices with sub-micron linewidths
- Patent number 4,963,501
- Issue date Oct 16, 1990
- Rockwell International Corporation
- Frank J. Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MESFET process employing dummy electrodes and resist reflow
- Patent number 4,902,646
- Issue date Feb 20, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hirofumi Nakano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a DMOS
- Patent number 4,879,254
- Issue date Nov 7, 1989
- Nippondenso Co., Ltd.
- Yukio Tsuzuki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making travelling wave semi-conductor laser
- Patent number 4,851,368
- Issue date Jul 25, 1989
- Cornell Research Foundation, Inc.
- Abbas Behfar-Rad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming sub-micrometer patterns using silylation of res...
- Patent number 4,803,181
- Issue date Feb 7, 1989
- International Business Machines Corporation
- Peter L. Buchmann
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for producing an aperture in a surface
- Patent number 4,759,822
- Issue date Jul 26, 1988
- TriQuint Semiconductor Inc.
- William A. Vetanen
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Two mask technique for planarized trench oxide isolation of integra...
- Patent number 4,753,901
- Issue date Jun 28, 1988
- NCR Corporation
- Daniel L. Ellsworth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication of gates for integrated circuits
- Patent number 4,738,683
- Issue date Apr 19, 1988
- Thomson-CSF
- Pierre Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned sidewall gate IGFET
- Patent number 4,729,002
- Issue date Mar 1, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Depletion mode short channel IGFET
- Patent number 4,725,871
- Issue date Feb 16, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned dual-gate igfet assembly
- Patent number 4,721,988
- Issue date Jan 26, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optoelectronic integrated circuit
- Patent number 4,719,498
- Issue date Jan 12, 1988
- Fujitsu Limited
- Osamu Wada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall multiple-gate IGFET
- Patent number 4,717,941
- Issue date Jan 5, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall gate IGFET
- Patent number 4,654,680
- Issue date Mar 31, 1987
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS

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Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Fabrication process of compound semiconductor device comprising L-s...

Process for manufacturing integrated circuits with very narrow elec...

Method of manufacturing semiconductor device employing oxide sidewalls

Method of making a single electrode level CCD

Method of making CCD having a single level electrode of single crys...

Method for producing a non-volatile memory cell using spacers

Method of forming nanometer-scale trenches and holes

Optimizing doping control in short channel MOS

Process for defining and forming an active region of very limited d...

Method of nanometer lithography

Device fabrication

Fabricating a narrow width EEPROM with single diffusion electrode f...

Method of producing a bipolar transistor with spacers

Method for producing a monolithically integrated optoelectronic device

Method of making a self-aligned field-effect transistor by the use...

Semiconductor device

Method of fabricating semiconductor devices with sub-micron linewidths

MESFET process employing dummy electrodes and resist reflow

Method of manufacturing a DMOS

Method of making travelling wave semi-conductor laser

Process for forming sub-micrometer patterns using silylation of res...

Methods for producing an aperture in a surface

Two mask technique for planarized trench oxide isolation of integra...

Method of fabrication of gates for integrated circuits

Self-aligned sidewall gate IGFET

Depletion mode short channel IGFET

Self-aligned dual-gate igfet assembly

Optoelectronic integrated circuit

Sidewall multiple-gate IGFET

Sidewall gate IGFET