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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/06183On contiguous sides of the body

Industries

Patents Grantslast 30 patents

Information Patent Grant
Chip assembly
- Patent number 11,508,694
- Issue date Nov 22, 2022
- Infineon Technologies AG
- Alexander Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging mechanisms for dies with different sizes of connectors
- Patent number 11,488,878
- Issue date Nov 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a device fixed on a substrate with an a...
- Patent number 11,233,029
- Issue date Jan 25, 2022
- Mitsubishi Electric Corporation
- Kazuo Yoshida
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementation module for stacked connection between isolated circu...
- Patent number 11,116,100
- Issue date Sep 7, 2021
- SHENZHEN XILONG TOY COMPANY LIMITED
- Yipu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging mechanisms for dies with different sizes of connectors
- Patent number 10,964,610
- Issue date Mar 30, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor integrated circuit device
- Patent number 10,818,620
- Issue date Oct 27, 2020
- Renesas Electronics Corporation
- Hiromi Shigihara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip assembly
- Patent number 10,636,766
- Issue date Apr 28, 2020
- Infineon Technologies AG
- Alexander Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor method for forming semiconductor structure having bum...
- Patent number 10,607,858
- Issue date Mar 31, 2020
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementation method for stacked connection between isolated circu...
- Patent number 10,455,717
- Issue date Oct 22, 2019
- SHENZHEN XILONG TOY COMPANY LIMITED
- Yipu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure having bump on tilting upper corner surface
- Patent number 10,290,512
- Issue date May 14, 2019
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming reverse side engineered III-nitride devices
- Patent number 10,199,217
- Issue date Feb 5, 2019
- Transphorm Inc.
- Rongming Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementation method for stacked connection between isolated circu...
- Patent number 9,894,791
- Issue date Feb 13, 2018
- SHENZHEN XILONG TOY COMPANY LIMITED
- Yipu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a chip assembly with a die attach liquid
- Patent number 9,837,381
- Issue date Dec 5, 2017
- Infineon Technologies AG
- Alexander Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wiring substrate
- Patent number 9,818,681
- Issue date Nov 14, 2017
- Shinko Electric Industries Co., Ltd.
- Yoshihiro Machida
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die semiconductor structure with intermediate vertical side c...
- Patent number 9,812,425
- Issue date Nov 7, 2017
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Small footprint semiconductor package
- Patent number 9,666,557
- Issue date May 30, 2017
- Infineon Technologies AG
- Tian San Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming reverse side engineered III-nitride devices
- Patent number 9,496,137
- Issue date Nov 15, 2016
- Transphorm Inc.
- Rongming Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die semiconductor structure with intermediate vertical side c...
- Patent number 9,478,524
- Issue date Oct 25, 2016
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor module
- Patent number 9,437,518
- Issue date Sep 6, 2016
- Samsung Electronics Co., Ltd.
- Jaebum Byun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die edge side connection
- Patent number 9,209,143
- Issue date Dec 8, 2015
- Intel IP Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to enable controlled side chip interconnection for 3D integr...
- Patent number 9,136,251
- Issue date Sep 15, 2015
- Intel Corporation
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level chip scale package and process of manufacture
- Patent number 8,981,464
- Issue date Mar 17, 2015
- Alpha and Omega Semiconductor Ltd.
- Tao Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for ultra thin wafer backside processing
- Patent number 8,846,532
- Issue date Sep 30, 2014
- Alpha and Omega Semiconductor Incorporated
- Tao Feng
- B32 - LAYERED PRODUCTS
Information Patent Grant
Semiconductor chip and stack package having the same
- Patent number 8,829,665
- Issue date Sep 9, 2014
- SK Hynix Inc.
- Ju Heon Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor device having an interposer
- Patent number 8,802,494
- Issue date Aug 12, 2014
- Amkor Technology Korea, Inc.
- Choon Heung Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor package
- Patent number 8,803,325
- Issue date Aug 12, 2014
- SK Hynix Inc.
- Seong Cheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level chip scale package and process of manufacture
- Patent number 8,716,063
- Issue date May 6, 2014
- Alpha and Omega Semiconductor Ltd.
- Tao Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with ultra-thin die
- Patent number 8,581,380
- Issue date Nov 12, 2013
- Stats Chippac Ltd.
- Soo-San Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Direct edge connection for multi-chip integrated circuits
- Patent number 8,551,816
- Issue date Oct 8, 2013
- International Business Machines Corporation
- Steven A. Cordes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reverse side engineered III-nitride devices
- Patent number 8,389,977
- Issue date Mar 5, 2013
- Transphorm Inc.
- Rongming Chu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE ARCHITECTURE OF THREE-DIMENSIONAL INTERCONNECT CUBE WITH IN...
- Publication number 20230420411
- Publication date Dec 28, 2023
- Intel Corporation
- Sagar Suthram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaging Mechanisms for Dies with Different Sizes of Connectors
- Publication number 20210217672
- Publication date Jul 15, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A CHIP ASSEMBLY AND CHIP ASSEMBLY
- Publication number 20200219848
- Publication date Jul 9, 2020
- INFINEON TECHNOLOGIES AG
- Alexander Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR METHOD FOR FORMING SEMICONDUCTOR STRUCTURE HAVING BUM...
- Publication number 20190074197
- Publication date Mar 7, 2019
- NANYA TECHNOLOGY CORPORATION
- Po-Chun LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPLEMENTATION METHOD FOR STACKED CONNECTION BETWEEN ISOLATED CIRCU...
- Publication number 20180124941
- Publication date May 3, 2018
- SHENZHEN XILONG TOY COMPANY LIMITED
- YIPU ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPLEMENTATION METHOD FOR STACKED CONNECTION BETWEEN ISOLATED CIRCU...
- Publication number 20170311470
- Publication date Oct 26, 2017
- SHENZHEN XILONG TOY COMPANY LIMITED
- YIPU ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- Publication number 20170005048
- Publication date Jan 5, 2017
- RENESAS ELECTRONICS CORPORATION
- HIROMI SHIGIHARA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Small Footprint Semiconductor Package
- Publication number 20140353766
- Publication date Dec 4, 2014
- Tian San Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STACK WITH LOW PROFILE CONTACTS
- Publication number 20140326856
- Publication date Nov 6, 2014
- OMNIVISION TECHNOLOGIES, INC.
- Dominic Massetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE
- Publication number 20140239383
- Publication date Aug 28, 2014
- ALPHA & OMEGA SEMICONDUCTOR, LTD.
- Tao Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MODULE
- Publication number 20140117528
- Publication date May 1, 2014
- Samsung Electronics Co., Ltd.
- Jaebum BYUN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT MULTIPLE SUBSTRATE DIE ASSEMBLY
- Publication number 20140084454
- Publication date Mar 27, 2014
- Apple Inc.
- Shawn X. ARNOLD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR ULTRA THIN WAFER BACKSIDE PROCESSING
- Publication number 20140076846
- Publication date Mar 20, 2014
- Tao Feng
- B32 - LAYERED PRODUCTS
Information Patent Application
METHOD TO ENABLE CONTROLLED SIDE CHIP INTERCONNECTION FOR 3D INTEGR...
- Publication number 20130341803
- Publication date Dec 26, 2013
- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR PACKAGE
- Publication number 20130292842
- Publication date Nov 7, 2013
- SK HYNIX INC.
- Seong Cheol KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING REVERSE SIDE ENGINEERED III-NITRIDE DEVICES
- Publication number 20130210220
- Publication date Aug 15, 2013
- TRANSPHORM INC.
- Rongming Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INTERPOSER
- Publication number 20130109135
- Publication date May 2, 2013
- AMKOR Technology Korea, Inc.
- Choon Heung LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Direct Edge Connection for Multi-Chip Integrated Circuits
- Publication number 20120187577
- Publication date Jul 26, 2012
- International Business Machines Corporation
- Steven A. Cordes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP AND STACK PACKAGE HAVING THE SAME
- Publication number 20120007253
- Publication date Jan 12, 2012
- Hynix Semiconductor Inc.
- Ju Heon YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REVERSE SIDE ENGINEERED III-NITRIDE DEVICES
- Publication number 20110140172
- Publication date Jun 16, 2011
- TRANSPHORM INC.
- Rongming Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE
- Publication number 20110108896
- Publication date May 12, 2011
- ALPHA & OMEGA SEMICONDUCTOR INCORPORATED
- TAO FENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
- Publication number 20110031598
- Publication date Feb 10, 2011
- AMKOR Technology Korea, Inc.
- Choon Heung LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD AND MOUNTING METHOD T...
- Publication number 20090212400
- Publication date Aug 27, 2009
- Yasuhide HARA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE
- Publication number 20090194880
- Publication date Aug 6, 2009
- ALPHA & OMEGA SEMICONDUCTOR, LTD.
- Tao Feng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS
- Publication number 20080315409
- Publication date Dec 25, 2008
- Steven A. Cordes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ULTRA-THIN DIE
- Publication number 20080006921
- Publication date Jan 10, 2008
- STATS ChipPAC Ltd.
- Soo-San Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Article and assembly for magnetically directed self assembly
- Publication number 20070231826
- Publication date Oct 4, 2007
- General Electric Company
- William Hullinger Huber
- G01 - MEASURING TESTING

On contiguous sides of the body

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Chip assembly

Packaging mechanisms for dies with different sizes of connectors

Semiconductor device having a device fixed on a substrate with an a...

Implementation module for stacked connection between isolated circu...

Packaging mechanisms for dies with different sizes of connectors

Semiconductor integrated circuit device

Chip assembly

Semiconductor method for forming semiconductor structure having bum...

Implementation method for stacked connection between isolated circu...

Semiconductor structure having bump on tilting upper corner surface

Methods of forming reverse side engineered III-nitride devices

Implementation method for stacked connection between isolated circu...

Method of forming a chip assembly with a die attach liquid

Wiring substrate

Multi-die semiconductor structure with intermediate vertical side c...

Small footprint semiconductor package

Methods of forming reverse side engineered III-nitride devices

Multi-die semiconductor structure with intermediate vertical side c...

Semiconductor module

Die edge side connection

Method to enable controlled side chip interconnection for 3D integr...

Wafer level chip scale package and process of manufacture

Method and apparatus for ultra thin wafer backside processing

Semiconductor chip and stack package having the same

Method of fabricating a semiconductor device having an interposer

Stacked semiconductor package

Wafer level chip scale package and process of manufacture

Integrated circuit packaging system with ultra-thin die

Direct edge connection for multi-chip integrated circuits

Reverse side engineered III-nitride devices

Patents Applicationslast 30 patents

PACKAGE ARCHITECTURE OF THREE-DIMENSIONAL INTERCONNECT CUBE WITH IN...

Packaging Mechanisms for Dies with Different Sizes of Connectors

METHOD OF FORMING A CHIP ASSEMBLY AND CHIP ASSEMBLY

SEMICONDUCTOR METHOD FOR FORMING SEMICONDUCTOR STRUCTURE HAVING BUM...

IMPLEMENTATION METHOD FOR STACKED CONNECTION BETWEEN ISOLATED CIRCU...

IMPLEMENTATION METHOD FOR STACKED CONNECTION BETWEEN ISOLATED CIRCU...

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Small Footprint Semiconductor Package

INTEGRATED CIRCUIT STACK WITH LOW PROFILE CONTACTS

WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE

SEMICONDUCTOR MODULE

DIRECT MULTIPLE SUBSTRATE DIE ASSEMBLY

METHOD AND APPARATUS FOR ULTRA THIN WAFER BACKSIDE PROCESSING

METHOD TO ENABLE CONTROLLED SIDE CHIP INTERCONNECTION FOR 3D INTEGR...

STACKED SEMICONDUCTOR PACKAGE

METHODS OF FORMING REVERSE SIDE ENGINEERED III-NITRIDE DEVICES

METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INTERPOSER

Direct Edge Connection for Multi-Chip Integrated Circuits

SEMICONDUCTOR CHIP AND STACK PACKAGE HAVING THE SAME

REVERSE SIDE ENGINEERED III-NITRIDE DEVICES

WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE

SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD AND MOUNTING METHOD T...

WAFER LEVEL CHIP SCALE PACKAGE AND PROCESS OF MANUFACTURE

DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ULTRA-THIN DIE

Article and assembly for magnetically directed self assembly