relative to the bonding area

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CPC
H01L2224/16012

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/16012relative to the bonding area

Industries

Patents Grantslast 30 patents

Information Patent Grant
Lead-free solder joining of electronic structures
- Patent number 11,043,468
- Issue date Jun 22, 2021
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip attached to a die pad having a concave structure
- Patent number 10,825,756
- Issue date Nov 3, 2020
- Kabushiki Kaisha Toshiba
- Hideharu Kojima
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package structure and method for manufacturing the same
- Patent number 10,651,052
- Issue date May 12, 2020
- Advanced Semiconductor Engineering, Inc.
- Wen Hung Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead-free solder joining of electronic structures
- Patent number 10,586,782
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preparing a semiconductor package
- Patent number 10,535,621
- Issue date Jan 14, 2020
- Nanya Technology Corporation
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Combing bump structure and manufacturing method thereof
- Patent number 10,446,514
- Issue date Oct 15, 2019
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connection body and method of manufacturing connection body
- Patent number 10,373,927
- Issue date Aug 6, 2019
- Dexerials Corporation
- Reiji Tsukao
- G02 - OPTICS
Information Patent Grant
Trace design for bump-on-trace (BOT) assembly
- Patent number 10,269,759
- Issue date Apr 23, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yen-Liang Lin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor package and method for preparing the same
- Patent number 10,192,841
- Issue date Jan 29, 2019
- Nanya Technology Corporation
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Combing bump structure and manufacturing method thereof
- Patent number 10,068,865
- Issue date Sep 4, 2018
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate and semiconductor package structure having...
- Patent number 9,978,705
- Issue date May 22, 2018
- Advanced Semiconductor Engineering, Inc.
- Guo-Cheng Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip semiconductor package, vertically-stacked devices and ma...
- Patent number 9,893,037
- Issue date Feb 13, 2018
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming sacrificial composite materials for package-on-package arch...
- Patent number 9,793,233
- Issue date Oct 17, 2017
- Intel Corporation
- Rajasekaran Swaminathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced volume interconnect for three-dimensional chip stack
- Patent number 9,679,875
- Issue date Jun 13, 2017
- International Business Machines Corporation
- Peter A. Gruber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced volume interconnect for three-dimensional chip stack
- Patent number 9,543,273
- Issue date Jan 10, 2017
- International Business Machines Corporation
- Peter A. Gruber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding wire to bonding pad
- Patent number 9,293,436
- Issue date Mar 22, 2016
- Renesas Electronics Corporation
- Toshihiko Akiba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding structure of semiconductor package, method for fabricating...
- Patent number 9,269,670
- Issue date Feb 23, 2016
- SK Hynix Inc.
- Seong Cheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding structure of semiconductor package, method for fabricating...
- Patent number 8,766,457
- Issue date Jul 1, 2014
- SK Hynix Inc.
- Seong Cheol Kim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20240389363
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND CHIP THEREOF
- Publication number 20240347493
- Publication date Oct 17, 2024
- CHIPBOND TECHNOLOGY CORPORATION
- Wei-Hsin Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REFLECTIVE INORGANIC THIN FILM FOR HIGH-DENSITY PANEL-SCALE RE-DIST...
- Publication number 20240312942
- Publication date Sep 19, 2024
- Intel Corporation
- Vidya JAYARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Efficient Integration of a First Substrate without Solder Bumps wit...
- Publication number 20240128209
- Publication date Apr 18, 2024
- Newport Fab, LLC dba Tower Semiconductor Newport Beach
- Edward Preisler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING REDISTRIBUTION LAYERS FORMED ON AN ACTI...
- Publication number 20230307374
- Publication date Sep 28, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Kuo-Chiang Ting
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20230230946
- Publication date Jul 20, 2023
- Samsung Electronics Co., Ltd.
- Seongyo KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED PASSIVE DEVICE DIES AND METHODS OF FORMING AND PLACEMENT...
- Publication number 20220415813
- Publication date Dec 29, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Shang-Lun Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE PACKAGES AND METHODS OF MANUFACTURING THE SAME
- Publication number 20200402958
- Publication date Dec 24, 2020
- Advanced Semiconductor Engineering, Inc.
- Hsu-Nan FANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES
- Publication number 20200161272
- Publication date May 21, 2020
- International Business Machines Corporation
- CHARLES L. ARVIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trace Design for Bump-on-Trace (BOT) Assembly
- Publication number 20190252347
- Publication date Aug 15, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yen-Liang Lin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD FOR PREPARING A SEMICONDUCTOR PACKAGE
- Publication number 20190081018
- Publication date Mar 14, 2019
- NANYA TECHNOLOGY CORPORATION
- PO-CHUN LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES
- Publication number 20190006312
- Publication date Jan 3, 2019
- International Business Machines Corporation
- CHARLES L. ARVIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMBING BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20180337154
- Publication date Nov 22, 2018
- NANYA TECHNOLOGY CORPORATION
- Po-Chun LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD FOR PREPARING THE SAME
- Publication number 20180190607
- Publication date Jul 5, 2018
- NANYA TECHNOLOGY CORPORATION
- PO-CHUN LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20170323863
- Publication date Nov 9, 2017
- Amkor Technology, Inc.
- Kyoung Yeon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONNECTION BODY AND METHOD OF MANUFACTURING CONNECTION BODY
- Publication number 20170207190
- Publication date Jul 20, 2017
- DEXERIALS CORPORATION
- Reiji TSUKAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trace Design for Bump-on-Trace (BOT) Assembly
- Publication number 20170186723
- Publication date Jun 29, 2017
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPNAY, LTD.
- Yen-Liang Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20160372437
- Publication date Dec 22, 2016
- SK HYNIX INC.
- Jae Hong JEONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING SACRIFICIAL COMPOSITE MATERIALS FOR PACKAGE-ON-PACKAGE ARCH...
- Publication number 20160343680
- Publication date Nov 24, 2016
- Intel Corporation
- Rajasekaran SWAMINATHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
- Publication number 20160211236
- Publication date Jul 21, 2016
- Byung-Woo LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCED VOLUME INTERCONNECT FOR THREE-DIMENSIONAL CHIP STACK
- Publication number 20160211242
- Publication date Jul 21, 2016
- International Business Machines Corporation
- Peter A. Gruber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trace Design for Bump-on-Trace (BOT) Assembly
- Publication number 20150187719
- Publication date Jul 2, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yen-Liang Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING STRUCTURE OF SEMICONDUCTOR PACKAGE, METHOD FOR FABRICATING...
- Publication number 20140252652
- Publication date Sep 11, 2014
- SK HYNIX INC.
- Seong Cheol KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
- Publication number 20140124910
- Publication date May 8, 2014
- Byung-Woo LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING STRUCTURE OF SEMICONDUCTOR PACKAGE, METHOD FOR FABRICATING...
- Publication number 20120139126
- Publication date Jun 7, 2012
- Hynix Semiconductor Inc.
- Seong Cheol KIM
- H01 - BASIC ELECTRIC ELEMENTS

relative to the bonding area

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Lead-free solder joining of electronic structures

Chip attached to a die pad having a concave structure

Semiconductor package structure and method for manufacturing the same

Lead-free solder joining of electronic structures

Method for preparing a semiconductor package

Combing bump structure and manufacturing method thereof

Connection body and method of manufacturing connection body

Trace design for bump-on-trace (BOT) assembly

Semiconductor package and method for preparing the same

Combing bump structure and manufacturing method thereof

Semiconductor substrate and semiconductor package structure having...

Multi-chip semiconductor package, vertically-stacked devices and ma...

Forming sacrificial composite materials for package-on-package arch...

Reduced volume interconnect for three-dimensional chip stack

Reduced volume interconnect for three-dimensional chip stack

Bonding wire to bonding pad

Bonding structure of semiconductor package, method for fabricating...

Bonding structure of semiconductor package, method for fabricating...

Patents Applicationslast 30 patents

PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

SEMICONDUCTOR PACKAGE AND CHIP THEREOF

REFLECTIVE INORGANIC THIN FILM FOR HIGH-DENSITY PANEL-SCALE RE-DIST...

Efficient Integration of a First Substrate without Solder Bumps wit...

SEMICONDUCTOR DEVICE HAVING REDISTRIBUTION LAYERS FORMED ON AN ACTI...

SEMICONDUCTOR PACKAGE

INTEGRATED PASSIVE DEVICE DIES AND METHODS OF FORMING AND PLACEMENT...

SEMICONDUCTOR DEVICE PACKAGES AND METHODS OF MANUFACTURING THE SAME

LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES

Trace Design for Bump-on-Trace (BOT) Assembly

METHOD FOR PREPARING A SEMICONDUCTOR PACKAGE

LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES

COMBING BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR PACKAGE AND METHOD FOR PREPARING THE SAME

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

CONNECTION BODY AND METHOD OF MANUFACTURING CONNECTION BODY

Trace Design for Bump-on-Trace (BOT) Assembly

SEMICONDUCTOR PACKAGE

FORMING SACRIFICIAL COMPOSITE MATERIALS FOR PACKAGE-ON-PACKAGE ARCH...

SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME

REDUCED VOLUME INTERCONNECT FOR THREE-DIMENSIONAL CHIP STACK

Trace Design for Bump-on-Trace (BOT) Assembly

BONDING STRUCTURE OF SEMICONDUCTOR PACKAGE, METHOD FOR FABRICATING...

SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME

BONDING STRUCTURE OF SEMICONDUCTOR PACKAGE, METHOD FOR FABRICATING...