Patent Application
20240312942
Embodiments of the present disclosure relate to electronic packages, and more particularly to packaging architectures that include high-density routing with a thin inorganic film for improved patterning.
High-yield, high-density panel-scale redistribution layers (RDLs) are not manufacturable with current process flows. One challenge is the fabrication of fine pitch (i.e., small line/space (L/S)) copper traces on polymer dielectric layers due to sidewall etching and undercut during wet chemical etching processes. Additionally, fabrication of small diameter micro-vias with small via landing pads is limited by current laser drilling technology. For example, currently available minimum dimensions are 15 μm diameter vias with 30 μm landing pads.
Etching chemistries with high selectivity for etching copper seed layer over the electrolytic plated copper do exist. However, sidewall etching can only be minimized to a certain extent. As such, there is still a high risk of undercut. This can lead to delamination of the fine trace width features in the RDL. Additionally, smaller via diameters may be formed with different drilling solutions, such as excimer laser or via patterning with photo-sensitive dielectrics. Excimer lasers are a high-cost solution and suffer from low throughput. Via patterning using photo-sensitive dielectrics suffer from reliability issues, such as delamination and cracking. Photo-sensitive dielectrics also suffer from poor mechanical properties (e.g., poor adhesion, high coefficient of thermal expansion (CTE), high moisture absorption, and the like).
Described herein are packaging architectures that include high-density routing with a thin reflective inorganic film for improved patterning, in accordance with various embodiments. In the following description, various aspects of the illustrative implementations will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that the present invention may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the illustrative implementations. However, it will be apparent to one skilled in the art that the present invention may be practiced without the specific details. In other instances, well-known features are omitted or simplified in order not to obscure the illustrative implementations.
Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the present invention, however, the order of description should not be construed to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.
As noted above, high density routing on redistribution layers (RDLs) are limited in existing manufacturing techniques. For example, via diameters (which affect minimum pad diameters) are limited by the spot size of the lasers used to drill the via openings. Additionally, when lasers are used to remove the seed layers, the underlying dielectric material may be damaged, which can negatively impact device reliability. Alternatively, if an etching process (e.g., an isotropic wet etching process) is used, then the seed layer below the conductive features may be undercut and result in delamination.
Referring now to
In some instances, electrically conductive pads 105 may be provided between the first layer 101 and the second layer 102. The electrically conductive pads 105 may comprise copper. Barrier layers, seed layers, and the like may also be provided below the pads 105. As shown, via openings 107 are provided through the second layer 102 in order to expose a portion of the pads 105. For example, the via openings 107 may be formed with laser ablation from a laser 150. The diameter D of the via opening 107 is limited by the spot size 151 of the laser 150. With typical laser processes, the spot size 151 is limited to between approximately 10 μm and approximately 15 μm. As used herein, “approximately” may refer to a range of values within ten percent of the stated value. For example, approximately 10 μm may refer to a range between 9 μm and 11 μm. The relatively large spot size 151 results in the diameter of the pad 105 being large as well (e.g., approximately 30 μm or larger).
Referring now to
However, the laser ablation process may negatively impact the surface 203 of the layer 201. For example, due to non-uniform seed layer 214 thickness, the laser ablation process may continue into the top surface 203. As such, the surface 203 may have a non-planar, jagged, profile. Such surfaces negatively impact the reliability of the package substrate 200. For example, the non-planar surface may negatively impact adhesion, layer thickness uniformity, and other design parameters. Accordingly, it may not be desirable to use a laser ablation process in order to remove the seed layer 214. However, as will be described below, other options have negative aspects as well.
Referring now to
The etching process may be an isotropic etching process. Due to the isotropic nature of the etch, the regions of the seed layer 314 below the conductive features may be undercut. For example, surfaces 317 may be recessed from an edge of the conductive feature, such as the pad 316. The traces 315 may also suffer from an undercut in the seed layer 314. The presence of an undercut negatively impacts device reliability. For example, as shown in
Accordingly, existing processes do not allow for a desired level of optimization with respect to feature size and product reliability when laser etching and/or isotropic etching is used to form the RDL. As such, embodiments disclosed herein include package substrate architectures that further comprise a film between the seed layer and the underlying dielectric layer. The film may be an inorganic film material, such as an oxide (e.g., comprising silicon and oxygen) or a carbide (e.g., comprising silicon and carbon). The film may also be a mixture of elements such as an oxynitride (e.g., Si—O—N), or an oxycarbide (e.g., Si—O—C). The film may also be a reflective material in order to prevent absorption of the laser used for ablating processes. In an embodiment, the composition of the film may be adjusted to provide optimum reflectivity for the wavelength of the laser chosen.
The use of such a film has several advantages. A first advantage is that the film can be used as a hardmask during laser via opening operations. For example, a hole with a diameter smaller than the spot size of the laser can be formed through the film (e.g., with a lithography process). The film acts as a hardmask that allows for smaller diameter via openings to be formed. For example, via opening diameters may be approximately 5 μm or less, or between approximately 1um and approximately 3 μm. As such the underlying pads may also be reduced in dimension. This allows for higher density routing.
Another advantage is that the film serves as a protective layer between the seed layer and the underlying dielectric layer. This allows for a laser ablation process to be used to remove the seed layer from selected locations without damaging the surface of the underlying dielectric layer. In some instances, the line/spacing (L/S) of traces formed with such processes may be approximately 3 μm/3 μm or less. As such, high density routing is provided. Further, since a laser ablation process is used, the seed layer under the traces does not experience undercutting, and reliability of the package substrate is improved.
Referring now to
In an embodiment, a film 420 is provided over the second layer 402. The film 420 may comprise an inorganic material. In one embodiment, the film 420 comprises an oxide, such as an oxide comprising oxygen and silicon. In other embodiments, the film 420 may comprise a carbide, a nitride, an oxynitride, an oxycarbide, or the like. In an embodiment, the film 420 may have a thickness up to approximately 5 μm thick. In a particular embodiment, the film 420 has a thickness that is between approximately 100 nm and approximately 3 μm. The film 420 may also be considered a reflective film. As used herein, a “reflective film” may refer to a material layer that reflects or otherwise does not absorb the electromagnetic radiation of a laser used to pattern the package substrate.
In an embodiment, the film 420 may have one or more openings 421 over the pads 405. The openings 421 through the film 420 may be formed with a photolithography process, as will be described in greater detail below. In an embodiment, the diameter D of the openings 421 may be smaller than a spot size 451 of a laser 450. In some embodiments, the diameter D may be approximately 5 μm or less, or approximately 3 μm or less. As such, when the laser 450 is exposed through the openings 421, via openings with reduced diameters are formed in the second layer 402 to expose the pads 405. The portions of the laser exposure that falls outside of the openings 421 is reflected away without patterning the second layer 402.
Referring now to
In an embodiment, a seed layer 514 is provided over the film 520. The seed layer 514 may comprise any standard seed layer formulation. For example, the seed layer 514 may comprise titanium and copper. The seed layer 514 may have a thickness that is between approximately 10 nm and approximately 500 nm. In an embodiment, conductive features, such as traces 515 may be provided over the seed layer 514. The traces 515 may be formed with a plating process, such as an electrolytic plating process. For example, a semi-additive patterning (SAP) process may be used to form the traces 515. For example, the traces 515 may comprise copper. In an embodiment, the traces 515 may have a high-density L/S dimension. For example, the L/S dimension of the traces 515 may be approximately 5 μm/5 μm or less, or approximately 3 μm/3 μm or less.
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In an embodiment, the film 620 may be applied with any suitable thin film deposition process. In one embodiment, the film 620 may be applied with a chemical vapor deposition (CVD) process. In another embodiment, the film 620 may be applied with an atomic layer deposition (ALD) process. The film 620 may be applied as a blanket layer. That is, the film 620 may be applied over the entire top surface of the second layer 602.
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The seed layer 614 may comprise any standard seed layer formulation. For example, the seed layer 614 may comprise titanium and copper in some embodiments. The seed layer 614 may have any suitable thickness. For example, the seed layer 614 may have a thickness that is less than approximately 1 μm, or less than approximately 500 nm. The seed layer 614 may comprise a layer of titanium and an overlying layer of copper in some embodiments. The seed layer 614 may be applied with any suitable deposition process, such as physical vapor deposition (PVD), CVD, or ALD.
Referring now to
The pad 664 may be electrically coupled to the underlying pad 605 by a via 663. The via 663 may have a diameter that is approximately 5 μm or less, or approximately 3 μm or less. The traces 665 may be high density traces 665. For example, the traces 665 may have a L/S dimension of approximately 5 μm/5 μm or less, or of approximately 3 μm/3 μm or less.
Referring now to
While shown as using a laser ablation process, it is to be appreciated that the seed layer 614 may be removed with any suitable anisotropic removal process. For example, in some embodiments a dry etch (e.g., plasma etch) of the seed layer 614 may be used. Similar to above, when an anisotropic process is used there is no undercut of the pad 664 or traces 665. When such a process is used, there should be good etch selectivity between the seed layer 614 and the film 620 in order to prevent damage to the film 620.
Referring now to
In an embodiment, the package substrate 700 may comprise conductive features similar to those described in greater detail above. For example, pads 764 and traces 765 may be provided. The pads 764 and traces 765 may be provided over residual portions of a seed layer 714. The seed layer 714 may be provided over a film 720. For example, the film 720 may be an inorganic and reflective film. A film 720 may be provided between layers 701 of the package substrate 700.
In an embodiment, one or more dies 795 may be coupled to the package substrate 700 by interconnects 796. The interconnects 796 may be solder balls or any other suitable first level interconnect (FLI) architecture. The one or more dies 795 may comprise compute dies (e.g., central processing unit (CPU), graphics processing unit (GPU), XPU, system on a chip (SoC), a communication die, a memory device, or the like).
These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, an accelerometer, a gyroscope, a speaker, a camera, and a mass storage device (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth).
The communication chip 806 enables wireless communications for the transfer of data to and from the computing device 800. The term “wireless” and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communication chip 806 may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The computing device 800 may include a plurality of communication chips 806. For instance, a first communication chip 806 may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth and a second communication chip 806 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.
The processor 804 of the computing device 800 includes an integrated circuit die packaged within the processor 804. In some implementations of the invention, the integrated circuit die of the processor may be part of an electronic package with a package substrate that comprises an inorganic reflective film between dielectric layers of the package substrate, in accordance with embodiments described herein. The term “processor” may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.
The communication chip 806 also includes an integrated circuit die packaged within the communication chip 806. In accordance with another implementation of the invention, the integrated circuit die of the communication chip may be part of an electronic package with a package substrate that comprises an inorganic reflective film between dielectric layers of the package substrate, in accordance with embodiments described herein.
In an embodiment, the computing device 800 may be part of any apparatus. For example, the computing device may be part of a personal computer, a server, a mobile device, a tablet, an automobile, or the like. That is, the computing device 800 is not limited to being used for any particular type of system, and the computing device 800 may be included in any apparatus that may benefit from computing functionality.
The above description of illustrated implementations of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific implementations of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize.
These modifications may be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific implementations disclosed in the specification and the claims. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.
Example 1: a package substrate, comprising: a layer; a film over the layer, wherein the film is an inorganic material; a plurality of electrically conductive traces over the film; and a seed layer between the plurality of electrically conductive traces and the film, wherein edges of the seed layer are substantially aligned with edges of the plurality of electrically conductive traces.
Example 2: the package substrate of Example 1, wherein the film is up to approximately 3 μm thick.
Example 3: the package substrate of Example 2, wherein the film is between approximately 100 nm and approximately 1 μm thick.
Example 4: the package substrate of Examples 1-3, wherein the film comprises oxygen and silicon.
Example 5: the package substrate of Examples 1-4, wherein the film
comprises carbon.
Example 6: the package substrate of Examples 1-5, wherein widths of the plurality of electrically conductive traces are approximately 5 μm or less.
Example 7: the package substrate of Example 6, wherein a spacing between electrically conductive traces is approximately 5 μm or less.
Example 8: the package substrate of Examples 1-7, wherein the film is a reflective inorganic film.
Example 9: the package substrate of Examples 1-8, further comprising a via in the layer, wherein the via passes through the film.
Example 10: the package substrate of Example 9, wherein the via is lined by the seed layer.
Example 11: a package substrate, comprising: a first layer; a first pad on the first layer; a second layer over the first layer and the pad; a film over the second layer, wherein the film comprises an inorganic material; a second pad over the film; and a via through the film and the second layer to electrically couple the first pad to the second pad.
Example 12: the package substrate of Example 11, wherein the via has a width that is approximately 5 μm or less.
Example 13: the package substrate of Example 11 or Example 12, further comprising: a seed layer lining the via.
Example 14: the package substrate of Example 13, wherein the seed layer contacts a sidewall of the second layer, a sidewall of the film, and a top surface of the film.
Example 15: the package substrate of Examples 11-14, wherein the film has a thickness of approximately 3 μm or less.
Example 16: the package substrate of Examples 11-15, further comprising: a plurality of conductive traces over the film, wherein the plurality of traces have widths up to approximately 3 μm and a spacing up to approximately 3 μm.
Example 17: the package substrate of Examples 11-16, wherein the film comprises oxygen and silicon, or the film comprises carbon.
Example 18: a computing system, comprising: a board; a package substrate coupled to the board, wherein the package substrate comprises: a first layer; a first routing layer on the first layer; a second layer over the first layer; a film over the second layer, wherein the film comprises an inorganic material; and a second routing layer over the film; and a die coupled to the package substrate.
Example 19: the computing system of Example 18, wherein the film has a thickness up to approximately 3 μm.
Example 20: the computing system of Example 18 or Example 19, wherein the computing system is part of a personal computer, a server, a mobile device, a tablet, or an automobile.
