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H01L2224/0332

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/0332Screen printing

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Methods for registration of circuit dies and electrical interconnects
- Patent number 12,224,184
- Issue date Feb 11, 2025
- 3M Innovative Properties Company
- Ankit Mahajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and devices for fabricating and assembling printable semico...
- Patent number 12,074,213
- Issue date Aug 27, 2024
- The Board of Trustees of the University of Illinois
- Ralph G. Nuzzo
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for registration of circuit dies and electrical interconnects
- Patent number 12,020,951
- Issue date Jun 25, 2024
- 3M Innovative Properties Company
- Ankit Mahajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple plated via arrays of different wire heights on a same subs...
- Patent number RE49987
- Issue date May 28, 2024
- Invensas LLC
- Cyprian Emeka Uzoh
Information Patent Grant
Semiconductor device bonding area including fused solder film and m...
- Patent number 11,545,452
- Issue date Jan 3, 2023
- Lapis Semiconductor Co., Ltd.
- Masanori Shindo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package devices and method for forming semiconductor...
- Patent number 11,393,784
- Issue date Jul 19, 2022
- Infineon Technologies AG
- Roland Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and devices for fabricating and assembling printable semico...
- Patent number 11,088,268
- Issue date Aug 10, 2021
- The Board of Trustees of the University of Illinois
- Ralph G. Nuzzo
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor device bonding area including fused solder film and m...
- Patent number 10,910,331
- Issue date Feb 2, 2021
- Lapis Semiconductor Co., Ltd.
- Masanori Shindo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip package with resilient conductive paste post and...
- Patent number 10,685,943
- Issue date Jun 16, 2020
- Mediatek Inc.
- Shiann-Tsong Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making fully molded peripheral package on package device
- Patent number 10,672,624
- Issue date Jun 2, 2020
- Deca Technologies Inc.
- Christopher M. Scanlan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple plated via arrays of different wire heights on same substrate
- Patent number 10,629,567
- Issue date Apr 21, 2020
- Invensas Corporation
- Cyprian Emeka Uzoh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Interconnection structure having a via structure and fabrication th...
- Patent number 10,424,508
- Issue date Sep 24, 2019
- Delta Electronics, Inc.
- Hsin-Chang Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and devices for fabricating and assembling printable semico...
- Patent number 10,374,072
- Issue date Aug 6, 2019
- The Board of Trustees of the University of Illinois
- Ralph G. Nuzzo
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor structure and manufacturing method thereof
- Patent number 10,319,692
- Issue date Jun 11, 2019
- Taiwan Semiconductor Manufacturing Company Ltd.
- Yung-Ping Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 10,290,613
- Issue date May 14, 2019
- Invensas Corporation
- Cyprian Emeka Uzoh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor device and method of forming dummy pillars between se...
- Patent number 10,096,540
- Issue date Oct 9, 2018
- STATS ChipPAC Pte. Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,090,231
- Issue date Oct 2, 2018
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,049,998
- Issue date Aug 14, 2018
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic devices with semiconductor die attached with sintered me...
- Patent number 9,875,987
- Issue date Jan 23, 2018
- NXP USA, INC.
- Lakshminarayan Viswanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with under bump metallization a...
- Patent number 9,865,554
- Issue date Jan 9, 2018
- STATS ChipPAC Ptc. Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming conductive pillar having...
- Patent number 9,824,923
- Issue date Nov 21, 2017
- STATS ChipPAC Pte. Ltd.
- Dzafir Shariff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 9,793,198
- Issue date Oct 17, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods and devices for fabricating and assembling printable semico...
- Patent number 9,768,086
- Issue date Sep 19, 2017
- The Board of Trustees of the University of Illinois
- Ralph G. Nuzzo
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods and devices for fabricating and assembling printable semico...
- Patent number 9,761,444
- Issue date Sep 12, 2017
- The Board of Trustees of the University of Illinois
- Ralph G. Nuzzo
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 9,728,527
- Issue date Aug 8, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for processing a semiconductor substrate and a method for pr...
- Patent number 9,673,096
- Issue date Jun 6, 2017
- Infineon Technologies AG
- Joachim Hirschler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip package structure and fabrication process thereof
- Patent number 9,653,355
- Issue date May 16, 2017
- Silergy Semiconductor Technology (Hangzhou) Ltd.
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic devices with semiconductor die coupled to a thermally co...
- Patent number 9,589,860
- Issue date Mar 7, 2017
- NXP USA, INC.
- Lakshminarayan Viswanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple bond via arrays of different wire heights on a same substrate
- Patent number 9,583,456
- Issue date Feb 28, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with oval shaped conductor
- Patent number 9,543,259
- Issue date Jan 10, 2017
- Taiwan Semiconductor Manufacturing Company Ltd.
- Yung-Ping Chiang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS FOR REGISTRATION OF CIRCUIT DIES AND ELECTRICAL INTERCONNECTS
- Publication number 20240282592
- Publication date Aug 22, 2024
- 3M Innovative Properties Company
- Ankit Mahajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC COMPONENT WITH HIGH COPLANARITY AND METHOD OF MANUFACTUR...
- Publication number 20240105670
- Publication date Mar 28, 2024
- CYNTEC CO., LTD.
- Chi-Hung Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SEMICONDUCTOR DEVICES USING A GLASS STRUCTURE AT...
- Publication number 20220293558
- Publication date Sep 15, 2022
- INFINEON TECHNOLOGIES AG
- Roland Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR REGISTRATION OF CIRCUIT DIES AND ELECTRICAL INTERCONNECTS
- Publication number 20220189790
- Publication date Jun 16, 2022
- 3M Innovative Properties Company
- Ankit Mahajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...
- Publication number 20210343862
- Publication date Nov 4, 2021
- THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
- Ralph G. NUZZO
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SEMICONDUCTOR DEVICE BONDING AREA INCLUDING FUSED SOLDER FILM AND M...
- Publication number 20210118831
- Publication date Apr 22, 2021
- LAPIS SEMICONDUCTOR CO., LTD.
- Masanori Shindo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...
- Publication number 20200006540
- Publication date Jan 2, 2020
- THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
- Ralph G. NUZZO
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MULTIPLE PLATED VIA ARRAYS OF DIFFERENT WIRE HEIGHTS ON SAME SUBSTRATE
- Publication number 20190148344
- Publication date May 16, 2019
- Invensas Corporation
- Cyprian Emeka UZOH
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
- Publication number 20190139918
- Publication date May 9, 2019
- LAPIS SEMICONDUCTOR CO., LTD.
- Masanori Shindo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE
- Publication number 20180330966
- Publication date Nov 15, 2018
- DECA TECHNOLOGIES INC
- Christopher M. Scanlan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple bond via arrays of different wire heights on a same substrate
- Publication number 20180301436
- Publication date Oct 18, 2018
- Invensas Corporation
- Cyprian Emeka UZOH
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Semiconductor Devices and Method for Forming Semiconductor Devices
- Publication number 20180068975
- Publication date Mar 8, 2018
- INFINEON TECHNOLOGIES AG
- Roland Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...
- Publication number 20180019191
- Publication date Jan 18, 2018
- Invensas Corporation
- Cyprian Emeka UZOH
- B32 - LAYERED PRODUCTS
Information Patent Application
METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...
- Publication number 20170309733
- Publication date Oct 26, 2017
- THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
- Ralph G. NUZZO
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT PACKAGE USING POLYMER-SOLDER BALL STRUCTURES AND...
- Publication number 20170271285
- Publication date Sep 21, 2017
- GLOBALFOUNDRIES INC.
- Richard S. Graf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDER BUMP METALLIZATION A...
- Publication number 20160099222
- Publication date Apr 7, 2016
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPLIANT INTERCONNECTS IN WAFERS
- Publication number 20140342503
- Publication date Nov 20, 2014
- Tessera, Inc.
- Vage Oganesian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solderless Die Attach to a Direct Bonded Aluminum Substrate
- Publication number 20140225267
- Publication date Aug 14, 2014
- IXYS Corporation
- Nathan Zommer
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Device and Method of Forming Through-Silicon-Via with...
- Publication number 20140199838
- Publication date Jul 17, 2014
- STATS ChipPAC, Ltd.
- Duk Ju Na
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and Devices for Fabricating and Assembling Printable Semico...
- Publication number 20140191236
- Publication date Jul 10, 2014
- The Board of Trustees of the University of IIIinois
- Ralph G. NUZZO
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SILVER-TO-SILVER BONDED IC PACKAGE HAVING TWO CERAMIC SUBSTRATES EX...
- Publication number 20140183716
- Publication date Jul 3, 2014
- IXYS Corporation
- Nathan Zommer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP CHIP PACKAGE STRUCTURE AND FABRICATION PROCESS THEREOF
- Publication number 20140167256
- Publication date Jun 19, 2014
- SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20140145343
- Publication date May 29, 2014
- SK HYNIX INC.
- Jong Hoon KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE INK FOR FILLING VIAS
- Publication number 20140138846
- Publication date May 22, 2014
- NTHDEGREE TECHNOLOGIES WORLDWIDE INC.
- Richard A. Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION STRUCTURE AND FABRICATION THEREOF
- Publication number 20140131871
- Publication date May 15, 2014
- DELTA ELECTRONICS, INC.
- Hsin-Chang TSAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
- Publication number 20140131887
- Publication date May 15, 2014
- DELTA ELECTRONICS, INC.
- Chia-Yen LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPLIANT INTERCONNECTS IN WAFERS
- Publication number 20140099754
- Publication date Apr 10, 2014
- Tessera, Inc.
- Vage Oganesian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING INTERCONNECTION LINE USING SCREEN PRINTING TECH...
- Publication number 20140057369
- Publication date Feb 27, 2014
- SK HYNIX INC.
- Kyu Won LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES HAVING A GLASS SUBST...
- Publication number 20130328183
- Publication date Dec 12, 2013
- Infineon Technologies Austria AG
- Carsten Von Koblinski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solderless Die Attach to a Direct Bonded Aluminum Substrate
- Publication number 20130328204
- Publication date Dec 12, 2013
- IXYS Corporation
- Nathan Zommer
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Screen printing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods for registration of circuit dies and electrical interconnects

Methods and devices for fabricating and assembling printable semico...

Methods for registration of circuit dies and electrical interconnects

Multiple plated via arrays of different wire heights on a same subs...

Semiconductor device bonding area including fused solder film and m...

Semiconductor package devices and method for forming semiconductor...

Methods and devices for fabricating and assembling printable semico...

Semiconductor device bonding area including fused solder film and m...

Semiconductor chip package with resilient conductive paste post and...

Method of making fully molded peripheral package on package device

Multiple plated via arrays of different wire heights on same substrate

Interconnection structure having a via structure and fabrication th...

Methods and devices for fabricating and assembling printable semico...

Semiconductor structure and manufacturing method thereof

Multiple bond via arrays of different wire heights on a same substrate

Semiconductor device and method of forming dummy pillars between se...

Conductive connections, structures with such connections, and metho...

Conductive connections, structures with such connections, and metho...

Electronic devices with semiconductor die attached with sintered me...

Integrated circuit packaging system with under bump metallization a...

Semiconductor device and method of forming conductive pillar having...

Conductive connections, structures with such connections, and metho...

Methods and devices for fabricating and assembling printable semico...

Methods and devices for fabricating and assembling printable semico...

Multiple bond via arrays of different wire heights on a same substrate

Method for processing a semiconductor substrate and a method for pr...

Flip chip package structure and fabrication process thereof

Electronic devices with semiconductor die coupled to a thermally co...

Multiple bond via arrays of different wire heights on a same substrate

Semiconductor structure with oval shaped conductor

Patents Applicationslast 30 patents

METHODS FOR REGISTRATION OF CIRCUIT DIES AND ELECTRICAL INTERCONNECTS

ELECTRONIC COMPONENT WITH HIGH COPLANARITY AND METHOD OF MANUFACTUR...

METHOD FOR FORMING SEMICONDUCTOR DEVICES USING A GLASS STRUCTURE AT...

METHODS FOR REGISTRATION OF CIRCUIT DIES AND ELECTRICAL INTERCONNECTS

METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...

SEMICONDUCTOR DEVICE BONDING AREA INCLUDING FUSED SOLDER FILM AND M...

METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...

MULTIPLE PLATED VIA ARRAYS OF DIFFERENT WIRE HEIGHTS ON SAME SUBSTRATE

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE

Multiple bond via arrays of different wire heights on a same substrate

Semiconductor Devices and Method for Forming Semiconductor Devices

CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...

METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICO...

INTEGRATED CIRCUIT PACKAGE USING POLYMER-SOLDER BALL STRUCTURES AND...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDER BUMP METALLIZATION A...

COMPLIANT INTERCONNECTS IN WAFERS

Solderless Die Attach to a Direct Bonded Aluminum Substrate

Semiconductor Device and Method of Forming Through-Silicon-Via with...

Methods and Devices for Fabricating and Assembling Printable Semico...

SILVER-TO-SILVER BONDED IC PACKAGE HAVING TWO CERAMIC SUBSTRATES EX...

FLIP CHIP PACKAGE STRUCTURE AND FABRICATION PROCESS THEREOF

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

CONDUCTIVE INK FOR FILLING VIAS

INTERCONNECTION STRUCTURE AND FABRICATION THEREOF

PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

COMPLIANT INTERCONNECTS IN WAFERS

METHODS FOR FORMING INTERCONNECTION LINE USING SCREEN PRINTING TECH...

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES HAVING A GLASS SUBST...

Solderless Die Attach to a Direct Bonded Aluminum Substrate