Self-timed logic

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CPC
H03K19/0966

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K19/00Logic circuits

Current Industry

H03K19/0966Self-timed logic

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Reduced-power dynamic data circuits with wide-band energy recovery
- Patent number 12,153,867
- Issue date Nov 26, 2024
- Rezonent Corporation
- Ignatius Bezzam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced-power dynamic data circuits with wide-band energy recovery
- Patent number 11,763,055
- Issue date Sep 19, 2023
- Rezonent Corporation
- Ignatius Bezzam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault resilient flip-flop with balanced topology and negative feedback
- Patent number 11,387,819
- Issue date Jul 12, 2022
- QUALCOMM Incorporated
- Hari Rao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Computer product for making a semiconductor device
- Patent number 11,120,183
- Issue date Sep 14, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chi-Chuan Chuang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for transmitting an operation mode with a c...
- Patent number 11,101,802
- Issue date Aug 24, 2021
- Micron Technology, Inc.
- Jung-Hwa Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced-power dynamic data circuits with wide-band energy recovery
- Patent number 11,023,631
- Issue date Jun 1, 2021
- Rezonent Corporation
- Ignatius Bezzam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-clocking sampler with reduced metastability
- Patent number 10,644,686
- Issue date May 5, 2020
- NVIDIA Corporation
- John W. Poulton
- G05 - CONTROLLING REGULATING
Information Patent Grant
Apparatuses and methods for transmitting an operation mode with a c...
- Patent number 10,630,294
- Issue date Apr 21, 2020
- Micron Technology, Inc.
- Jung-Hwa Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-clocking sampler with reduced metastability
- Patent number 10,601,409
- Issue date Mar 24, 2020
- NVIDIA Corporation
- John W. Poulton
- G05 - CONTROLLING REGULATING
Information Patent Grant
Network logic synthesis
- Patent number 10,496,773
- Issue date Dec 3, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chi-Chuan Chuang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-gating pulsed flip-flop
- Patent number 10,333,500
- Issue date Jun 25, 2019
- Advanced Micro Devices, Inc.
- David Scott Vickers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronizing a self-timed processor with an external event
- Patent number 10,326,452
- Issue date Jun 18, 2019
- Eta Compute, Inc.
- David Baker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuit, semiconductor device, electronic component, and elec...
- Patent number 10,205,452
- Issue date Feb 12, 2019
- Semiconductor Energy Laboratory Co., Ltd.
- Hikaru Tamura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous data link
- Patent number 9,921,992
- Issue date Mar 20, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Julian Hilgemberg Pontes
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timing violation resilient asynchronous template
- Patent number 9,875,327
- Issue date Jan 23, 2018
- University of Southern California
- Peter A. Beerel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compositions and methods for preparing oligonucleotide solutions
- Patent number 9,745,573
- Issue date Aug 29, 2017
- Illumina, Inc.
- John R. Stuelpnagel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic circuit and system and computer program product for logic syn...
- Patent number 9,576,094
- Issue date Feb 21, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chi-Chuan Chuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timing violation resilient asynchronous template
- Patent number 9,558,309
- Issue date Jan 31, 2017
- University of Southern California
- Peter A. Beerel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated clock gater (ICG) using clock cascode complimentary swit...
- Patent number 9,450,578
- Issue date Sep 20, 2016
- Samsung Electronics Co., Ltd.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compositions and methods for preparing oligonucleotide solutions
- Patent number 9,416,411
- Issue date Aug 16, 2016
- Illumina, Inc.
- John R. Stuelpnagel
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Grant
Integrated clock gating cell using a low area and a low power latch
- Patent number 9,246,489
- Issue date Jan 26, 2016
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated clock gater (ICG) using clock cascode complimentary swit...
- Patent number 9,203,382
- Issue date Dec 1, 2015
- Samsung Electronics Co., Ltd.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock-delayed domino logic circuit and devices including the same
- Patent number 8,928,354
- Issue date Jan 6, 2015
- Samsung Electronics Co., Ltd.
- Min Su Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device, a parallel interface system and methods thereof
- Patent number 8,842,794
- Issue date Sep 23, 2014
- Samsung Electronics Co., Ltd.
- Seung-Jun Bae
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, a parallel interface system and methods thereof
- Patent number 8,780,668
- Issue date Jul 15, 2014
- Samsung Electronics Co., Ltd.
- Seung-Jun Bae
- G11 - INFORMATION STORAGE
Information Patent Grant
Compositions and methods for preparing oligonucleotide solutions
- Patent number 8,669,053
- Issue date Mar 11, 2014
- Illumina, Inc.
- John R. Stuelpnagel
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Grant
One phase logic
- Patent number 8,593,176
- Issue date Nov 26, 2013
- Achronix Semiconductor Corporation
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Inactivity triggered self clocking logic family
- Patent number 8,575,964
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Kerry Bernstein
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Domino logic circuits and pipelined domino logic circuits
- Patent number 8,542,033
- Issue date Sep 24, 2013
- Samsung Electronics Co., Ltd.
- Hyoung-Wook Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device, a parallel interface system and methods thereof
- Patent number 8,335,291
- Issue date Dec 18, 2012
- Samsung Electronics Co., Ltd.
- Seung-Jun Bae
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
REDUCED-POWER DYNAMIC DATA CIRCUITS WITH WIDE-BAND ENERGY RECOVERY
- Publication number 20230306174
- Publication date Sep 28, 2023
- REZONENT CORPORATION
- IGNATIUS BEZZAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT RESILIENT FLIP-FLOP WITH BALANCED TOPOLOGY AND NEGATIVE FEEDBACK
- Publication number 20220190813
- Publication date Jun 16, 2022
- QUALCOMM Incorporated
- Hari RAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCED-POWER DYNAMIC DATA CIRCUITS WITH WIDE-BAND ENERGY RECOVERY
- Publication number 20210264083
- Publication date Aug 26, 2021
- REZONENT CORPORATION
- IGNATIUS BEZZAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR TRANSMITTING AN OPERATION MODE WITH A C...
- Publication number 20200287547
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Jung-Hwa Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER PRODUCT FOR MAKING A SEMICONDUCTOR DEVICE
- Publication number 20200104436
- Publication date Apr 2, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chi-Chuan CHUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-CLOCKING SAMPLER WITH REDUCED METASTABILITY
- Publication number 20200106428
- Publication date Apr 2, 2020
- NVIDIA Corporation
- John W. Poulton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
- Publication number 20200002700
- Publication date Jan 2, 2020
- Illumina, Inc.
- John R. Stuelpnagel
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
SYNCHRONIZING A SELF-TIMED PROCESSOR WITH AN EXTERNAL EVENT
- Publication number 20190097634
- Publication date Mar 28, 2019
- Eta Compute, Inc.
- David Baker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
- Publication number 20180010123
- Publication date Jan 11, 2018
- Illumina, Inc.
- John R. Stuelpnagel
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...
- Publication number 20140266396
- Publication date Sep 18, 2014
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
- Publication number 20140135233
- Publication date May 15, 2014
- Illumina, Inc.
- John R. Stuelpnagel
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
CLOCK-DELAYED DOMINO LOGIC CIRCUIT AND DEVICES INCLUDING THE SAME
- Publication number 20130257480
- Publication date Oct 3, 2013
- Samsung Electronics Co., Ltd.
- Min Su KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INACTIVITY TRIGGERED SELF CLOCKING LOGIC FAMILY
- Publication number 20130249596
- Publication date Sep 26, 2013
- International Business Machines Corporation
- Kerry Bernstein
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE, A PARALLEL INTERFACE SYSTEM AND METHODS THEREOF
- Publication number 20130135956
- Publication date May 30, 2013
- Seung-Jun Bae
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE, A PARALLEL INTERFACE SYSTEM AND METHODS THEREOF
- Publication number 20130100998
- Publication date Apr 25, 2013
- Samsung Electronics Co., Ltd.
- Seung-Jun Bae
- G11 - INFORMATION STORAGE
Information Patent Application
DOMINO LOGIC CIRCUITS AND PIPELINED DOMINO LOGIC CIRCUITS
- Publication number 20120139584
- Publication date Jun 7, 2012
- SEOUL NATIONAL UNIVERSITY R&D FOUNDATION
- Hyoung-Wook Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ONE PHASE LOGIC
- Publication number 20120112792
- Publication date May 10, 2012
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ONE PHASE LOGIC
- Publication number 20110298495
- Publication date Dec 8, 2011
- ACHRONIX SEMICONDUCTOR CORPORATION
- Raymond Nijssen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device, a parallel interface system and methods thereof
- Publication number 20110135030
- Publication date Jun 9, 2011
- Seung-Jun Bae
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SELF-TIMED RS-TRIGGER WITH THE ENHANCED NOISE IMMUNITY
- Publication number 20110121877
- Publication date May 26, 2011
- Institute of Informatics Problems of the Russian Academy of Sciences (IPI RAN)
- Igor Anatolievich Sokolov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SELF-TIMED TRIGGER WITH SINGLE-RAIL DATA INPUT
- Publication number 20110043252
- Publication date Feb 24, 2011
- Institute of Informatics Problems of the Russian Academy of Sciences (IPI RAN)
- Igor Anatolievich sokolov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
- Publication number 20100151464
- Publication date Jun 17, 2010
- lllumina, lnc.
- John R. Stuelpnagel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device, a parallel interface system and methods thereof
- Publication number 20070297552
- Publication date Dec 27, 2007
- SAMSUNG ELECTRONICS CO., LTD.
- Seung-Jun Bae
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Domino logic circuit techniques for suppressing subthreshold and ga...
- Publication number 20070176642
- Publication date Aug 2, 2007
- Volkan Kursun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic circuit
- Publication number 20070176640
- Publication date Aug 2, 2007
- Yukihiro Sasagawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low swing domino logic circuits
- Publication number 20070176641
- Publication date Aug 2, 2007
- Volkan Kursun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Micropipeline stage controller and control scheme
- Publication number 20050156632
- Publication date Jul 21, 2005
- Sam Brandon Sandbote
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for an asynchronous pulse logic circuit
- Publication number 20050007151
- Publication date Jan 13, 2005
- Mika Nystrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTISTAGE, SINGLE-RAIL LOGIC CIRCUITRY AND METHOD THEREFORE
- Publication number 20040178825
- Publication date Sep 16, 2004
- International Business Machines Corporation
- Matthew J. Amatangelo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for an asynchronous pulse logic circuit
- Publication number 20030233622
- Publication date Dec 18, 2003
- Mika Nystrom
- G06 - COMPUTING CALCULATING COUNTING

Self-timed logic

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Reduced-power dynamic data circuits with wide-band energy recovery

Reduced-power dynamic data circuits with wide-band energy recovery

Fault resilient flip-flop with balanced topology and negative feedback

Computer product for making a semiconductor device

Apparatuses and methods for transmitting an operation mode with a c...

Reduced-power dynamic data circuits with wide-band energy recovery

Self-clocking sampler with reduced metastability

Apparatuses and methods for transmitting an operation mode with a c...

Self-clocking sampler with reduced metastability

Network logic synthesis

Self-gating pulsed flip-flop

Synchronizing a self-timed processor with an external event

Logic circuit, semiconductor device, electronic component, and elec...

Asynchronous data link

Timing violation resilient asynchronous template

Compositions and methods for preparing oligonucleotide solutions

Logic circuit and system and computer program product for logic syn...

Timing violation resilient asynchronous template

Integrated clock gater (ICG) using clock cascode complimentary swit...

Compositions and methods for preparing oligonucleotide solutions

Integrated clock gating cell using a low area and a low power latch

Integrated clock gater (ICG) using clock cascode complimentary swit...

Clock-delayed domino logic circuit and devices including the same

Semiconductor device, a parallel interface system and methods thereof

Semiconductor device, a parallel interface system and methods thereof

Compositions and methods for preparing oligonucleotide solutions

One phase logic

Inactivity triggered self clocking logic family

Domino logic circuits and pipelined domino logic circuits

Semiconductor device, a parallel interface system and methods thereof

Patents Applicationslast 30 patents

REDUCED-POWER DYNAMIC DATA CIRCUITS WITH WIDE-BAND ENERGY RECOVERY

FAULT RESILIENT FLIP-FLOP WITH BALANCED TOPOLOGY AND NEGATIVE FEEDBACK

REDUCED-POWER DYNAMIC DATA CIRCUITS WITH WIDE-BAND ENERGY RECOVERY

APPARATUSES AND METHODS FOR TRANSMITTING AN OPERATION MODE WITH A C...

COMPUTER PRODUCT FOR MAKING A SEMICONDUCTOR DEVICE

SELF-CLOCKING SAMPLER WITH REDUCED METASTABILITY

COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS

SYNCHRONIZING A SELF-TIMED PROCESSOR WITH AN EXTERNAL EVENT

COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS

INTEGRATED CLOCK GATER (ICG) USING CLOCK CASCODE COMPLIMENTARY SWIT...

COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS

CLOCK-DELAYED DOMINO LOGIC CIRCUIT AND DEVICES INCLUDING THE SAME

INACTIVITY TRIGGERED SELF CLOCKING LOGIC FAMILY

SEMICONDUCTOR DEVICE, A PARALLEL INTERFACE SYSTEM AND METHODS THEREOF

SEMICONDUCTOR DEVICE, A PARALLEL INTERFACE SYSTEM AND METHODS THEREOF

DOMINO LOGIC CIRCUITS AND PIPELINED DOMINO LOGIC CIRCUITS

ONE PHASE LOGIC

ONE PHASE LOGIC

Semiconductor device, a parallel interface system and methods thereof

SELF-TIMED RS-TRIGGER WITH THE ENHANCED NOISE IMMUNITY

SELF-TIMED TRIGGER WITH SINGLE-RAIL DATA INPUT

COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS

Semiconductor device, a parallel interface system and methods thereof

Domino logic circuit techniques for suppressing subthreshold and ga...

Dynamic circuit

Low swing domino logic circuits

Micropipeline stage controller and control scheme

Method and apparatus for an asynchronous pulse logic circuit

MULTISTAGE, SINGLE-RAIL LOGIC CIRCUITRY AND METHOD THEREFORE

Method and apparatus for an asynchronous pulse logic circuit