Semiconductor on specified insulator

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CPC
Y10S438/967

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

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Y10S438/967Semiconductor on specified insulator

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Patents Grantslast 30 patents

Information Patent Grant
Ionizing radiation blocking in IC chip to reduce soft errors
- Patent number 10,784,200
- Issue date Sep 22, 2020
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ionizing radiation blocking in IC chip to reduce soft errors
- Patent number 8,999,764
- Issue date Apr 7, 2015
- International Business Machines Corporation
- Mukta G. Farooq
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Vertical group III-V nanowires on si, heterostructures, flexible ar...
- Patent number 8,932,940
- Issue date Jan 13, 2015
- The Regents of the University of California
- Deli Wang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for forming SOI substrate and apparatus for forming the same
- Patent number 8,802,534
- Issue date Aug 12, 2014
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshihiro Komatsu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Process for manufacturing a wafer by annealing of buried channels
- Patent number 8,334,188
- Issue date Dec 18, 2012
- STMicroelectronics S.r.l.
- Flavio Villa
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Flexible and elastic dielectric integrated circuit
- Patent number 7,911,012
- Issue date Mar 22, 2011
- Taiwan Semiconductor Manufacturing Co., Ltd
- Glenn Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 7,888,235
- Issue date Feb 15, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Stress-controlled dielectric integrated circuit
- Patent number 7,820,469
- Issue date Oct 26, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible and elastic dielectric integrated circuit
- Patent number 7,763,948
- Issue date Jul 27, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for manufacturing a wafer by annealing of buried channels
- Patent number 7,754,578
- Issue date Jul 13, 2010
- STMicroelectronics, SRL
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing SOI substrate
- Patent number 7,749,870
- Issue date Jul 6, 2010
- Shin-Etsu Chemical Co., Ltd.
- Makoto Kawai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing SOQ substrate
- Patent number 7,732,867
- Issue date Jun 8, 2010
- Shin-Etsu Chemical Co., Ltd.
- Shoji Akiyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Membrane IC fabrication
- Patent number 7,670,893
- Issue date Mar 2, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Lithography device for semiconductor circuit pattern generation
- Patent number 7,615,837
- Issue date Nov 10, 2009
- Taiwan Semiconductor Manufacturing Company
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Strained silicon-on-insulator by anodization of a buried p+ silicon...
- Patent number 7,592,671
- Issue date Sep 22, 2009
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress-controlled dielectric integrated circuit
- Patent number 7,550,805
- Issue date Jun 23, 2009
- Elm Technology Corporation
- Glenn Joseph Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective heating using flash anneal
- Patent number 7,507,667
- Issue date Mar 24, 2009
- WaferMasters, Inc.
- Woo Sik Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an integrated circuit
- Patent number 7,485,571
- Issue date Feb 3, 2009
- Elm Technology Corporation
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Membrane 3D IC fabrication
- Patent number 7,479,694
- Issue date Jan 20, 2009
- Elm Technology Corporation
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Membrane 3D IC fabrication
- Patent number 7,385,835
- Issue date Jun 10, 2008
- Elm Technology Corporation
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming lattice-matched structure on silicon and structur...
- Patent number 7,348,226
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Nestor Alexander Bojarczuk, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Membrane 3D IC fabrication
- Patent number 7,307,020
- Issue date Dec 11, 2007
- Elm Technology Corporation
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for manufacturing an SOI wafer by annealing and oxidation o...
- Patent number 7,294,536
- Issue date Nov 13, 2007
- STMicroelectronics S.r.l.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective heating using flash anneal
- Patent number 7,276,457
- Issue date Oct 2, 2007
- WaferMasters, Inc.
- Woo Sik Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of substrates with a useful layer of monocrystalline se...
- Patent number 7,265,029
- Issue date Sep 4, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishing of SOI substrates using an EPI process
- Patent number 7,253,081
- Issue date Aug 7, 2007
- Silicon Genesis Corporation
- Sien G. Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for shaping an air bearing surface of a magnetic head slider
- Patent number 7,185,417
- Issue date Mar 6, 2007
- SAE Magnetics (H. K.) Ltd.
- Osamu Fukuroi
- G11 - INFORMATION STORAGE
Information Patent Grant
Strained silicon-on-insulator by anodization of a buried p+ silicon...
- Patent number 7,172,930
- Issue date Feb 6, 2007
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried conductor patterns formed by surface transformation of empty...
- Patent number 7,164,188
- Issue date Jan 16, 2007
- Micron Technology, Inc.
- Paul A. Farrar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Zeolite films for low k applications
- Patent number 7,109,130
- Issue date Sep 19, 2006
- California Institute of Technology
- Mark E. Davis
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PROCESS FOR MANUFACTURING A WAFER BY ANNEALING OF BURIED CHANNELS
- Publication number 20130200484
- Publication date Aug 8, 2013
- STMicroelectronics S.r.l.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SOI SUBSTRATE AND APPARATUS FOR FORMING THE SAME
- Publication number 20120322228
- Publication date Dec 20, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshihiro KOMATSU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IONIZING RADIATION BLOCKING IN IC CHIP TO REDUCE SOFT ERRORS
- Publication number 20120161300
- Publication date Jun 28, 2012
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL GROUP III-V NANOWIRES ON SI, HETEROSTRUCTURES, FLEXIBLE AR...
- Publication number 20110253982
- Publication date Oct 20, 2011
- The Regents of the University of California
- Deli Wang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
PROCESS FOR MANUFACTURING A WAFER BY ANNEALING OF BURIED CHANNELS
- Publication number 20100237459
- Publication date Sep 23, 2010
- STMicroelectronics S.r.l.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing soi substrate
- Publication number 20090246935
- Publication date Oct 1, 2009
- Shin-Etsu Chemical Co., Ltd.
- Makoto Kawai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IONIZING RADIATION BLOCKING IN IC CHIP TO REDUCE SOFT ERRORS
- Publication number 20090039515
- Publication date Feb 12, 2009
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flexible and elastic dielectric integrated circuit
- Publication number 20080302559
- Publication date Dec 11, 2008
- Elm Technology Corporation
- Glenn Joseph Leedy
- G02 - OPTICS
Information Patent Application
STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON...
- Publication number 20080277690
- Publication date Nov 13, 2008
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing SOQ substrate
- Publication number 20080118757
- Publication date May 22, 2008
- Shin-Etsu Chemical Co., Ltd.
- Shoji Akiyama
- C30 - CRYSTAL GROWTH
Information Patent Application
Process for manufacturing a wafer by annealing of buried channels
- Publication number 20080036030
- Publication date Feb 14, 2008
- STMicroelectronics S.r.l.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...
- Publication number 20070269960
- Publication date Nov 22, 2007
- S. O. I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- C30 - CRYSTAL GROWTH
Information Patent Application
Surface finishing of SOI substrates using an EPI process
- Publication number 20070259526
- Publication date Nov 8, 2007
- Silicon Genesis Corporation
- Sien G. Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE HEATING USING FLASH ANNEAL
- Publication number 20070207612
- Publication date Sep 6, 2007
- Woo Sik Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON...
- Publication number 20070111463
- Publication date May 17, 2007
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION METHOD OF NITRIDE SEMICONDUCTORS AND NITRIDE SEMICONDUC...
- Publication number 20060079073
- Publication date Apr 13, 2006
- Samsung Electro-Mechanics Co., Ltd.
- Sun Woon Kim
- C30 - CRYSTAL GROWTH
Information Patent Application
Method for preventing sidewall consumption during oxidation of SGOI...
- Publication number 20060063358
- Publication date Mar 23, 2006
- International Business Machines Corporation
- Stephen W. Bedell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for manufacturing an SOI wafer by annealing and oxidation o...
- Publication number 20060017131
- Publication date Jan 26, 2006
- STMicroelectronics S.r.I.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained silicon-on-insulator by anodization of a buried p+ silicon...
- Publication number 20060003555
- Publication date Jan 5, 2006
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Zeolite films for low k applications
- Publication number 20050282401
- Publication date Dec 22, 2005
- Mark E. Davis
- C01 - INORGANIC CHEMISTRY
Information Patent Application
Method of forming lattice-matched structure on silicon and structur...
- Publication number 20050266663
- Publication date Dec 1, 2005
- International Business Machines Corporation
- Nestor Alexander Bojarczuk
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHODOF MAKING AN INTEGRATED CIRCUIT
- Publication number 20050176174
- Publication date Aug 11, 2005
- Elm Technology Corporation
- Glenn J. Leedy
- G02 - OPTICS
Information Patent Application
Lithography device for semiconductor circuit pattern generation
- Publication number 20050156265
- Publication date Jul 21, 2005
- Elm Technology Corporation
- Glenn Joseph Leedy
- G02 - OPTICS
Information Patent Application
Selective heating using flash anneal
- Publication number 20050142875
- Publication date Jun 30, 2005
- Woo Sik Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication method of nitride semiconductors and nitride semiconduc...
- Publication number 20050133812
- Publication date Jun 23, 2005
- Samsung Electro-Mechanics CO., LTD.
- Sun Woon Kim
- C30 - CRYSTAL GROWTH
Information Patent Application
Method for shaping air bearing surface of magnetic head slider and...
- Publication number 20050118934
- Publication date Jun 2, 2005
- SAE MAGNETICS(H.K.) LTD.
- Osamu Fukuroi
- G11 - INFORMATION STORAGE
Information Patent Application
Membrane 3D IC fabrication
- Publication number 20050082626
- Publication date Apr 21, 2005
- Elm Technology Corporation
- Glenn Joseph Leedy
- G02 - OPTICS
Information Patent Application
Flexible and elastic dielectric integrated circuit
- Publication number 20050082641
- Publication date Apr 21, 2005
- Elm Technology Corporation
- Glenn Joseph Leedy
- G02 - OPTICS
Information Patent Application
SELECTIVE HEATING USING FLASH ANNEAL
- Publication number 20050074951
- Publication date Apr 7, 2005
- Woo Sik Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS-CONTROLLED DIELECTRIC INTEGRATED CIRCUIT
- Publication number 20050051841
- Publication date Mar 10, 2005
- Glenn Joseph Leedy
- G02 - OPTICS

Semiconductor on specified insulator

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Ionizing radiation blocking in IC chip to reduce soft errors

Ionizing radiation blocking in IC chip to reduce soft errors

Vertical group III-V nanowires on si, heterostructures, flexible ar...

Method for forming SOI substrate and apparatus for forming the same

Process for manufacturing a wafer by annealing of buried channels

Flexible and elastic dielectric integrated circuit

Fabrication of substrates with a useful layer of monocrystalline se...

Stress-controlled dielectric integrated circuit

Flexible and elastic dielectric integrated circuit

Process for manufacturing a wafer by annealing of buried channels

Method for producing SOI substrate

Method for manufacturing SOQ substrate

Membrane IC fabrication

Lithography device for semiconductor circuit pattern generation

Strained silicon-on-insulator by anodization of a buried p+ silicon...

Stress-controlled dielectric integrated circuit

Selective heating using flash anneal

Method of making an integrated circuit

Membrane 3D IC fabrication

Membrane 3D IC fabrication

Method of forming lattice-matched structure on silicon and structur...

Membrane 3D IC fabrication

Process for manufacturing an SOI wafer by annealing and oxidation o...

Selective heating using flash anneal

Fabrication of substrates with a useful layer of monocrystalline se...

Surface finishing of SOI substrates using an EPI process

Method for shaping an air bearing surface of a magnetic head slider

Strained silicon-on-insulator by anodization of a buried p+ silicon...

Buried conductor patterns formed by surface transformation of empty...

Zeolite films for low k applications

Patents Applicationslast 30 patents

PROCESS FOR MANUFACTURING A WAFER BY ANNEALING OF BURIED CHANNELS

METHOD FOR FORMING SOI SUBSTRATE AND APPARATUS FOR FORMING THE SAME

IONIZING RADIATION BLOCKING IN IC CHIP TO REDUCE SOFT ERRORS

VERTICAL GROUP III-V NANOWIRES ON SI, HETEROSTRUCTURES, FLEXIBLE AR...

PROCESS FOR MANUFACTURING A WAFER BY ANNEALING OF BURIED CHANNELS

Method for producing soi substrate

IONIZING RADIATION BLOCKING IN IC CHIP TO REDUCE SOFT ERRORS

Flexible and elastic dielectric integrated circuit

STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON...

Method for manufacturing SOQ substrate

Process for manufacturing a wafer by annealing of buried channels

FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SE...

Surface finishing of SOI substrates using an EPI process

SELECTIVE HEATING USING FLASH ANNEAL

STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON...

FABRICATION METHOD OF NITRIDE SEMICONDUCTORS AND NITRIDE SEMICONDUC...

Method for preventing sidewall consumption during oxidation of SGOI...

Process for manufacturing an SOI wafer by annealing and oxidation o...

Strained silicon-on-insulator by anodization of a buried p+ silicon...

Zeolite films for low k applications

Method of forming lattice-matched structure on silicon and structur...

METHODOF MAKING AN INTEGRATED CIRCUIT

Lithography device for semiconductor circuit pattern generation

Selective heating using flash anneal

Fabrication method of nitride semiconductors and nitride semiconduc...

Method for shaping air bearing surface of magnetic head slider and...

Membrane 3D IC fabrication

Flexible and elastic dielectric integrated circuit

SELECTIVE HEATING USING FLASH ANNEAL

STRESS-CONTROLLED DIELECTRIC INTEGRATED CIRCUIT