Substrate surface preparation

Industry

CPC
Y10S438/974

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

Current Industry

Y10S438/974Substrate surface preparation

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 10,312,217
- Issue date Jun 4, 2019
- INVENSAS BONDING TECHNOLOGIES, INC.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a field-effect structure and a nitrogen...
- Patent number 9,748,374
- Issue date Aug 29, 2017
- Infineon Technologies AG
- Hans-Joachim Schulze
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 9,391,143
- Issue date Jul 12, 2016
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 9,331,149
- Issue date May 3, 2016
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Controlled process and resulting device
- Patent number 9,159,605
- Issue date Oct 13, 2015
- Silicon Genesis Corporation
- Francois J. Henley
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 9,082,627
- Issue date Jul 14, 2015
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for producing a semiconductor device and field-effect semico...
- Patent number 9,029,243
- Issue date May 12, 2015
- Infineon Technologies AG
- Hans-Joachim Schulze
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Nanowire growth on dissimilar material
- Patent number 9,012,887
- Issue date Apr 21, 2015
- QuNano AB
- Lars Samuelson
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor device manufacturing method
- Patent number 8,987,148
- Issue date Mar 24, 2015
- Renesas Electronics Corporation
- Misato Sakamoto
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Vertical group III-V nanowires on si, heterostructures, flexible ar...
- Patent number 8,932,940
- Issue date Jan 13, 2015
- The Regents of the University of California
- Deli Wang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Controlled process and resulting device
- Patent number 8,835,282
- Issue date Sep 16, 2014
- Silicon Genesis Corporation
- Francois J. Henley
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Integrated circuit on corrugated substrate
- Patent number 8,786,057
- Issue date Jul 22, 2014
- Synopsys, Inc.
- Tsu-Jae King
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Organic light emitting diode display with improved crystallinity of...
- Patent number 8,519,386
- Issue date Aug 27, 2013
- Samsung Display Co., Ltd.
- Kyu-Sik Cho
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Organic light emitting diode display with improved on-current, and...
- Patent number 8,232,123
- Issue date Jul 31, 2012
- Samsung Electronics Co., Ltd.
- Kyu-Sik Cho
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Copper conducting wire structure and fabricating method thereof
- Patent number 8,177,989
- Issue date May 15, 2012
- AU Optronics Inc.
- Feng-Yuan Gan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 8,153,505
- Issue date Apr 10, 2012
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Growth of III-V compound semiconductor nanowires on silicon substrates
- Patent number 8,084,337
- Issue date Dec 27, 2011
- QuNano AB
- Lars Samuelson
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 8,053,329
- Issue date Nov 8, 2011
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods and structures for relaxation of strained layers
- Patent number 8,048,693
- Issue date Nov 1, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Fabrice Letertre
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Controlled process and resulting device
- Patent number 8,012,852
- Issue date Sep 6, 2011
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Leadframe treatment for enhancing adhesion of encapsulant thereto
- Patent number 8,012,886
- Issue date Sep 6, 2011
- ASM Assembly Materials Ltd.
- Yiu Fai Kwan
- C22 - METALLURGY FERROUS OR NON-FERROUS ALLOYS TREATMENT OF ALLOYS OR NON-FER...
Information Patent Grant
Methods of designing an integrated circuit on corrugated substrate
- Patent number 7,960,232
- Issue date Jun 14, 2011
- Synopsys, Inc.
- Tsu-Jae King
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Edge removal of silicon-on-insulator transfer wafer
- Patent number 7,951,718
- Issue date May 31, 2011
- Applied Materials, Inc.
- Raymond John Donohoe
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Spinel wafers and methods of preparation
- Patent number 7,919,815
- Issue date Apr 5, 2011
- Saint-Gobain Ceramics & Plastics, Inc.
- Brahmanandam Tanikella
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 7,871,898
- Issue date Jan 18, 2011
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Controlled process and resulting device
- Patent number 7,846,818
- Issue date Dec 7, 2010
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for low temperature bonding and bonded structure
- Patent number 7,807,549
- Issue date Oct 5, 2010
- Ziptronix, Inc.
- Qin-Yi Tong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Controlled cleaving process
- Patent number 7,781,305
- Issue date Aug 24, 2010
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Polarizer based on a nanowire grid
- Patent number 7,768,018
- Issue date Aug 3, 2010
- Wostec, Inc.
- Valery K. Smirnov
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Controlled process and resulting device
- Patent number 7,759,217
- Issue date Jul 20, 2010
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLED PROCESS AND RESULTING DEVICE
- Publication number 20140370687
- Publication date Dec 18, 2014
- Francois J. HENLEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20140284727
- Publication date Sep 25, 2014
- Tsu-Jae King Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE
- Publication number 20140206176
- Publication date Jul 24, 2014
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE
- Publication number 20140203407
- Publication date Jul 24, 2014
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Producing a Semiconductor Device and Field-Effect Semico...
- Publication number 20140097488
- Publication date Apr 10, 2014
- Hans-Joachim Schulze
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLED PROCESS AND RESULTING DEVICE
- Publication number 20130143389
- Publication date Jun 6, 2013
- Silicon Genesis Corporation
- FRANCOIS J. HENLEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING T...
- Publication number 20120262433
- Publication date Oct 18, 2012
- Samsung Electronics Co., Ltd.
- Kyu-Sik CHO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
- Publication number 20120238043
- Publication date Sep 20, 2012
- Renesas Electronics Corporation
- Misato SAKAMOTO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE GROWTH ON DISSIMILAR MATERIAL
- Publication number 20120145990
- Publication date Jun 14, 2012
- QuNano AB
- Lars Samuelson
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Method For Low Temperature Bonding And Bonded Structure
- Publication number 20120097638
- Publication date Apr 26, 2012
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLED PROCESS AND RESULTING DEVICE
- Publication number 20110294306
- Publication date Dec 1, 2011
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
VERTICAL GROUP III-V NANOWIRES ON SI, HETEROSTRUCTURES, FLEXIBLE AR...
- Publication number 20110253982
- Publication date Oct 20, 2011
- The Regents of the University of California
- Deli Wang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
METHOD FOR LOW TEMPERATURE BONDING AND AND BONDED STRUCTURE
- Publication number 20110067803
- Publication date Mar 24, 2011
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLED PROCESS AND RESULTING DEVICE
- Publication number 20100282323
- Publication date Nov 11, 2010
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
NANOWIRE GROWTH ON DISSIMILAR MATERIAL
- Publication number 20100252808
- Publication date Oct 7, 2010
- QuNano AB
- Lars Samuelson
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE
- Publication number 20100163169
- Publication date Jul 1, 2010
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND STRUCTURES FOR RELAXATION OF STRAINED LAYERS
- Publication number 20100032805
- Publication date Feb 11, 2010
- Fabrice LETERTRE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING T...
- Publication number 20090302319
- Publication date Dec 10, 2009
- Samsung Electronics Co., Ltd.
- Kyu-Sik CHO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE
- Publication number 20090263953
- Publication date Oct 22, 2009
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20090181477
- Publication date Jul 16, 2009
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A NONPLANAR TRANSISTOR WITH SIDEWALL SPACERS
- Publication number 20090149012
- Publication date Jun 11, 2009
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Edge Removal Of Silicon-On-Insulator Transfer Wafer
- Publication number 20090061545
- Publication date Mar 5, 2009
- Applied Materials, Inc.
- Raymond John Donohoe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20080290470
- Publication date Nov 27, 2008
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Controlled process and resulting device
- Publication number 20080286945
- Publication date Nov 20, 2008
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
LEADFRAME TREATMENT FOR ENHANCING ADHESION OF ENCAPSULANT THERETO
- Publication number 20080216921
- Publication date Sep 11, 2008
- Yiu Fai KWAN
- C22 - METALLURGY FERROUS OR NON-FERROUS ALLOYS TREATMENT OF ALLOYS OR NON-FER...
Information Patent Application
Controlled cleaving process
- Publication number 20080182386
- Publication date Jul 31, 2008
- Silicon Genesis Corporation
- Francois J. Henley
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
EDGE REMOVAL OF SILICON-ON-INSULATOR TRANSFER WAFER
- Publication number 20080138987
- Publication date Jun 12, 2008
- Applied Materials, Inc.
- Raymond John Donohoe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonplanar transistors with metal gate electrodes
- Publication number 20080090397
- Publication date Apr 17, 2008
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for low temperature bonding and bonded structure
- Publication number 20080063878
- Publication date Mar 13, 2008
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for low temperature bonding and bonded structure
- Publication number 20080053959
- Publication date Mar 6, 2008
- Ziptronix, Inc.
- Qin-Yi Tong
- H01 - BASIC ELECTRIC ELEMENTS

Substrate surface preparation

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for low temperature bonding and bonded structure

Semiconductor device having a field-effect structure and a nitrogen...

Method for low temperature bonding and bonded structure

Method for low temperature bonding and bonded structure

Controlled process and resulting device

Method for low temperature bonding and bonded structure

Method for producing a semiconductor device and field-effect semico...

Nanowire growth on dissimilar material

Semiconductor device manufacturing method

Vertical group III-V nanowires on si, heterostructures, flexible ar...

Controlled process and resulting device

Integrated circuit on corrugated substrate

Organic light emitting diode display with improved crystallinity of...

Organic light emitting diode display with improved on-current, and...

Copper conducting wire structure and fabricating method thereof

Method for low temperature bonding and bonded structure

Growth of III-V compound semiconductor nanowires on silicon substrates

Method for low temperature bonding and bonded structure

Methods and structures for relaxation of strained layers

Controlled process and resulting device

Leadframe treatment for enhancing adhesion of encapsulant thereto

Methods of designing an integrated circuit on corrugated substrate

Edge removal of silicon-on-insulator transfer wafer

Spinel wafers and methods of preparation

Method for low temperature bonding and bonded structure

Controlled process and resulting device

Method for low temperature bonding and bonded structure

Controlled cleaving process

Polarizer based on a nanowire grid

Controlled process and resulting device

Patents Applicationslast 30 patents

CONTROLLED PROCESS AND RESULTING DEVICE

Integrated Circuit On Corrugated Substrate

METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE

METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE

Method for Producing a Semiconductor Device and Field-Effect Semico...

CONTROLLED PROCESS AND RESULTING DEVICE

ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING T...

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

NANOWIRE GROWTH ON DISSIMILAR MATERIAL

Method For Low Temperature Bonding And Bonded Structure

CONTROLLED PROCESS AND RESULTING DEVICE

VERTICAL GROUP III-V NANOWIRES ON SI, HETEROSTRUCTURES, FLEXIBLE AR...

METHOD FOR LOW TEMPERATURE BONDING AND AND BONDED STRUCTURE

CONTROLLED PROCESS AND RESULTING DEVICE

NANOWIRE GROWTH ON DISSIMILAR MATERIAL

METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE

METHODS AND STRUCTURES FOR RELAXATION OF STRAINED LAYERS

ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING T...

METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE

Integrated Circuit On Corrugated Substrate

METHOD OF FORMING A NONPLANAR TRANSISTOR WITH SIDEWALL SPACERS

Edge Removal Of Silicon-On-Insulator Transfer Wafer

Integrated Circuit On Corrugated Substrate

Controlled process and resulting device

LEADFRAME TREATMENT FOR ENHANCING ADHESION OF ENCAPSULANT THERETO

Controlled cleaving process

EDGE REMOVAL OF SILICON-ON-INSULATOR TRANSFER WAFER

Nonplanar transistors with metal gate electrodes

Method for low temperature bonding and bonded structure

Method for low temperature bonding and bonded structure