Test of Sequential circuits

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CPC
G01R31/318522

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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G01R31/318522Test of Sequential circuits

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Patents Grantslast 30 patents

Information Patent Grant
Pseudo-random binary sequences (PRBS) generator for performing on-c...
- Patent number 11,774,496
- Issue date Oct 3, 2023
- INDIAN INSTITUTE OF TECHNOLOGY
- Mahendra Sakare
- G01 - MEASURING TESTING
Information Patent Grant
Sequential circuit, scan chain circuit including the same and integ...
- Patent number 10,422,832
- Issue date Sep 24, 2019
- Samsung Electronics Co., Ltd.
- Taiki Uemura
- G01 - MEASURING TESTING
Information Patent Grant
Timing optimizations in circuit designs using opposite clock edge t...
- Patent number 10,416,232
- Issue date Sep 17, 2019
- Xilinx, Inc.
- Guenter Stenz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor power and performance optimization
- Patent number 10,215,804
- Issue date Feb 26, 2019
- International Business Machines Corporation
- Sean M. Carey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid on-chip clock controller techniques for facilitating at-spee...
- Patent number 9,500,706
- Issue date Nov 22, 2016
- NVIDIA Corporation
- Amit Sanghani
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for efficient hierarchical chip testing and di...
- Patent number 9,404,969
- Issue date Aug 2, 2016
- Cadence Design Systems, Inc.
- Brion L. Keller
- G01 - MEASURING TESTING
Information Patent Grant
Digital fault detection circuit and method
- Patent number 7,999,559
- Issue date Aug 16, 2011
- Infineon Technologies AG
- Thomas Kuenemund
- G01 - MEASURING TESTING
Information Patent Grant
System and method for multiple cycle capture of chip state
- Patent number 7,325,164
- Issue date Jan 29, 2008
- Hewlett-Packard Development Company, L.P.
- Jeffrey C. Swanson
- G01 - MEASURING TESTING
Information Patent Grant
Circuits and methods for analyzing timing characteristics of sequen...
- Patent number 7,020,862
- Issue date Mar 28, 2006
- Xilinx, Inc.
- Peter H. Alfke
- G01 - MEASURING TESTING
Information Patent Grant
Sequential test pattern generation using clock-control design for t...
- Patent number 7,017,096
- Issue date Mar 21, 2006
- Agere Systems Inc.
- Miron Abramovici
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,925,404
- Issue date Aug 2, 2005
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Utilizing slow ASIC logic BIST to preserve timing integrity across...
- Patent number 6,901,543
- Issue date May 31, 2005
- Sun Microsystems, Inc.
- Michael C. Dorsey
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor integrated circuit having self-diagnosis test functio...
- Patent number 6,832,348
- Issue date Dec 14, 2004
- Matsushita Electric Industrial Co., Ltd.
- Atsushi Kawabe
- G01 - MEASURING TESTING
Information Patent Grant
VLSI chip test power reduction
- Patent number 6,816,990
- Issue date Nov 9, 2004
- International Business Machines Corporation
- Peilin Song
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,807,502
- Issue date Oct 19, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,801,870
- Issue date Oct 5, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Characterization of self-timed sequential circuits
- Patent number 6,799,134
- Issue date Sep 28, 2004
- Texas Instruments Incorporated
- Brian D. Borchers
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,792,374
- Issue date Sep 14, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,785,628
- Issue date Aug 31, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,785,627
- Issue date Aug 31, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for determining effect of on-chip noise on sig...
- Patent number 6,785,626
- Issue date Aug 31, 2004
- Micron Technology, Inc.
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit including a test signal generator
- Patent number 6,738,940
- Issue date May 18, 2004
- Micronas GmbH
- Ulrich Helmut Hummel
- G01 - MEASURING TESTING
Information Patent Grant
Circuits and methods for analyzing timing characteristics of sequen...
- Patent number 6,734,703
- Issue date May 11, 2004
- Xilinx, Inc.
- Peter H. Alfke
- G01 - MEASURING TESTING
Information Patent Grant
System and method for multiple cycle capture of chip state
- Patent number 6,662,313
- Issue date Dec 9, 2003
- Hewlett-Packard Development Company, L.P.
- Jeffrey C. Swanson
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device that fixes a potential on an input signal wiring
- Patent number 6,426,645
- Issue date Jul 30, 2002
- Seiko Epson Corporation
- Hiroshi Seki
- G01 - MEASURING TESTING
Information Patent Grant
Testable integrated circuit, integrated circuit design-for-testabil...
- Patent number 6,334,200
- Issue date Dec 25, 2001
- Semiconductor Technology Academic Research Center
- Hideo Fujiwara
- G01 - MEASURING TESTING
Information Patent Grant
Circuit for efficiently testing memory and shadow logic of a semico...
- Patent number 6,263,461
- Issue date Jul 17, 2001
- Synopsys, Inc.
- Timothy Ayres
- G01 - MEASURING TESTING
Information Patent Grant
Testing asynchronous circuits
- Patent number 6,246,971
- Issue date Jun 12, 2001
- Lucent Technologies Inc.
- Bahram Ghaffarzadeh Kermani
- G01 - MEASURING TESTING
Information Patent Grant
Method of design for testability at RTL and integrated circuit desi...
- Patent number 6,185,721
- Issue date Feb 6, 2001
- Matsushita Electric Industrial Co., Ltd.
- Toshinori Hosokawa
- G01 - MEASURING TESTING
Information Patent Grant
Circuit for efficiently testing memory and shadow logic of a semico...
- Patent number 6,088,823
- Issue date Jul 11, 2000
- Synopsys, Inc.
- Timothy Ayres
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SEQUENTIAL CIRCUIT, SCAN CHAIN CIRCUIT INCLUDING THE SAME AND INTEG...
- Publication number 20180088176
- Publication date Mar 29, 2018
- Samsung Electronics Co., Ltd.
- Taiki UEMURA
- G01 - MEASURING TESTING
Information Patent Application
DIGITAL FAULT DETECTION CIRCUIT AND METHOD
- Publication number 20100164507
- Publication date Jul 1, 2010
- INFINEON TECHNOLOGIES AG
- Thomas Kuenemund
- G01 - MEASURING TESTING
Information Patent Application
MONITORING DEGRADATION OF CIRCIUT SPEED
- Publication number 20090063061
- Publication date Mar 5, 2009
- International Business Machines Corporation
- RONALD J. BOLAM
- G01 - MEASURING TESTING
Information Patent Application
Testing A Pipeline In An Ic
- Publication number 20080244344
- Publication date Oct 2, 2008
- Koninklijke Philips Electronics N.V.
- Kees Van Kaam
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20040162693
- Publication date Aug 19, 2004
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
System and method for multiple cycle capture of chip state
- Publication number 20040153838
- Publication date Aug 5, 2004
- Jeffrey C. Swanson
- G01 - MEASURING TESTING
Information Patent Application
Characterization of self-timed sequential circuits
- Publication number 20040030512
- Publication date Feb 12, 2004
- Brian D. Borchers
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030204353
- Publication date Oct 30, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030204354
- Publication date Oct 30, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030204351
- Publication date Oct 30, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030204352
- Publication date Oct 30, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030200046
- Publication date Oct 23, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Sequential test pattern generation using clock-control design for t...
- Publication number 20030188245
- Publication date Oct 2, 2003
- Miron Abramovici
- G01 - MEASURING TESTING
Information Patent Application
VLSI chip test power reduction
- Publication number 20030145263
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Peilin Song
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for determining effect of on-chip noise on sig...
- Publication number 20030083840
- Publication date May 1, 2003
- William E. Corr
- G01 - MEASURING TESTING
Information Patent Application
Utilizing slow ASIC logic BIST to preserve timing integrity across...
- Publication number 20030074614
- Publication date Apr 17, 2003
- Michael C. Dorsey
- G01 - MEASURING TESTING
Information Patent Application
Detection of errors in dynamic circuits
- Publication number 20030042933
- Publication date Mar 6, 2003
- J. Michael Hill
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor integrated circuit having self-diagnosis test functio...
- Publication number 20010003196
- Publication date Jun 7, 2001
- MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- Atsushi Kawabe
- G01 - MEASURING TESTING

Test of Sequential circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Pseudo-random binary sequences (PRBS) generator for performing on-c...

Sequential circuit, scan chain circuit including the same and integ...

Timing optimizations in circuit designs using opposite clock edge t...

Semiconductor power and performance optimization

Hybrid on-chip clock controller techniques for facilitating at-spee...

Method and apparatus for efficient hierarchical chip testing and di...

Digital fault detection circuit and method

System and method for multiple cycle capture of chip state

Circuits and methods for analyzing timing characteristics of sequen...

Sequential test pattern generation using clock-control design for t...

Apparatus and method for determining effect of on-chip noise on sig...

Utilizing slow ASIC logic BIST to preserve timing integrity across...

Semiconductor integrated circuit having self-diagnosis test functio...

VLSI chip test power reduction

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Characterization of self-timed sequential circuits

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Integrated circuit including a test signal generator

Circuits and methods for analyzing timing characteristics of sequen...

System and method for multiple cycle capture of chip state

Semiconductor device that fixes a potential on an input signal wiring

Testable integrated circuit, integrated circuit design-for-testabil...

Circuit for efficiently testing memory and shadow logic of a semico...

Testing asynchronous circuits

Method of design for testability at RTL and integrated circuit desi...

Circuit for efficiently testing memory and shadow logic of a semico...

Patents Applicationslast 30 patents

SEQUENTIAL CIRCUIT, SCAN CHAIN CIRCUIT INCLUDING THE SAME AND INTEG...

DIGITAL FAULT DETECTION CIRCUIT AND METHOD

MONITORING DEGRADATION OF CIRCIUT SPEED

Testing A Pipeline In An Ic

Apparatus and method for determining effect of on-chip noise on sig...

System and method for multiple cycle capture of chip state

Characterization of self-timed sequential circuits

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Apparatus and method for determining effect of on-chip noise on sig...

Sequential test pattern generation using clock-control design for t...

VLSI chip test power reduction

Apparatus and method for determining effect of on-chip noise on sig...

Utilizing slow ASIC logic BIST to preserve timing integrity across...

Detection of errors in dynamic circuits

Semiconductor integrated circuit having self-diagnosis test functio...