the guiding structures being at least partially left in the finished device

Industry

CPC
H01L2224/81138

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/81138the guiding structures being at least partially left in the finished device

Industries

Patents Grantslast 30 patents

Information Patent Grant
Hybrid felts of electrospun nanofibers
- Patent number RE49773
- Issue date Jan 2, 2024
- NANOPAREIL, LLC
- Todd J. Menkhaus
Information Patent Grant
Optical-electrical interposers
- Patent number 10,859,776
- Issue date Dec 8, 2020
- The Regents of the University of California
- Sung-Joo Ben Yoo
- G02 - OPTICS
Information Patent Grant
Methods of fluxless micro-piercing of solder balls, and resulting d...
- Patent number 10,515,918
- Issue date Dec 24, 2019
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid felts of electrospun nanofibers
- Patent number 10,293,289
- Issue date May 21, 2019
- Nanopareil, LLC
- Todd J. Menkhaus
- C07 - ORGANIC CHEMISTRY
Information Patent Grant
Methods of fluxless micro-piercing of solder balls, and resulting d...
- Patent number 10,163,840
- Issue date Dec 25, 2018
- Micron Technology, Inc.
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,090,231
- Issue date Oct 2, 2018
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,049,998
- Issue date Aug 14, 2018
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 9,793,198
- Issue date Oct 17, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Hybrid felts of electrospun nanofibers
- Patent number 9,604,168
- Issue date Mar 28, 2017
- Nanopareil, LLC
- Todd Menkhaus
- D01 - NATURAL OR ARTIFICIAL THREADS OR FIBRES SPINNING
Information Patent Grant
Thin wafer handling and known good die test method
- Patent number 9,601,398
- Issue date Mar 21, 2017
- Invensas Corporation
- Charles G. Woychik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 9,437,566
- Issue date Sep 6, 2016
- Invensas Corporation
- Rajesh Katkar
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for fabricating multi-chip module with multi-level interposer
- Patent number 9,281,268
- Issue date Mar 8, 2016
- Oracle International Corporation
- Eugene M. Chow
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Interconnection and assembly of three-dimensional chip packages
- Patent number 8,772,920
- Issue date Jul 8, 2014
- Oracle International Corporation
- Hiren D. Thacker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Maintaining alignment in a multi-chip module using a compressible s...
- Patent number 8,742,576
- Issue date Jun 3, 2014
- Oracle International Corporation
- Hiren D. Thacker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of fluxless micro-piercing of solder balls, and resulting d...
- Patent number 8,669,173
- Issue date Mar 11, 2014
- Micron Technology
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electrical Component
- Patent number 8,558,356
- Issue date Oct 15, 2013
- EPCOS AG
- Juergen Kiwitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods of fluxless micro-piercing of solder balls, and resulting d...
- Patent number 8,436,478
- Issue date May 7, 2013
- Micron Technology, Inc.
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-chip module with multi-level interposer
- Patent number 8,218,334
- Issue date Jul 10, 2012
- Oracle America, Inc.
- Eugene M. Chow
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Scalable transfer-join bonding lock-and-key structures
- Patent number 8,076,177
- Issue date Dec 13, 2011
- International Business Machines Corporation
- Kuan-Neng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for facilitating proximity communication and p...
- Patent number 7,888,175
- Issue date Feb 15, 2011
- Oracle America, Inc.
- Ashok V. Krishnamoorthy
- G02 - OPTICS
Information Patent Grant
Methods of fluxless micro-piercing of solder balls, and resulting d...
- Patent number 7,749,887
- Issue date Jul 6, 2010
- Micron Technology, Inc.
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and apparatus for precisely aligning integrated circuit chips
- Patent number 7,619,312
- Issue date Nov 17, 2009
- Sun Microsystems, Inc.
- Ashok V. Krishnamoorthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for facilitating proximity communication and p...
- Patent number 7,592,707
- Issue date Sep 22, 2009
- Sun Microsystems, Inc.
- Ashok V. Krishnamoorthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component and method for production of a semiconducto...
- Patent number 7,566,585
- Issue date Jul 28, 2009
- Infineon Technologies AG
- Horst Theuss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with integrated circuit support
- Patent number 7,420,265
- Issue date Sep 2, 2008
- Stats Chippac Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer scale thin film package
- Patent number 7,348,261
- Issue date Mar 25, 2008
- International Business Machines Corporation
- David Vincent Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Expansion constrained die stack
- Patent number 7,173,325
- Issue date Feb 6, 2007
- C-Core Technologies, Inc.
- Kalu K. Vasoya
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wafer scale thin film package
- Patent number 6,627,998
- Issue date Sep 30, 2003
- International Business Machines Corporation
- David Vincent Caletka
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for assembling a chip carrier to a semiconductor device
- Patent number 6,220,499
- Issue date Apr 24, 2001
- International Business Machines Corporation
- Peter J. Brofman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a high melting point solder ball coated with a low...
- Patent number 6,050,481
- Issue date Apr 18, 2000
- International Business Machines Corporation
- Brian D. Chapman
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR ARRANGEMENT
- Publication number 20230005877
- Publication date Jan 5, 2023
- Hans-Hermann Oppermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL-ELECTRICAL INTERPOSERS
- Publication number 20190310433
- Publication date Oct 10, 2019
- The Regents of the University of California
- Sung-Joo Ben Yoo
- G02 - OPTICS
Information Patent Application
METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...
- Publication number 20190019774
- Publication date Jan 17, 2019
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...
- Publication number 20180019191
- Publication date Jan 18, 2018
- Invensas Corporation
- Cyprian Emeka UZOH
- B32 - LAYERED PRODUCTS
Information Patent Application
Thin Wafer Handling and Known Good Die Test Method
- Publication number 20150014688
- Publication date Jan 15, 2015
- Invensas Corporation
- Charles G. Woychik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS RELIEF STRUCTURE
- Publication number 20140151090
- Publication date Jun 5, 2014
- Industrial Technology Research Institute
- Jui-Hung Chien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE, ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURIN...
- Publication number 20140140022
- Publication date May 22, 2014
- Kabushiki Kaisha Toshiba
- Nobuhiro Yamamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN WAFER HANDLING AND KNOWN GOOD DIE TEST METHOD
- Publication number 20140054763
- Publication date Feb 27, 2014
- Invensas Corporation
- Charles G. Woychik
- G01 - MEASURING TESTING
Information Patent Application
METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...
- Publication number 20130234328
- Publication date Sep 12, 2013
- Micron Technology, Inc.
- Teck Kheng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAINTAINING ALIGNMENT IN A MULTI-CHIP MODULE USING A COMPRESSIBLE S...
- Publication number 20130207261
- Publication date Aug 15, 2013
- Oracle International Corporation
- Hiren D. Thacker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION AND ASSEMBLY OF THREE-DIMENSIONAL CHIP PACKAGES
- Publication number 20130015578
- Publication date Jan 17, 2013
- Oracle International Corporation
- Hiren D. Thacker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP MODULE WITH MULTI-LEVEL INTERPOSER
- Publication number 20120266464
- Publication date Oct 25, 2012
- ORACLE INTERNATIONAL CORPORATION
- Eugene M. Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE, ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURIN...
- Publication number 20120250275
- Publication date Oct 4, 2012
- Nobuhiro Yamamoto
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Controlling Solder Bump Profiles by Increasing Heights of Solder Re...
- Publication number 20110285013
- Publication date Nov 24, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yao-Chun Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SCALABLE TRANSFER-JOIN BONDING LOCK-AND-KEY STRUCTURES
- Publication number 20110278740
- Publication date Nov 17, 2011
- International Business Machines Corporation
- Kuan-Neng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP MODULE WITH MULTI-LEVEL INTERPOSER
- Publication number 20110223778
- Publication date Sep 15, 2011
- ORACLE INTERNATIONAL CORPORATION
- Eugene M. Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...
- Publication number 20100264541
- Publication date Oct 21, 2010
- Micron Technology, Inc.
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electrical Component
- Publication number 20100091473
- Publication date Apr 15, 2010
- Juergen Kiwitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR FACILITATING PROXIMITY COMMUNICATION AND P...
- Publication number 20090280601
- Publication date Nov 12, 2009
- SUN MICROSYSTEMS, INC.
- Ashok V. Krishnamoorthy
- G02 - OPTICS
Information Patent Application
METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...
- Publication number 20090152719
- Publication date Jun 18, 2009
- Teck Kheng Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
WAFER SCALE THIN FILM PACKAGE
- Publication number 20080119029
- Publication date May 22, 2008
- David Vincent Caletka
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method and apparatus for precisely aligning integrated circuit chips
- Publication number 20080018000
- Publication date Jan 24, 2008
- Ashok V. Krishnamoorthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATED CIRCUIT SUPPORT
- Publication number 20070108559
- Publication date May 17, 2007
- STATS ChipPAC Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCTION OF A SEMICONDUCTO...
- Publication number 20070092992
- Publication date Apr 26, 2007
- INFINEON TECHNOLOGIES AG
- Horst Theuss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for facilitating proximity communication and p...
- Publication number 20070075442
- Publication date Apr 5, 2007
- Ashok V. Krishnamoorthy
- G02 - OPTICS
Information Patent Application
Expansion constrained die stack
- Publication number 20050056922
- Publication date Mar 17, 2005
- Kalu K. Vasoya
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Wafer scale thin film package
- Publication number 20030199121
- Publication date Oct 23, 2003
- David Vincent Caletka
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

the guiding structures being at least partially left in the finished device

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Hybrid felts of electrospun nanofibers

Optical-electrical interposers

Methods of fluxless micro-piercing of solder balls, and resulting d...

Hybrid felts of electrospun nanofibers

Methods of fluxless micro-piercing of solder balls, and resulting d...

Conductive connections, structures with such connections, and metho...

Conductive connections, structures with such connections, and metho...

Conductive connections, structures with such connections, and metho...

Hybrid felts of electrospun nanofibers

Thin wafer handling and known good die test method

Conductive connections, structures with such connections, and metho...

Method for fabricating multi-chip module with multi-level interposer

Interconnection and assembly of three-dimensional chip packages

Maintaining alignment in a multi-chip module using a compressible s...

Methods of fluxless micro-piercing of solder balls, and resulting d...

Electrical Component

Methods of fluxless micro-piercing of solder balls, and resulting d...

Multi-chip module with multi-level interposer

Scalable transfer-join bonding lock-and-key structures

Method and apparatus for facilitating proximity communication and p...

Methods of fluxless micro-piercing of solder balls, and resulting d...

Method and apparatus for precisely aligning integrated circuit chips

Method and apparatus for facilitating proximity communication and p...

Semiconductor component and method for production of a semiconducto...

Integrated circuit package system with integrated circuit support

Wafer scale thin film package

Expansion constrained die stack

Wafer scale thin film package

Method for assembling a chip carrier to a semiconductor device

Method of making a high melting point solder ball coated with a low...

Patents Applicationslast 30 patents

METHOD FOR MANUFACTURING A SEMICONDUCTOR ARRANGEMENT

OPTICAL-ELECTRICAL INTERPOSERS

METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...

CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...

Thin Wafer Handling and Known Good Die Test Method

STRESS RELIEF STRUCTURE

ELECTRONIC DEVICE, ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURIN...

THIN WAFER HANDLING AND KNOWN GOOD DIE TEST METHOD

METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...

MAINTAINING ALIGNMENT IN A MULTI-CHIP MODULE USING A COMPRESSIBLE S...

INTERCONNECTION AND ASSEMBLY OF THREE-DIMENSIONAL CHIP PACKAGES

MULTI-CHIP MODULE WITH MULTI-LEVEL INTERPOSER

ELECTRONIC DEVICE, ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURIN...

Controlling Solder Bump Profiles by Increasing Heights of Solder Re...

SCALABLE TRANSFER-JOIN BONDING LOCK-AND-KEY STRUCTURES

MULTI-CHIP MODULE WITH MULTI-LEVEL INTERPOSER

METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...

Electrical Component

METHOD AND APPARATUS FOR FACILITATING PROXIMITY COMMUNICATION AND P...

METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING D...

WAFER SCALE THIN FILM PACKAGE

Method and apparatus for precisely aligning integrated circuit chips

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATED CIRCUIT SUPPORT

SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCTION OF A SEMICONDUCTO...

Method and apparatus for facilitating proximity communication and p...

Expansion constrained die stack

Wafer scale thin film package