To facilitate selective etching

Industry

CPC
Y10S438/924

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

Current Industry

Y10S438/924To facilitate selective etching

Industries

Patents Grantslast 30 patents

Information Patent Grant
Microstructure processing method and microstructure processing appa...
- Patent number 10,336,609
- Issue date Jul 2, 2019
- Hitachi, Ltd.
- Keiji Watanabe
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Etch rate modulation through ion implantation
- Patent number 10,332,748
- Issue date Jun 25, 2019
- Varian Semiconductor Equipment Associates, Inc.
- Rajesh Prasad
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Atomic layer etching of tungsten and other metals
- Patent number 10,096,487
- Issue date Oct 9, 2018
- Lam Research Corporation
- Wenbing Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bottom processing
- Patent number 10,020,204
- Issue date Jul 10, 2018
- Applied Materials, Inc.
- Joseph M. Ranish
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch rate modulation through ion implantation
- Patent number 9,934,982
- Issue date Apr 3, 2018
- Varian Semiconductor Equipment Associates, Inc.
- Rajesh Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,395,584
- Issue date Jul 19, 2016
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,069,215
- Issue date Jun 30, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,052,551
- Issue date Jun 9, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
8933498
- Patent number 8,933,498
- Issue date Jan 13, 2015
- G02 - OPTICS
Information Patent Grant
Method for fabricating fine pattern in semiconductor device
- Patent number 8,163,654
- Issue date Apr 24, 2012
- Hynix Semiconductor Inc.
- Jin-Ki Jung
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming a carbon nanotube-based contact to semiconductor
- Patent number 8,044,388
- Issue date Oct 25, 2011
- Nantero, Inc.
- Jonathan W. Ward
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for producing a transistor with metallic source and drain
- Patent number 8,021,986
- Issue date Sep 20, 2011
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for fabricating fine pattern in semiconductor device
- Patent number 7,867,913
- Issue date Jan 11, 2011
- Hynix Semiconductor Inc.
- Jin-Ki Jung
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 7,808,009
- Issue date Oct 5, 2010
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Optical components and production thereof
- Patent number 7,794,610
- Issue date Sep 14, 2010
- Commissariat a l'Energie Atomique
- Claire Divoux
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Thin film transistor array panel and method for manufacturing the same
- Patent number 7,662,715
- Issue date Feb 16, 2010
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 7,605,902
- Issue date Oct 20, 2009
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a carbon nanotube-based contact to semiconductor
- Patent number 7,563,711
- Issue date Jul 21, 2009
- Nantero, Inc.
- Jonathan W. Ward
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming pattern of semiconductor device
- Patent number 7,553,771
- Issue date Jun 30, 2009
- Hynix Semiconductor Inc.
- Seo Min Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistor array panel and method for manufacturing the same
- Patent number 7,550,768
- Issue date Jun 23, 2009
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistor array panel and method for manufacturing the same
- Patent number 7,301,170
- Issue date Nov 27, 2007
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Liquid crystal display device and method of fabricating the same
- Patent number 7,279,383
- Issue date Oct 9, 2007
- LG.Philips LCD Co., Ltd.
- JaeSung You
- G02 - OPTICS
Information Patent Grant
Method of varying etch selectivities of a film
- Patent number 7,247,578
- Issue date Jul 24, 2007
- Intel Corporation
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 7,173,281
- Issue date Feb 6, 2007
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a layer sequence and a method of manufactur...
- Patent number 7,144,820
- Issue date Dec 5, 2006
- Infineon Technologies AG
- Kwon O. Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor constructions, DRAM constructions, and semiconductive mat...
- Patent number 7,115,926
- Issue date Oct 3, 2006
- Micron Technology, Inc.
- John T. Moore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Elevated source drain disposable spacer CMOS
- Patent number 7,074,684
- Issue date Jul 11, 2006
- International Business Machines Corporation
- Ronnen A. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a trench in a layer or a layer stack on a semico...
- Patent number 7,049,241
- Issue date May 23, 2006
- Infineon Technologies AG
- Uwe Paul Schroeder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Elevated source drain disposable spacer CMOS
- Patent number 6,777,298
- Issue date Aug 17, 2004
- International Business Machines Corporation
- Ronnen A. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating EEPROM having tunnel window area
- Patent number 6,773,991
- Issue date Aug 10, 2004
- Oki Electric Industry Co, Ltd.
- Toshiyuki Orita
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Etch Rate Modulation Through Ion Implantation
- Publication number 20180182636
- Publication date Jun 28, 2018
- Varian Semiconductor Equipment Associates, Inc.
- Rajesh Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20140139762
- Publication date May 22, 2014
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE
- Publication number 20120184104
- Publication date Jul 19, 2012
- Hynix Semiconductor Inc.
- Jin-Ki JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20120120336
- Publication date May 17, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE
- Publication number 20110076851
- Publication date Mar 31, 2011
- Hynix Semiconductor Inc.
- Jin-Ki JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN
- Publication number 20110003443
- Publication date Jan 6, 2011
- COMMISS. A L'ENERGIE ATOM ET AUX ENERG ALTERNA
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming a Carbon Nanotube-Based Contact to Semiconductor
- Publication number 20100148183
- Publication date Jun 17, 2010
- Jonathan W. Ward
- B82 - NANO-TECHNOLOGY
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20090322698
- Publication date Dec 31, 2009
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
METHOD OF FORMING A CARBON NANOTUBE-BASED CONTACT TO SEMICONDUCTOR
- Publication number 20090173964
- Publication date Jul 9, 2009
- Nantero, Inc.
- Jonathan W. Ward
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE
- Publication number 20090087968
- Publication date Apr 2, 2009
- Hynix Semiconductor Inc.
- Jin-Ki JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20090040445
- Publication date Feb 12, 2009
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
Method of Forming Pattern of Semiconductor Device
- Publication number 20080286954
- Publication date Nov 20, 2008
- Hynix Semiconductor Inc.
- Seo Min Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20080166827
- Publication date Jul 10, 2008
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- G02 - OPTICS
Information Patent Application
Thin Film Transistor Array Panel and Method for Manufacturing the Same
- Publication number 20080073674
- Publication date Mar 27, 2008
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- G02 - OPTICS
Information Patent Application
Method of varying etch selectivities of a film
- Publication number 20070197042
- Publication date Aug 23, 2007
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Optical components and production therof
- Publication number 20070137989
- Publication date Jun 21, 2007
- Claire Divoux
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Semiconductor device and method of fabricating the same
- Publication number 20060151791
- Publication date Jul 13, 2006
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
Thin film transistor array panel and method for manufacturing the same
- Publication number 20060050192
- Publication date Mar 9, 2006
- Samsung Electronics Co., Ltd.
- Beom-Seok Cho
- G02 - OPTICS
Information Patent Application
Method of varying etch selectivities of a film
- Publication number 20050148131
- Publication date Jul 7, 2005
- Justin K. Brask
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing a layer sequence and a method of manufactur...
- Publication number 20050148189
- Publication date Jul 7, 2005
- Kwon O. Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a trench in a layer or a layer stack on a semico...
- Publication number 20050106890
- Publication date May 19, 2005
- Uwe Paul Schroeder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Elevated source drain disposable spacer CMOS
- Publication number 20040266124
- Publication date Dec 30, 2004
- Ronnen A. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Liquid crystal display device and method of fabricating the same
- Publication number 20040263703
- Publication date Dec 30, 2004
- JaeSung You
- G02 - OPTICS
Information Patent Application
Semiconductor device and method of fabricating the same
- Publication number 20040084673
- Publication date May 6, 2004
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
Elevated source drain disposable spacer CMOS
- Publication number 20030232464
- Publication date Dec 18, 2003
- Ronnen A. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of farbricating EEPROM having tunnel window area
- Publication number 20030176039
- Publication date Sep 18, 2003
- Oki Electric Industry Co., Ltd.
- Toshiyuki Orita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for evaluating process chambers used for semiconductor manuf...
- Publication number 20020065616
- Publication date May 30, 2002
- Yaojian Leng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating EEPROM having tunnel window area
- Publication number 20020037640
- Publication date Mar 28, 2002
- Toshiyuki Orita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capacitor constructions, DRAM constructions, semiconductive materia...
- Publication number 20010034129
- Publication date Oct 25, 2001
- John T. Moore
- H01 - BASIC ELECTRIC ELEMENTS

To facilitate selective etching

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Microstructure processing method and microstructure processing appa...

Etch rate modulation through ion implantation

Atomic layer etching of tungsten and other metals

Bottom processing

Etch rate modulation through ion implantation

Semiconductor device and method of fabricating the same

Semiconductor device and method of fabricating the same

Semiconductor device and method of fabricating the same

8933498

Method for fabricating fine pattern in semiconductor device

Method of forming a carbon nanotube-based contact to semiconductor

Method for producing a transistor with metallic source and drain

Method for fabricating fine pattern in semiconductor device

Semiconductor device and method of fabricating the same

Optical components and production thereof

Thin film transistor array panel and method for manufacturing the same

Semiconductor device and method of fabricating the same

Method of forming a carbon nanotube-based contact to semiconductor

Method of forming pattern of semiconductor device

Thin film transistor array panel and method for manufacturing the same

Thin film transistor array panel and method for manufacturing the same

Liquid crystal display device and method of fabricating the same

Method of varying etch selectivities of a film

Semiconductor device and method of fabricating the same

Method of manufacturing a layer sequence and a method of manufactur...

Capacitor constructions, DRAM constructions, and semiconductive mat...

Elevated source drain disposable spacer CMOS

Method for forming a trench in a layer or a layer stack on a semico...

Elevated source drain disposable spacer CMOS

Method of fabricating EEPROM having tunnel window area

Patents Applicationslast 30 patents

Etch Rate Modulation Through Ion Implantation

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE

METHOD FOR PRODUCING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN

Method of Forming a Carbon Nanotube-Based Contact to Semiconductor

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

METHOD OF FORMING A CARBON NANOTUBE-BASED CONTACT TO SEMICONDUCTOR

METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Method of Forming Pattern of Semiconductor Device

THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME

Thin Film Transistor Array Panel and Method for Manufacturing the Same

Method of varying etch selectivities of a film

Optical components and production therof

Semiconductor device and method of fabricating the same

Thin film transistor array panel and method for manufacturing the same

Method of varying etch selectivities of a film

Method of manufacturing a layer sequence and a method of manufactur...

Method for forming a trench in a layer or a layer stack on a semico...

Elevated source drain disposable spacer CMOS

Liquid crystal display device and method of fabricating the same

Semiconductor device and method of fabricating the same

Elevated source drain disposable spacer CMOS

Method of farbricating EEPROM having tunnel window area

Method for evaluating process chambers used for semiconductor manuf...

Method of fabricating EEPROM having tunnel window area

Capacitor constructions, DRAM constructions, semiconductive materia...