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H01L2224/82039

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/82039using a laser

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Chip assembling on adhesion layer or dielectric layer, extending be...
- Patent number 12,218,098
- Issue date Feb 4, 2025
- Infineon Technologies AG
- Petteri Palm
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stack with cascade and vertical connections
- Patent number 12,068,283
- Issue date Aug 20, 2024
- Intel Corporation
- Min-Tih Ted Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for interconnecting stacked semiconductor devices
- Patent number 12,033,983
- Issue date Jul 9, 2024
- Intel Corporation
- Junfeng Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wiring substrate, semiconductor package having the wiring substrate...
- Patent number 11,908,783
- Issue date Feb 20, 2024
- Amkor Technology Singapore Holding Pte Ltd.
- Naoki Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit board structure and method for manufacturing a circuit boar...
- Patent number 11,792,941
- Issue date Oct 17, 2023
- IMBERATEK, LLC
- Risto Tuominen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing an electronic module and electronic module
- Patent number 11,716,816
- Issue date Aug 1, 2023
- IMBERATEK, LLC
- Antti Iihola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for interconnecting stacked semiconductor devices
- Patent number 11,676,944
- Issue date Jun 13, 2023
- Intel Corporation
- Junfeng Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and structures for increasing the allowable die size in TMV...
- Patent number 11,488,892
- Issue date Nov 1, 2022
- Amkor Technology Singapore Holding Pte Ltd.
- Louis W. Nicholls
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip assembling on adhesion layer or dielectric layer, extending be...
- Patent number 11,309,277
- Issue date Apr 19, 2022
- Infineon Technologies AG
- Petteri Palm
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stackable electronic package and method of fabricating same
- Patent number 11,309,304
- Issue date Apr 19, 2022
- General Electric Company
- James Sabatini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wiring substrate, semiconductor package having the wiring substrate...
- Patent number 11,189,553
- Issue date Nov 30, 2021
- Amkor Technology Singapore Holding Pte Ltd.
- Naoki Hayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stack with cascade and vertical connections
- Patent number 11,171,114
- Issue date Nov 9, 2021
- Intel Corporation
- Min-Tih Ted Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a printed circuit board structure
- Patent number 11,172,576
- Issue date Nov 9, 2021
- AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Johannes Stahr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor devices, corresponding device...
- Patent number 11,133,242
- Issue date Sep 28, 2021
- STMicroelectronics S.r.l.
- Michele Derai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit board structure and method for manufacturing a circuit boar...
- Patent number 11,134,572
- Issue date Sep 28, 2021
- IMBERATEK, LLC
- Risto Tuominen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power integrated module
- Patent number 11,024,588
- Issue date Jun 1, 2021
- Delta Electronics (Shanghai) Co., Ltd.
- Jianhong Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for interconnecting stacked semiconductor devices
- Patent number 11,024,607
- Issue date Jun 1, 2021
- Intel Corporation
- Junfeng Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor devices and corresponding sem...
- Patent number 10,971,375
- Issue date Apr 6, 2021
- STMicroelectronics S.r.l.
- Federico Giovanni Ziglioli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip package structure and manufacturing method thereof
- Patent number 10,950,557
- Issue date Mar 16, 2021
- Powertech Technology Inc.
- Li-Chih Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor devices, corresponding device...
- Patent number 10,818,578
- Issue date Oct 27, 2020
- STMicroelectronics S.r.l.
- Michele Derai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronics package having a multi-thickness conductor layer and me...
- Patent number 10,770,444
- Issue date Sep 8, 2020
- General Electric Company
- Risto Ilkka Tuominen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plating interconnect for silicon chip
- Patent number 10,755,940
- Issue date Aug 25, 2020
- Texas Instruments Incorporated
- Jerard Canuto Malado
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and method thereof
- Patent number 10,734,249
- Issue date Aug 4, 2020
- Silergy Semiconductor Technology (Hangzhou) Ltd.
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip assembling on adhesion layer or dielectric layer, extending be...
- Patent number 10,734,351
- Issue date Aug 4, 2020
- Infineon Technologies AG
- Petteri Palm
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of measuring misalignment of chips, a method of fabricating...
- Patent number 10,720,365
- Issue date Jul 21, 2020
- Samsung Electronics Co., Ltd.
- Younghoon Sohn
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor devices and methods of making semiconductor devices
- Patent number 10,714,408
- Issue date Jul 14, 2020
- Amkor Technology, Inc.
- Louis W. Nicholls
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming substrate including embe...
- Patent number 10,665,662
- Issue date May 26, 2020
- STATS ChipPAC Pte. Ltd.
- JinHee Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for interconnecting stacked semiconductor devices
- Patent number 10,643,975
- Issue date May 5, 2020
- Intel Corporation
- Junfeng Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power integrated module
- Patent number 10,629,550
- Issue date Apr 21, 2020
- Delta Electronics (Shanghai) Co., Ltd.
- Jianhong Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded silicon substrate fan-out type 3D packaging structure
- Patent number 10,559,525
- Issue date Feb 11, 2020
- HUATIAN TECHNOLOGY (KUNSHAN) ELECTRONICS CO., LTD.
- Daquan Yu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...
- Publication number 20220044991
- Publication date Feb 10, 2022
- Amkor Technology Singapore Holding Pte. Ltd
- Naoki HAYASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE STACK WITH CASCADE AND VERTICAL CONNECTIONS
- Publication number 20220037291
- Publication date Feb 3, 2022
- Intel Corporation
- Min-Tih Ted Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit board structure and method for manufacturing a circuit boar...
- Publication number 20210392752
- Publication date Dec 16, 2021
- ImberaTek LLC
- Risto Tuominen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING AN ELECTRONIC MODULE AND ELECTRONIC MODULE
- Publication number 20210329788
- Publication date Oct 21, 2021
- IMBERATEK, LLC
- Antti Iihola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND STRUCTURES FOR INCREASING THE ALLOWABLE DIE SIZE IN TMV...
- Publication number 20210166992
- Publication date Jun 3, 2021
- Amkor Technology Singapore Holding Pte. Ltd.
- Louis W. Nicholls
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING DEVICE...
- Publication number 20210013134
- Publication date Jan 14, 2021
- STMicroelectronics S.r.l.
- Michele DERAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER INTEGRATED MODULE
- Publication number 20200303326
- Publication date Sep 24, 2020
- DELTA ELECTRONICS (SHANGHAI) CO., LTD.
- Jianhong ZENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...
- Publication number 20200066623
- Publication date Feb 27, 2020
- J-DEVICES CORPORATION
- Naoki HAYASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLATING INTERCONNECT FOR SILICON CHIP
- Publication number 20200027737
- Publication date Jan 23, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Jerard Canuto Malado
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE AND METHOD THEREOF
- Publication number 20190198351
- Publication date Jun 27, 2019
- SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit Board Structure
- Publication number 20190150288
- Publication date May 16, 2019
- AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Johannes Stahr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP ASSEMBLING ON ADHESION LAYER OR DIELECTRIC LAYER, EXTENDING BE...
- Publication number 20180358326
- Publication date Dec 13, 2018
- INFINEON TECHNOLOGIES AG
- Petteri PALM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
- Publication number 20180240789
- Publication date Aug 23, 2018
- GENERAL ELECTRIC COMPANY
- James Sabatini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR INTERCONNECTING STACKED SEMICONDUCTOR DEVICES
- Publication number 20180145055
- Publication date May 24, 2018
- Intel Corporation
- Junfeng Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming a POP Device with Embedd...
- Publication number 20180068937
- Publication date Mar 8, 2018
- STATS ChipPAC Pte Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Substrate Including Embe...
- Publication number 20180053819
- Publication date Feb 22, 2018
- STATS ChipPAC Pte Ltd.
- JinHee Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20170373038
- Publication date Dec 28, 2017
- MEDIATEK INC.
- Tzu-Hung LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making an Embedded Wafer Level B...
- Publication number 20140367848
- Publication date Dec 18, 2014
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPONENT-EMBEDDED SUBSTRATE MANUFACTURING METHOD AND COMPONENT-EMB...
- Publication number 20140347835
- Publication date Nov 27, 2014
- Meiko Electronics Co., Ltd.
- Ryoichi Shimizu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CERAMIC MULTILAYER SUBSTRATE AND METHOD FOR PRODUCING THE SAME
- Publication number 20140312539
- Publication date Oct 23, 2014
- Yoshiko OKADA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Component-Embedded Substrate Manufacturing Method and Component-Emb...
- Publication number 20140299367
- Publication date Oct 9, 2014
- Meiko Electronics Co., Ltd.
- Yoshio Imamura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE-DOWN PACKAGE-ON-PACKAGE DEVICE
- Publication number 20140291866
- Publication date Oct 2, 2014
- Toong Erh Ooi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED MICROELECTRONIC PACKAGES HAVING SIDEWALL CONDUCTORS AND MET...
- Publication number 20140264945
- Publication date Sep 18, 2014
- WENG F. YAP
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...
- Publication number 20140248742
- Publication date Sep 4, 2014
- Javier Soto Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED ELECTRONIC DEVICE PACKAGE STRUCTURE
- Publication number 20140225272
- Publication date Aug 14, 2014
- Unimicron Technology Corp.
- Yu-Chen Chuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Leveled Chip Packaging Structure and Method Thereof
- Publication number 20140217587
- Publication date Aug 7, 2014
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STRUCTURE IN WHICH WIRING IS PROVIDED ON ITS SURFACE
- Publication number 20140183751
- Publication date Jul 3, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL STRUCTURE FOR WIRING FORMATION
- Publication number 20140182887
- Publication date Jul 3, 2014
- PANASONIC CORPORATION
- Shingo YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED TYPE POWER DEVICE MODULE
- Publication number 20140159212
- Publication date Jun 12, 2014
- Industrial Technology Research Institute
- Yin-Po Hung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED PACKAGING USING RECONSTITUTED WAFERS
- Publication number 20140151900
- Publication date Jun 5, 2014
- BROADCOM CORPORATION
- Kevin Kunzhong Hu
- H01 - BASIC ELECTRIC ELEMENTS

using a laser

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Chip assembling on adhesion layer or dielectric layer, extending be...

Die stack with cascade and vertical connections

Method for interconnecting stacked semiconductor devices

Wiring substrate, semiconductor package having the wiring substrate...

Circuit board structure and method for manufacturing a circuit boar...

Method for manufacturing an electronic module and electronic module

Method for interconnecting stacked semiconductor devices

Methods and structures for increasing the allowable die size in TMV...

Chip assembling on adhesion layer or dielectric layer, extending be...

Stackable electronic package and method of fabricating same

Wiring substrate, semiconductor package having the wiring substrate...

Die stack with cascade and vertical connections

Method for producing a printed circuit board structure

Method of manufacturing semiconductor devices, corresponding device...

Circuit board structure and method for manufacturing a circuit boar...

Power integrated module

Method for interconnecting stacked semiconductor devices

Method of manufacturing semiconductor devices and corresponding sem...

Stacked chip package structure and manufacturing method thereof

Method of manufacturing semiconductor devices, corresponding device...

Electronics package having a multi-thickness conductor layer and me...

Plating interconnect for silicon chip

Package structure and method thereof

Chip assembling on adhesion layer or dielectric layer, extending be...

Method of measuring misalignment of chips, a method of fabricating...

Semiconductor devices and methods of making semiconductor devices

Semiconductor device and method of forming substrate including embe...

Method for interconnecting stacked semiconductor devices

Power integrated module

Embedded silicon substrate fan-out type 3D packaging structure

Patents Applicationslast 30 patents

WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...

DIE STACK WITH CASCADE AND VERTICAL CONNECTIONS

Circuit board structure and method for manufacturing a circuit boar...

METHOD FOR MANUFACTURING AN ELECTRONIC MODULE AND ELECTRONIC MODULE

METHODS AND STRUCTURES FOR INCREASING THE ALLOWABLE DIE SIZE IN TMV...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING DEVICE...

POWER INTEGRATED MODULE

WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE...

PLATING INTERCONNECT FOR SILICON CHIP

PACKAGE STRUCTURE AND METHOD THEREOF

Circuit Board Structure

CHIP ASSEMBLING ON ADHESION LAYER OR DIELECTRIC LAYER, EXTENDING BE...

STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME

METHOD FOR INTERCONNECTING STACKED SEMICONDUCTOR DEVICES

Semiconductor Device and Method of Forming a POP Device with Embedd...

Semiconductor Device and Method of Forming Substrate Including Embe...

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

Semiconductor Device and Method of Making an Embedded Wafer Level B...

COMPONENT-EMBEDDED SUBSTRATE MANUFACTURING METHOD AND COMPONENT-EMB...

CERAMIC MULTILAYER SUBSTRATE AND METHOD FOR PRODUCING THE SAME

Component-Embedded Substrate Manufacturing Method and Component-Emb...

EMBEDDED DIE-DOWN PACKAGE-ON-PACKAGE DEVICE

STACKED MICROELECTRONIC PACKAGES HAVING SIDEWALL CONDUCTORS AND MET...

MULTI-CHIP PACKAGE HAVING A SUBSTRATE WITH A PLURALITY OF VERTICALL...

EMBEDDED ELECTRONIC DEVICE PACKAGE STRUCTURE

Wafer Leveled Chip Packaging Structure and Method Thereof

THREE-DIMENSIONAL STRUCTURE IN WHICH WIRING IS PROVIDED ON ITS SURFACE

THREE-DIMENSIONAL STRUCTURE FOR WIRING FORMATION

STACKED TYPE POWER DEVICE MODULE

STACKED PACKAGING USING RECONSTITUTED WAFERS