3667115

Information

• Patent Grant
• 3667115

• References
• Source

• Patent Number

  3,667,115

• Date Filed

  Not available

• Date Issued

  Tuesday, June 6, 1972
  52 years ago

• CPC

  • H01L29/7816 - Lateral DMOS transistors
  • H01L21/8236 - Combination of enhancement and depletion transistors
  • H01L23/291 - Oxides or nitrides or carbides
  • H01L27/00 - Devices consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate
  • H01L27/0716 - in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
  • H01L29/00 - Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier
  • H01L29/7801 - DMOS transistors
  • H01L2924/0002 - Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
  • Y10S148/053 - Field effect transistors fets
  • Y10S148/145 - Shaped junctions
  • Y10S148/167 - Two diffusions in one hole
  • Y10S438/92 - Controlling diffusion profile by oxidation
  • Y10S438/98 - Utilizing process equivalents or options

• US Classifications

  • 438 - Semiconductor device manufacturing: process
  • 148 - Metal treatment
  • 257 - Active solid-state devices