The present invention relates generally to electrical interconnections in integrated circuits and more particularly to hybridization techniques for improved bonding in electrical interconnections.
Indium bump interconnects are commonly used in semiconductor device hybridization techniques to interconnect electronic devices (for example, semiconductor chips and detectors) to integrated circuit devices (for example, read out integrated circuits (ROICs)). Specifically, prior to hybridization, indium bumps are deposited over contact pads of the electronic device and/or the integrated circuit device. The contact pads are then aligned and pressed together to form an electrically conductive bond between the electronic device and the integrated circuit device. A problem often faced with this hybridization technique is the formation of, for example, indium oxide on the indium bumps when they are exposed to air or during various processes prior to hybridization. Indium oxide typically forms as a film on the indium bumps and may be non-uniform from bump to bump across the device. This indium oxide film acts as a barrier to contact between the contact pad of the electronic device and the indium bump and therefore prevents the formation of strong, reliable and consistent bonds there between. The reliability and performance of the electrical interconnection is therefore limited, resulting in yield degradation of the integrated circuit.
With reference to
Prior attempts to solve this problem have aimed at minimizing the indium oxide formed on indium bump interconnect structures or removing the formed indium oxide film prior to hybridization, typically via chemical surface treatments and/or additional chemical processing steps. The industry standard, for example, uses chemical etches (fluxes) and dry etch surface treatments to remove indium oxide film prior to hybridization. Although this practice may initially remove the indium oxide film on the bumps, the indium oxide immediately re-develops when again exposed to air or more processing, therefore presenting the same problems described above.
In a general embodiment, an electrical interconnection between an electronic device and an integrated circuit device is provided. The electrical interconnection includes an electronic device having contact pads configured with at least one 3-dimensional projection extending therefrom. When an interconnect structure is deposited there between, and the electronic device and the integrated circuit device are pressed together with sufficient force, the at least one 3-dimensional projection of the contact pad is configured to penetrate, or break through, an outermost layer of the interconnect structure and form a consistent bond with the interconnect structure underneath the outermost layer.
According to an aspect of the invention, an electronic device for interconnection with an integrated circuit device is provided. The electronic device includes an interconnection surface configured to oppose an integrated circuit device contact pad of the integrated circuit device with an interconnect structure disposed therebetween. The electronic device additionally includes at least one electronic device contact pad disposed on the interconnection surface for bonding to the interconnect structure. The at least one electronic device contact pad has at least one 3-dimensional projection configured to extend from the electronic device contact pad toward the integrated circuit device contact pad. The at least one 3-dimensional projection is configured to aid in bonding the electronic device contact pad of the electronic device to the interconnect structure to electrically couple the electronic device to the integrated circuit device.
According to an embodiment of any paragraph(s) of this summary, the at least one 3-dimensional projection includes a plurality of discrete 3-dimensional projections.
According to another embodiment of any paragraph(s) of this summary, the plurality of discrete 3-dimensional projections are evenly distributed on the electronic device contact pad.
According to another embodiment of any paragraph(s) of this summary, the plurality of discrete 3-dimensional projections are randomly distributed on the electronic device contact pad.
According to another embodiment of any paragraph(s) of this summary, the at least one 3-dimensional projection is circular.
According to another embodiment of any paragraph(s) of this summary, the at least one 3-dimensional projection is linear.
According to another aspect of the invention, an electrical interconnection for an integrated circuit is provided. The electrical interconnection includes an integrated circuit device including at least one integrated circuit device contact pad, and an electronic device electrically interconnected with the integrated circuit device. The electronic device includes an interconnection surface opposing the integrated circuit device contact pad and at least one electronic device contact pad disposed on the interconnection surface. The at least one electronic device contact pad has at least one 3-dimensional projection extending from the electronic device contact pad toward the at least one integrated circuit device contact pad. The electrical interconnection also includes an interconnect structure disposed between and bonded to the at least one integrated circuit device contact pad and the at least one electronic device contact pad to electronically couple the electronic device to the integrated circuit device. The at least one 3-dimensional projection of the at least one electronic device contact pad aids in bonding the at least one electronic device contact pad to the interconnect structure.
According to an embodiment of any paragraph(s) of this summary, the integrated circuit device is part of a read out integrated circuit (ROIC).
According to another embodiment of any paragraph(s) of this summary, the interconnect structure is an indium bump interconnect structure.
According to another embodiment of any paragraph(s) of this summary, the indium bump interconnect structure includes a film of indium oxide on an outermost surface thereof and the at least one 3-dimensional projection is configured to penetrate the film of the indium oxide and bond to the indium bump interconnect structure.
According to another aspect of the invention, a method of manufacturing an electronic device for interconnection with an integrated circuit device in an integrated circuit is provided. The method includes a step of providing the electronic device. The electronic device includes an interconnection surface configured to oppose the integrated circuit device with an interconnect structure disposed therebetween. At least one electronic device contact pad is disposed on the interconnection surface for bonding to the interconnect structure. The method also includes a step of forming at least one 3-dimensional projection on the at least one electronic device contact pad. The at least one 3-dimensional projection is configured to extend from the electronic device contact pad toward the integrated circuit device and is configured to aid in bonding the electronic device contact pad to the interconnect structure to electrically couple the electronic device to the integrated circuit device.
According to an embodiment of any paragraph(s) of this summary, the forming includes depositing material onto at least a part of the at least one electronic device contact pad to form the at least one 3-dimensional projection on a surface of the electronic device contact pad configured to oppose the integrated circuit device.
According to another embodiment of any paragraph(s) of this summary, the forming includes removing material from at least part of the at least one electronic device contact pad to form the at least one 3-dimensional projection on a surface of the electronic device contact pad configured to oppose the integrated circuit device.
According to another embodiment of any paragraph(s) of this summary, the removing includes a wet etch technique.
According to another embodiment of any paragraph(s) of this summary, the removing includes a dry etch technique.
According to another aspect of the invention, a method of forming an electrical interconnection between an electronic device and an integrated circuit device is provided. The method includes a step of providing the electronic device. The electronic device includes an interconnection surface configured to oppose the integrated circuit device with an interconnect structure disposed therebetween. At least one electronic device contact pad is disposed on the interconnection surface for bonding to the interconnect structure. The at least one electronic device contact pad includes at least one 3-dimensional projection configured to extend from the electronic device contact pad toward the integrated circuit device. The method additionally includes a step of providing the integrated circuit device having at least one integrated circuit device contact pad. The method then includes a step of depositing the interconnect structure on at least one of the electronic device contact pad and/or the integrated circuit device contact pad. The method then additionally includes a step of aligning the electronic device contact pad with the integrated circuit device contact pad and a step of pressing the electronic device contact pad and the integrated circuit contact pad together with the interconnect structure therebetween to form an electrical connection between the electronic device and the integrated circuit device.
The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
The annexed drawings show various aspects of the invention.
According to a general embodiment, an electrical interconnection between an electronic device (for example, an integrated circuit chip or detector) to an integrated circuit device (for example, a read out integrated circuit (ROIC), a printed circuit board (PCB), a patterned ceramic substrate, or another integrated circuit chip) is provided. The electrical interconnection includes an electronic device having contact pads configured with at least one 3-dimensional projection extending therefrom (toward contact pads of the integrated circuit device). When an interconnect structure is deposited therebetween for hybridization, and the electronic device and the integrated circuit device are pressed together with sufficient force, the at least one 3-dimensional projection of the electronic device contact pad is configured to penetrate, or break through, an outermost layer of the interconnect structure and form a consistent bond with the interconnect structure underneath the outermost layer. For example, in an embodiment in which the interconnect structure is an indium bump interconnect structure, the at least one 3-dimensional projection of the electronic device contact pad is configured to penetrate, or break through, any indium oxide film that may be formed on the outermost layer of the indium bump interconnect structure. In this way, upon pressing the electronic device and the integrated circuit device together with sufficient force, the at least one 3-dimensional projection of the electronic device contact pad is configured to contact and form a consistent bond with the exposed indium bump interconnect structure underneath the penetrated indium oxide film thereon, which otherwise may have prevented contact and bonding between the contact pad of the electronic device and the indium bump interconnect structure.
Referring to
The electronic device 26 is configured to be electrically interconnected with the integrated circuit device 27 via the interconnect structure 30. Specifically, the interconnect structure 30 may be deposited on at least one of the integrated circuit device contact pad 28 and the at least one electronic device contact pad 36 of the electronic device 26 prior to hybridization and the electronic device contact pad 36 and the integrated circuit device contact pad 28 being aligned and pressed together to form a bond therebetween. As already described, the interconnect structure 30 may be an indium bump interconnect structure 30, however the same principles apply to embodiments in which the interconnect structure 30 is another material. For example, the interconnect structure 30 may be made of indium silver alloys or lead silver alloys, among other suitable materials. For purposes of the present disclosure, an embodiment in which the interconnect structure 30 is an indium bump interconnect structure 30 will be described.
In the embodiment in which the interconnect structure 30 is an indium bump interconnect structure 30, an indium oxide film 32 may be present on an outermost surface of the indium bump interconnect structure 30. The indium oxide film 32 may be formed when the indium bump interconnect structure 30 is exposed to air or when the indium bump interconnect structure 30 undergoes various cleaning processes prior to hybridization. As previously described with reference to
Specifically, the at least one electronic device contact pad 36 includes at least one 3-dimensional projection 40 configured to extend from the at least one electronic device contact pad 36 toward the integrated circuit device contact pad 28 and interconnect structure 30 prior to hybridization. A material of the 3-dimensional projection 40 may include a conductive material and, for example, may be the same material as the electronic device contact pad 36. The at least one 3-dimensional projection 40 may be of any suitable size, depending on the size of the contact pad 36 and the indium bump interconnect structure 30. For example, the at least one 3-dimensional projection 40 may be between 5 to 50 microns long. Additionally, the at least one 3-dimensional projection 40 may include a plurality of 3-dimensional projections 40. The number of 3-dimensional projections 40 may also depend on the size of the contact pad 36, the indium bump interconnect structure 30 and each individual 3-dimensional projection 40 and may be optimized based on modelling and/or empirical evidence.
With reference to
In any embodiment or combination, the at least one 3-dimensional projection 40 creates a non-planar topography of the contact pad 36 and increases the surface area of the contact pad 36 for improved bonding between the contact pad 36 and the interconnect structure 30. Accordingly, the at least one 3-dimensional projection 40 is configured to impart increased contact force and/or mechanical agitation on the interconnect structure 30 when pressed together, compared to a planar surface, to penetrate, or break through, an outermost surface of the interconnect structure 30 and form a reliable, high strength bond between the contact pad 36 and the interconnect structure 30 underneath the outermost surface of the interconnect structure 30.
Specifically in the embodiment in which the interconnect structure 30 is the indium bump interconnect structure 30, for example, the indium oxide film 32 on the outermost surface of the indium bump interconnect structure 30 does not need to be minimized or removed prior to hybridization to form strong, reliable, and consistent bonds between the contact pad 36 and the interconnect structure 30. Instead, the at least one 3-dimensional projection 40 of the contact pad 36 mechanically penetrates the indium oxide film 32 on the outermost surface of the indium bump interconnect structure 30.
With reference to
The step 54 of forming the at least one 3-dimensional projection may include depositing material onto at least part of the at least one electronic device contact pad to form the at least one 3-dimensional projection on a surface of the electronic device contact pad configured to oppose the integrated circuit device. The material may include a conductive material and, for example, may be the same material as the electronic device contact pad. In this way, the electronic device contact pad may be built up in certain areas on the electronic device contact pad to form a non-planar topography of the electronic device contact pad and increase the surface area thereof. For example, photolithography lift-off defined deposition may be used to deposit specific 3-dimensional shapes to form the at least one 3-dimensional projection. In another embodiment, the step of forming the at least one 3-dimensional projection may include removing material from at least part of the at least one electronic device contact pad to form the at least one 3-dimensional projection on a surface of the electronic device contact pad configured to oppose the integrated circuit device. In this way, the electronic device contact pad may be, for example, etched away in certain areas on the electronic device contact pad to form a non-planar topography of the electronic device contact pad and increase the surface area thereof. For example, the removing may include a wet etching technique or a dry etching technique.
With reference to
The method 60 additionally includes a step 64 of providing the integrated circuit device having at least one integrated circuit device contact pad. The integrated circuit device may be, for example, part of an ROIC. The method 60 then includes a step 66 of depositing the interconnect structure on at least one of the electronic device contact pad and/or the integrated circuit device contact pad. For example, the interconnect structure may be deposited on the at least one electronic device contact pad. The method 60 then includes a step 68 of aligning the electronic device, particularly the at least one electronic device contact pad, with the integrated circuit device, particularly the integrated circuit device contact pad, and a step 70 of pressing the electronic device and the integrated circuit device together with the interconnect structure therebetween. A force required for the step 70 of pressing will depend on the size of the electronic device and the integrated circuit device, as well as the size and arrangement of the at least one 3-dimensional projection.
Upon the step 70 of pressing the electronic device and the integrated circuit device together with the interconnect structure therebetween, the at least one 3-dimensional projection of the contact pad is configured to penetrate, or break through, an outermost surface of the interconnect structure. A reliable, high strength, and consistent bond may then be formed between the electronic device contact pad and the interconnect structure underneath the outermost surface of the interconnect structure to form an electrical connection between the electronic device and the integrated circuit device.
Although the invention has been shown and described with respect to a certain preferred embodiment or embodiments, it is obvious that equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described elements (components, assemblies, devices, compositions, etc.), the terms (including a reference to a “means”) used to describe such elements are intended to correspond, unless otherwise indicated, to any element which performs the specified function of the described element (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary embodiment or embodiments of the invention. In addition, while a particular feature of the invention may have been described above with respect to only one or more of several illustrated embodiments, such feature may be combined with one or more other features of the other embodiments, as may be desired and advantageous for any given or particular application. For example, aspects and features of the invention may be applied to flip-chip bonding of an electronic device onto another electronic device, PCB, or patterned ceramic substrate.