Patent Grant
11227758
The present disclosure relates generally to charge detection mass spectrometry instruments, and more specifically to performing mass and charge measurements with such instruments.
Mass Spectrometry provides for the identification of chemical components of a substance by separating gaseous ions of the substance according to ion mass and charge. Various instruments and techniques have been developed for determining the masses of such separated ions, and one such technique is known as charge detection mass spectrometry (CDMS). In CDMS, ion mass is determined as a function of measured ion mass-to-charge ratio, typically referred to as “m/z,” and measured ion charge.
High levels of uncertainty in m/z and charge measurements with early CDMS detectors has led to the development of an electrostatic linear ion trap (ELIT) detector in which ions are made to oscillate back and forth through a charge detection cylinder. Multiple passes of ions through such a charge detection cylinder provides for multiple measurements for each ion, and it has been shown that the uncertainty in charge measurements decreases with n1/2, where n is the number of charge measurements. However, spurious, extraneous and/or other charges picked up on the charge detector can present challenges to distinguishing valid and detectable charges from charge detector noise, and this effect becomes even more pronounced as charge signal levels approach the noise floor of the charge detector. Accordingly, it is desirable to seek improvements in ELIT design and/or operation which extend the range of valid, detectable charge measurements over those obtainable using current ELIT designs.
The present disclosure may comprise one or more of the features recited in the attached claims, and/or one or more of the following features and combinations thereof. In a first aspect, a system for trapping ions for measurement thereof may comprise an electrostatic linear ion trap (ELIT), a source of ions configured to supply ions to the ELIT, a processor operatively coupled to the ELIT, and a memory having instructions stored therein which, when executed by the at least one processor, cause the at least one processor to (i) produce at least one control signal to open the ELIT to allow ions supplied by the source of ions to enter the ELIT, (ii) determine an ion inlet frequency corresponding to a frequency of ions flowing from the source of ions into the open ELIT, (iii) generate or receive a target ion charge value, (iv) determine an optimum threshold value as a function of the target ion charge value and the determined ion inlet frequency, and (v) produce at least one control signal to close the ELIT when a charge of an ion within the ELIT exceeds the optimum threshold value to thereby trap the ion in the ELIT.
In a second aspect, a method is provided for trapping in an electrostatic linear ion trap (ELIT) ions supplied by a source of ions for measurement thereof. The method may comprise (i) producing, with a processor, at least one control signal to open the ELIT to allow ions supplied by the source of ions to enter the ELIT, (ii) determining, with the processor, an ion inlet frequency corresponding to a frequency of ions flowing from the source of ions into the open ELIT, (iii) generating or receiving, with the processor, a target ion charge value, (iv) determining, with the processor, an optimum threshold value as a function of the target ion charge value and the determined ion inlet frequency, and (v) producing, with the processor, at least one control signal to close the ELIT when a charge of an ion within the ELIT exceeds the optimum threshold value to thereby trap the ion in the ELIT.
In a third aspect, a system for separating ions may comprise the ion trapping system described in either of the above aspects, wherein the source of ions is configured to generate ions from a sample, and at least one ion separation instrument configured to separate the generated ions as a function of at least one molecular characteristic, wherein ions exiting the at least one ion separation instrument are supplied to the ELIT.
In a fourth aspect, a system for separating ions may comprise an ion source configured to generate ions from a sample, a first mass spectrometer configured to separate the generated ions as a function of mass-to-charge ratio, an ion dissociation stage positioned to receive ions exiting the first mass spectrometer and configured to dissociate ions exiting the first mass spectrometer, a second mass spectrometer configured to separate dissociated ions exiting the ion dissociation stage as a function of mass-to-charge ratio, and the system described above in the third aspect coupled in parallel with and to the ion dissociation stage such that the system of the third aspect can receive ions exiting either of the first mass spectrometer and the ion dissociation stage, wherein the system of the third aspect is a charge detection mass spectrometer (CDMS), wherein masses of precursor ions exiting the first mass spectrometer are measured using the CDMS, mass-to-charge ratios of dissociated ions of precursor ions having mass values below a threshold mass are measured using the second mass spectrometer, and mass-to-charge ratios and charge values of dissociated ions of precursor ions having mass values at or above the threshold mass are measured using the CDMS.
For the purposes of promoting an understanding of the principles of this disclosure, reference will now be made to a number of illustrative embodiments shown in the attached drawings and specific language will be used to describe the same.
This disclosure relates to an electrostatic linear ion trap (ELIT) and an apparatus and method for selecting and modifying a charge detection threshold during trigger trapping operation thereof to facilitate trapping in the ELIT of weakly-charge ions, i.e., ions with low charge magnitudes. For purposes of this disclosure, the phrase “charge detection event” is defined as detection of a charge associated with an ion passing a single time through a charge detector of the ELIT, and the phrase “ion measurement event” is defined as a collection of charge detection events resulting from oscillation of an ion back and forth through the charge detector a selected number of times or for a selected time period.
Referring to
In the illustrated embodiment, the ELIT 14 illustratively includes a charge detector CD surrounded by a ground chamber or cylinder GC and operatively coupled to opposing ion mirrors M1, M2 respectively positioned at opposite ends thereof. The ion mirror M1 is operatively positioned between the ion source 12 and one end of the charge detector CD, and ion mirror M2 is operatively positioned at the opposite end of the charge detector CD. Each ion mirror M1, M2 defines a respective ion mirror region R1, R2 therein. The regions R1, R2 of the ion mirrors M1, M2, the charge detector CD, and the spaces between the charge detector CD and the ion mirrors M1, M2 together define a longitudinal axis 22 centrally therethrough which illustratively represents an ideal ion travel path through the ELIT 14 and between the ion mirrors M1, M2 as will be described in greater detail below.
In the illustrated embodiment, voltage sources V1, V2 are electrically connected to the ion mirrors M1, M2 respectively. Each voltage source V1, V2 illustratively includes one or more switchable DC voltage sources which may be controlled or programmed to selectively produce a number, N, programmable or controllable voltages, wherein N may be any positive integer. Illustrative examples of such voltages will be described below with respect to
The voltage sources V1, V2 are illustratively shown electrically connected by a number, P, of signal paths to a conventional processor 16 including a memory 18 having instructions stored therein which, when executed by the processor 16, cause the processor 16 to control the voltage sources V1, V2 to produce desired DC output voltages for selectively establishing ion transmission and ion reflection electric fields, TEF, REF respectively, within the regions R1, R2 of the respective ion mirrors M1, M2. P may be any positive integer. In some alternate embodiments, either or both of the voltage sources V1, V2 may be programmable to selectively produce one or more constant output voltages. In other alternative embodiments, either or both of the voltage sources V1, V2 may be configured to produce one or more time-varying output voltages of any desired shape. It will be understood that more or fewer voltage sources may be electrically connected to the mirrors M1, M2 in alternate embodiments.
The charge detector CD is illustratively provided in the form of an electrically conductive cylinder which is electrically connected to a signal input of a charge sensitive preamplifier CP, and the signal output of the charge preamplifier CP is electrically connected to the processor 16. With an ion trapped within the ELIT 14 and oscillating back and forth between the ion mirrors M1, M2 as will be described in further detail below, the charge preamplifier CP is illustratively operable in a conventional manner to detect a charge (CH) induced on the charge detection cylinder CD as the ion passes therethrough between the ion mirrors M1, M2, to produce a charge detection signal (CHD) corresponding thereto and to supply the charge detection signal CHD to the processor 16. The processor 16 is, in turn, illustratively operable to receive and digitize the charge detection signal CHD produced by the charge preamplifier CP, and to store the digitized charge detection signal CHD in the memory 18.
The processor 16 is further illustratively coupled to one or more peripheral devices 20 (PD) for providing peripheral device signal input(s) (PDS) to the processor 16 and/or to which the processor 16 provides signal peripheral device signal output(s) (PDS). In some embodiments, the peripheral devices 20 include at least one of a conventional display monitor, a printer and/or other output device, and in such embodiments the memory 18 has instructions stored therein which, when executed by the processor 16, cause the processor 16 to control one or more such output peripheral devices 20 to display and/or record analyses of stored, digitized charge detection signals. In some embodiments, a conventional ion detector 24, e.g., in the form of one or more microchannel plate detectors, is positioned adjacent to the ion exit aperture of the ion mirror M2, and at least one output of the ion detector 24 is electrically connected to the processor 16. The ion detector 24 is operable in a conventional manner to detect ions exiting the ion mirror M2 of the ELIT 14 and to provide corresponding ion detection signal MCP to the processor 16. As will be described in greater detail below, ion detection information provided by the detector 24 to the processor 16 may be used to facilitate adjustment one or more of the components and/or operating conditions of the ELIT 14 to ensure adequate detection of ions passing through the charge detection cylinder CD.
The voltage sources V1, V2 are illustratively controlled in a manner, as described in detail below, which selectively traps an ion entering the ELIT 14 and causes the trapped ion to oscillate back and forth between the ion mirrors M1, M2 such that it repeatedly passes through the charge detection cylinder CD. A plurality of charge and oscillation period values are measured at the charge detector CD, and the recorded results are processed to determine mass-to-charge ratio, charge and mass values of the ion trapped in the ELIT 14.
Referring now to
A second mirror electrode 302 of each ion mirror M1, M2 is spaced apart from the first mirror electrode 301 by a space having width W2. The second mirror electrode 302, like the mirror electrode 301, has thickness W1 and defines a passageway centrally therethrough of diameter P2. A third mirror electrode 303 of each ion mirror M1, M2 is likewise spaced apart from the second mirror electrode 302 by a space of width W2. The third mirror electrode 302 has thickness W1 and defines a passageway centrally therethrough of width P1.
A fourth mirror electrode 304 is spaced apart from the third mirror electrode 303 by a space of width W2. The fourth mirror electrode 304 illustratively has a thickness of W1 and is formed by a respective end of the ground cylinder, GC disposed about the charge detector CD. The fourth mirror electrode 304 defines an aperture A2 centrally therethrough which is illustratively conical in shape and increases linearly between the internal and external faces of the ground cylinder GC from a diameter P3 defined at the internal face of the ground cylinder GC to the diameter P1 at the external face of the ground cylinder GC (which is also the internal face of the respective ion mirror M1, M2).
The spaces defined between the mirror electrodes 301-304 may be voids in some embodiments, i.e., vacuum gaps, and in other embodiments such spaces may be filled with one or more electrically non-conductive, e.g., dielectric, materials. The mirror electrodes 301-304 and the endcaps 32 are axially aligned, i.e., collinear, such that a longitudinal axis 22 passes centrally through each aligned passageway and also centrally through the apertures A1, A2. In embodiments in which the spaces between the mirror electrodes 301-304 include one or more electrically non-conductive materials, such materials will likewise define respective passageways therethrough which are axially aligned, i.e., collinear, with the passageways defined through the mirror electrodes 301-304 and which illustratively have diameters of P2 or greater. Illustratively, P1>P3>P2, although in other embodiments other relative diameter arrangements are possible.
A region R1 is defined between the apertures A1, A2 of the ion mirror M1, and another region R2 is likewise defined between the apertures A1, A2 of the ion mirror M2. The regions R1, R2 are illustratively identical to one another in shape and in volume.
As described above, the charge detector CD is illustratively provided in the form of an elongated, electrically conductive cylinder positioned and spaced apart between corresponding ones of the ion mirrors M1, M2 by a space of width W3. In one embodiment, W1>W3>W2, and P1>P3>P2, although in alternate embodiments other relative width arrangements are possible. In any case, the longitudinal axis 22 illustratively extends centrally through the passageway defined through the charge detection cylinder CD, such that the longitudinal axis 22 extends centrally through the combination of the passageways defined by the regions R1, R2 of the ion mirrors M1, M2 and the passageway defined through the charge detection cylinder CD. In operation, the ground cylinder GC is illustratively controlled to ground potential such that the fourth mirror electrode 304 of each ion mirror M1, M2 is at ground potential at all times. In some alternate embodiments, the fourth mirror electrode 304 of either or both of the ion mirrors M1, M2 may be set to any desired DC reference potential, or to a switchable DC or other time-varying voltage source.
In the embodiment illustrated in
Each ion mirror M1, M2 is illustratively controllable and switchable, by selective application of the voltages D1-D4, between an ion transmission mode (
As illustrated by example in
Example sets of output voltages D1-D4 produced by the voltage sources V1, V2 respectively to control a respective one of the ion mirrors M1, M2 to the ion transmission and reflection modes described above are shown in TABLE I below. It will be understood that the following values of D1-D4 are provided only by way of example, and that other values of one or more of D1-D4 may alternatively be used.
While the ion mirrors M1, M2 and the charge detection cylinder CD are illustrated in
Referring now to
The processor 16 illustrated in
In some embodiments which include the signal conditioning circuit 45 briefly described above, such a signal conditioning circuit 45 may illustratively be provided in the form of a conventional band-pass filter circuit configured to pass signals within a suitable frequency range so as to pass legitimate charge detection event signals to the comparator 44 but to block higher frequency noise pulses from reaching the comparator 44, thereby reducing the likelihood of noise-triggered detection events. In other embodiments which include the signal conditioning circuit 45, such a signal conditioning circuit 45 may be provided in the form of a signal shaping amplifier configured to produce an edge-detected Gaussian-shaped output signal, i.e., an output signal shaped like a Gaussian function. Such a signal shaping amplifier will illustratively convert the rising edge of a charge detection signal CHD to a short Gaussian-shaped pulse and the falling edge of the charge detection signal CHD to a similar Gaussian-shaped pulse of opposite polarity. In this embodiment, the comparator 44 will produce an “active” trigger signal TR when either of the Gaussian-shaped signals exceeds a switching threshold voltage of the comparator 44.
In the illustrated embodiment, the processor 50 is operable, i.e., programmed, to control the threshold voltage generator 46 to produce the threshold voltage CTH. In one embodiment, the threshold voltage generator 46 is implemented in the form of a conventional controllable DC voltage source configured to be responsive to a digital threshold control signal THC, e.g., in the form of a single serial digital signal or multiple parallel digital signals, to produce an analog threshold voltage CTH having a polarity and a magnitude defined by the digital threshold control signal THC. In alternate embodiments, the threshold voltage generator 46 may be provided in the form of a conventional digital-to-analog (D/A) converter responsive to a serial or parallel digital threshold voltage TCH to produce an analog threshold voltage CTH having a magnitude, and in some embodiments a polarity, defined by the digital threshold control signals THC. In some such embodiments, the D/A converter may form part of the processor 50. Those skilled in the art will recognize other conventional circuits and techniques for selectively producing the threshold voltage CTH of desired magnitude and/or polarity, and it will be understood that any such other conventional circuits and/or techniques are intended to fall within the scope of this disclosure.
In addition to the foregoing functions performed by the processor 50, the processor 50 is further operable to receive and process the output signals MCP produced by the ion detector 24, in embodiments which include the ion detector 24, and to control the voltage sources V1, V2 as described above with respect to
In any case, the embodiment of the processor 16 depicted in
As briefly described above with respect to
As illustrated in
Referring now to
Referring now to
The probability of trapping at least one ion in the ELIT 14 is relatively low using the random trapping mode of operation due to the timed control of M1 to ion reflection mode of operation without any confirmation that at least one ion is trapped within the ELIT 14. The number of trapped ions within the ELIT 14 during the random trapping mode of operation follows a Poisson distribution, and it is generally understood that random or “continuous” trapping is relatively inefficient as less than 0.1% of the ions are trapped.
In other embodiments particularly relevant to this disclosure, the processor 50 is operable, i.e., programmed, to control the ELIT 14 in a “trigger trapping mode” which illustratively carries a substantially greater probability of trapping a single ion therein. In a first version of the trigger trapping mode, the processor 50 is operable to monitor the trigger signal TR produced by the comparator 44 and to control the voltage source V1 to control the ion mirror M1 to the reflection mode (R) of operation to trap an ion within the ELIT 14 if/when the trigger signal TR changes the “inactive” to the “active” state thereof. In some embodiments, the processor 50 may be operable to control the voltage source V1 to control the ion mirror M1 to the reflection mode (R) immediately upon detection of the change of state of the trigger signal TR, and in other embodiments the processor 50 may be operable to control the voltage source V1 to control the ion mirror M1 to the reflection mode (R) upon expiration of a predefined delay period following detection of the change of state of the trigger signal TR. In any case, the change of state of the trigger signal TR from the “inactive” state to the “active” state thereof results from the charge detection signal CHD produced by the charge preamplifier CP reaching or exceeding the threshold voltage CTH, and therefore corresponds to detection of a charge induced on the charge detection cylinder CD by an ion moving therein. With an ion thus moving within the charge detection cylinder CD, control by the processor 50 of the voltage source V1 to control the ion mirror M1 to the reflection mode (R) of operation results in a substantially improved probability, relative to the random trapping mode, of trapping the ion within the ELIT 14. Thus, when an ion has entered the ELIT 14 via the ion mirror M1 and is detected as either passing the first time through the charge detection cylinder CD toward the ion mirror M2 or as passing back through the charge detection cylinder CD after having been reflected by the ion reflection field established within the region R2 of the ion mirror M2 as illustrated in
In a second version of the trigger trapping mode, the process or step illustrated in
In any case, with both of the ion mirrors M1, M2 controlled to the ion reflection operating mode (R) to trap an ion within the ELIT 14, the ion is caused by the opposing ion reflection fields established in the regions R1 and R2 of the ion mirrors M1 and M2 respectively to oscillate back and forth between the ion mirrors M1 and M2, each time passing through the charge detection cylinder CD as illustrated by the ion trajectory 64 depicted in
With an ion oscillating back and forth between the ion mirrors M1, M2 as illustrated in
Ion measurement event data, i.e., charge detection events making up an ion measurement event, is illustratively processed by the processor 52 to determine charge, mass-to-charge ratio and mass values of the ion. In one embodiment, the ion measurement event data is processed by computing, with the processor 16, a Fourier Transform of the recorded collection of charge detection events. The processor 16 is illustratively operable to compute such a Fourier Transform using any conventional digital Fourier Transform (DFT) technique such as for example, but not limited to, a conventional Fast Fourier Transform (FFT) algorithm. In any case, the processor 16 is then illustratively operable to compute an ion mass-to-charge ratio value (m/z), an ion charge value (z) and ion mass values (m), each as a function of the computed Fourier Transform. The processor 16 is illustratively operable to store the computed results in the memory 18 and/or to control one or more of the peripheral devices 20 to display the results for observation and/or further analysis.
It is generally understood that the mass-to-charge ratio (m/z) of an ion oscillating back and forth through the charge detector CD of an ELIT between opposing ion mirrors M1, M2 thereof is inversely proportional to the square of the fundamental frequency ff of the oscillating ion according to the equation:
m/z=C/ff2,
where C is a constant that is a function of the ion energy and also a function of the dimensions of the respective ELIT, and the fundamental frequency ff is determined directly from the computed Fourier Transform. The value of the ion charge, z, is proportional to the magnitude FTMAG of the fundamental frequency ff, taking into account the number of ion oscillation cycles. Ion mass, m, is then calculated as a product of m/z and z. In some cases, the magnitude(s) of one or more of the harmonic frequencies of the FFT may be added to the magnitude of the fundamental frequency for purposes of determining the ion charge, z. The processor 16 is thus operable to compute m/z=C/ff2, z=F(FTMAG) and m=(m/z)(z). Multiple, e.g., hundreds or thousands or more, ion trapping events are typically carried out for any particular sample from which the ions are generated by the ion source 12, and ion mass-to-charge, ion charge and ion mass values are determined/computed for each such ion trapping event. The ion mass-to-charge, ion charge and ion mass values for such multiple ion trapping events are, in turn, combined to form spectral information relating to the sample. Such spectral information may illustratively take different forms, examples of which include, but are not limited to, ion count vs. mass-to-charge ratio, ion charge vs. ion mass (e.g., in the form of an ion charge/mass scatter plot), ion count vs. ion mass, ion count vs. ion charge, or the like.
With no charge induced on the charge detector CD by a charged particle passing therethrough, the charge detection cylinder CD illustratively operates at or around a reference charge level CHREF. As the charge detection cylinder CD is not powered or grounded, the reference charge level CHREF is typically tens of charges (i.e., elementary charges “e”) or less, although in some applications the reference charge level CHREF may be more than tens of charges. The reference charge level CHREF on the charge detection cylinder CD is subject to one or more potentially significant sources of charge noise which may introduce uncertainty in charge detection events as a result of uncertainty in the reference charge level at any point in time. For example, such noise, e.g., in the form of root-mean-square deviation (RMSD) noise, may add at least a factor of 10 or so to the average CHREF level, and even with conventional noise reduction efforts employed it is difficult to reduce the RMSD noise to less than 100 or so charges. Because of this, the threshold voltage CTH for purposes of trigger trapping, as described above with respect to
An example trigger trapping event 72 is also illustrated in
In the description that follows, the gain of the preamplifier CP illustrated in
Such charge noise 70, from any source, is undesirable as it necessitates setting a comparator threshold voltage CTH artificially high to avoid false trigger events as just described. However, doing so leaves an undesirably large range of magnitudes of the charge detection signal CHD below CTH which will not cause the comparator 44 to activate the trigger signal TR, but which could have been detectable if not for the high level of charge noise 70. As a result, neither conventional version of trigger trapping described above will can be effectively performed with weakly-charged ions, i.e., ions having charge magnitudes resulting in CHD<CTH.
However, many weakly-charged ions can be detected with specific control of the threshold voltage CTH. For example, as will be shown below, a probabilistic relationship exists between the magnitude of the threshold voltage CTH and corresponding detectable combinations of the charge detection signal CHD resulting from weakly-charged, i.e., low-charge, ions and the charge noise. Thus, as illustrated by example in
The following analysis illustratively assumes a Gaussian noise spectrum with root-mean-square (RMS) noise charges on the charge detection cylinder CD, and assuming a 50% duty cycle of the ELIT 14, corresponding to a ratio of time spent by an ion in the charge detection cylinder CD of the ELIT 14 and total time spent traversing the first and second ion mirrors M1, M2 and the charge detection cylinder CD during one complete oscillation cycle of a trapping event. It will be understood that the while the numerical values of the results of the following analysis may vary with different duty cycles, the remainder of the analysis will continue to hold true.
In trigger trapping operation of the ELIT 14 as described above with respect to
The profile 80 depicted in
The remaining profiles 82-92 depicted in
As further illustrated in
For purposes of this description, ion inlet frequency is defined as the number of ions in the flow or beam of ions supplied by the ion source 12 to the ELIT 14 (via the ion inlet aperture A1 of the ion mirror M1 as illustrated by example in
As further still illustrated in
As also illustrated in
Referring now to
Rearrangement of the above-described relationships in the form of detection probability vs. ion inlet frequency illustratively produces a profile similar to that illustrated in
It will be understood that different pairs of charge signal amplitude and optimum comparator threshold magnitude will produce different correction factor vs ion detection frequency profiles, albeit generally of the same shape. In any case, the intensities of the measured ion spectrum will be multiplied by appropriate correction factors so that the intensities in the measured data reflect the relative abundances of the ions in the flow of ions supplied to the ELIT 14 by the ion source 12. Moreover, it is desirable to limit the detection frequency so that the applicable correction factor does not lie on the rapidly rising portion of the profile 110, e.g., greater than about 4.5 Hz). Correction factors in this range are large and strongly dependent upon detection frequency such that small errors in the detection frequency will lead to large errors in the correction factor.
Referring now to
In some embodiments of the process 150, the value(s) of the charge signal amplitude for triggering the ELIT 14 to trap the corresponding ion therein may be manually selected by a user of the CDMS system 10. In some such embodiments, the processor 50 and/or the processor 52 may be programmed to execute a control graphic user interface (GUI) process in which the processor 50 and/or 52 is/are operable to control at least one display monitor included in the peripheral devices 20 to display a corresponding control GUI including one or more selectable GUI elements for entering one or more charge signal amplitude values. In alternate embodiments, the processor 16/50 may be programmed to select the value(s) of the charge signal amplitude, e.g., singly and/or by executing a step-wise sweep of a range of charge signal amplitudes and executing the process 150 at each incremental charge signal amplitude value. Other conventional apparatuses, devices and/or techniques for selecting one or more charge signal amplitude values will occur to those skilled in the art, and it will be understood that any such other conventional apparatuses, devices and/or techniques are intended to fall within the scope of this disclosure.
The process 150 begins at step 152 where, prior to controlling the ELIT in a trigger trapping mode as just, described, the processor 50 is operable to store a number of maps in the memory 18 corresponding to relationships illustrated in some of the
The processor 50 is further illustratively operable at step 152 to create and/or store a set of detection frequency maps (“DF maps”) in the memory 18 each including multiple detection frequency values mapped to corresponding ion inlet frequency values for a different pair of optimized comparator threshold and charge signal amplitude values to capture multiple optimized comparator threshold/charge signal amplitude value instances of the relationship described above with respect to
The processor 50 is further illustratively operable at step 152 to create and/or store a set of correction factor maps (“CF maps”) in the memory 18 each including multiple detection frequency values mapped to corresponding correction factor values for a different pair of optimized comparator threshold and charge signal amplitude values to capture multiple optimized comparator threshold/charge signal amplitude value instances of the relationship described above with respect to
Those skilled in the art will appreciate that in some applications the information in the set of DF maps may be combined with the set of CF maps to form a single set of maps including multiple ion inlet frequency values mapped to corresponding correction factor values for a different pair of optimized comparator threshold and charge signal amplitude values to capture in one set of maps multiple optimized comparator threshold/charge signal amplitude value instances of the relationships described above with respect to
Following step 152, the process 150 advances to step 154 where the processor 50 is operable to control V1 and V2 to open M1 and M2 (and thus open the ELIT 14) so that ions generated by the ion source 12 pass into and through the ELIT 14 as illustrated by example in
Following step 156 (or during step 154 and/or step 156), the process 150 advances to step 158 where a charge signal amplitude value CHA is selected, e.g., by a user of the CDMS 10 and/or automatically by the processor 50 as described above. In any case, CHA selected at step 158 is a charge magnitude value which is desired to be used as a trigger to cause the processor 50 to close the ELIT 14 to trap a corresponding ion therein. Illustratively, CHA has a magnitude less than or equal to the conventional threshold level normally used for strongly charged ions as illustrated in
Following step 158, the process 150 advances to step 160 where the processor 50 is illustratively operable to select one or more of the CTH maps stored in the memory based on the measured ion inlet frequency IF and on the selected charge signal amplitude value CHA. In some instances, the measured IF value may correspond to a single CTH map, and in other embodiments the measured IF vale may be between IF values of two different CTH maps. In the former case, the processor 50 is operable to retrieve the single CTH map stored in the memory 18 and in the latter case the processor 50 is operable to retrieve the two different CTH maps stored in the memory 18. Once retrieved, the processor 50 is operable to map the selected CHA value to a corresponding optimized comparator threshold value TH using the map(s). In instances in which a single map is retrieved, the processor 50 is operable to select as TH the optimized comparator threshold value paired with the selected CHA value stored in the single selected map. In other instances in which a single map is retrieved, the selected CHA value may be between two CHA values stored in the single map. In such instances, the processor 50 is illustratively operable to estimate a suitable optimized comparator threshold value TH using one or more conventional interpolation techniques or other estimation techniques. Likewise in instances in which two CTH maps are retrieved from memory, conventional interpolation or other estimation techniques may be used to estimate a suitable optimized comparator threshold value TH from the data contained in the two selected tables. In embodiments of the process 150 which do not have a set of CTH maps stored in the memory 18, the processor 50 is alternatively operable at step 160 to compute CTH based on CHA and IF using one or more equations based on the relationships between CTH, CHA and IF illustrated in
Following step 160, the processor 50 is illustratively operable at step 162 to control the voltage source V2 to close the ion mirror M2 so that ions generated by the ion source 12 pass into and through the open ion mirror M1 of the ELIT 14 and are reflected by the ion reflection field established in M2 to trap ions entering M2 from the charge detection cylinder CD and then accelerating the trapped ions in the opposite direction back into and through the charge detection cylinder CD as illustrated by example in
While the trigger signal TR remains “inactive,” the process 150 illustratively advances to step 168 where the processor 150 is illustratively operable to determine whether a time T has expired since execution of step 164 or if the user (or processor 50) has overridden the expiry period. If so, the process 150 loops back to step 154 to re-execute the process 150 for selection of another charge signal amplitude value CHA, and otherwise the process 150 loops back to step 166 to continue to monitor TR. Step 168 is illustratively included in some embodiments in which it may be desirable to allow only a predefined time period for the charge detection signal CHD to trigger the comparator 44 and/or to allow the user or processor 150 to cancel and restart the process 150. In any case, if/when the processor 150 determines at step 166 that the trigger signal TR has changed state from “inactive” to “active,” the process 150 illustratively advances from the YES branch of step 166 to step 170 where the processor 150 is illustratively operable to control V1 to close M1, thereby closing the ELIT 14 and trapping the ion therein as illustrated in
Execution of steps 162-170 illustratively represent control of the ELIT 14 by the processor 50 according to the first version of trigger trapping described above with respect to
When the processor 50 determines at step 172 that the trapping event has concluded, the process 150 advances to step 174 where the processor 50 is illustratively operable to process the charge detection event (CDE) measurement values collected during the trapping event to determine, in a conventional manner, a mass-to-charge value (m/z), a charge (z) and a mass (m) of the ion trapped in the ELIT 14 during the trapping event.
Following step 174, the process 150 advances to step 176 where the processor 50 is illustratively operable to select one or more of the detection frequency (DF) maps stored in the memory based on the measured ion charge z determined at step 174, the optimized comparator threshold value TH determined at step 160 and used at step 164 to conduct the comparison, and the ion inlet frequency IF measured at step 156. In some instances, the measured ion charge z, the optimized comparator threshold value TH and the measured IF value may together identify a single DF map, and in other embodiments the measured ion charge z and/or the optimized comparator threshold value TH and/or the measured IF value may identify two or more different DF maps. As described above with respect to step 160, the processor 50 is operable at step 176 to map the measured IF and z values to a corresponding detection frequency DF using the one or more DF map(s), e.g., directly and/or using one or more conventional interpolation techniques or other estimation techniques. In embodiments of the process 150 which do not have a set of DF maps stored in the memory 18, the processor 50 is alternatively operable at step 176 to compute DF based on the optimized threshold value CTH and the measured values of IF and z using one or more equations based on the relationships between CTH, ion charge amplitude and IF illustrated in
Following step 176, the process 150 advances to step 178 where the processor 50 is illustratively operable to select one or more of the correction factor (CF) maps stored in the memory based on the measured ion charge z determined at step 174, the optimized comparator threshold value TH determined at step 160 and used at step 164 to conduct the comparison and the detection frequency DF just determined at step 174. In some instances, the charge signal amplitude value CHA, the optimized comparator threshold value TH and the DF value determined at step 176 may together identify a single CF map, and in other embodiments the measured ion charge z and/or the optimized comparator threshold value TH and/or the determined DF value may identify two or more different CF maps. As described above with respect to step 160, the processor 50 is operable at step 178 to map the determined DF value to a corresponding correction factor CF using the one or more CF map(s), e.g., directly and/or using one or more conventional interpolation techniques or other estimation techniques. In alternate embodiments in which the DF and CF maps are combined into a single set of maps as described above, steps 176 and 178 may likewise be replaced with a single step in which the CF value is determined from such single set of maps. In other alternate embodiments, steps 176 and 178, or the single step just described, may be executed during execution of any one or more of steps 162-174.
In embodiments of the process 150 which do not have a set of CF maps stored in the memory 18, the processor 50 is alternatively operable to compute CF based on the optimized threshold value CTH selected at step 160 and used at step 164 to conduct the comparison, the measured ion charge z determined at step 174 and the DF value determined at step 176 using one or more equations based on the relationships between CTH, ion charge amplitude and DF illustrated in
Following step 178, the process 150 advances to step 180 where the processor 50 is illustratively operable to multiply the intensity of the ion measurements determined at step 174 by the correction factor CF so that the ion intensities in the measured spectrum are corrected to reflect the relative abundances of the ions supplied by the ion source 12 to the ELIT 14. As one example, the correction factor CF determined for each ion measurement illustratively operates as a weighting factor multiplier against a default count value of 1.0 for each detected ion such that, when the correction factor CF is included, the default count (1.0) of the measured ion is multiplied by the correction factor CF. If the detection probability of the ion is 0.5, for example, the correction factor is therefore 2.0 and the weighted count value of the measured ion is therefore likewise 2.0. Thus, because the detection efficiency of this example ion is only 0.5, the measured count value will only be half of that in the ion supplied by the ion source 12 to the ELIT 14, and the measured count value of this ion must therefore be corrected by the correction factor so as to be correctly counted as 2 ions in order to reflect the corresponding abundance of this ion in the ions being supplied by the ion source 12 to the ELIT 14.
In embodiments of the process 150 in which a user manually or otherwise selects the charge signal amplitude value CHA at step 158, the process 150 illustratively advances from step 180 to step 188 where the process 150 concludes. In alternate embodiments in which the processor 150 is operable to sweep CHA over a selected range of CHA values, the process 180 illustratively includes an additional step 182 following step 180 as shown by dashed-line representation in
Referring now to
Focusing on the ion source 12, it will be understood that the source 12 of ions entering the ELIT 14 may be or include, in the form of one or more of the ion source stages IS1-ISQ, one or more conventional sources of ions as described above, and may further include one or more conventional instruments for separating ions according to one or more molecular characteristics (e.g., according to ion mass, ion mass-to-charge, ion mobility, ion retention time, or the like) and/or one or more conventional ion processing instruments for collecting and/or storing ions (e.g., one or more quadrupole, hexapole and/or other ion traps), for filtering ions (e.g., according to one or more molecular characteristics such as ion mass, ion mass-to-charge, ion mobility, ion retention time and the like), for fragmenting or otherwise dissociating ions, for normalizing or shifting ion charge states, and the like. It will be understood that the ion source 12 may include one or any combination, in any order, of any such conventional ion sources, ion separation instruments and/or ion processing instruments, and that some embodiments may include multiple adjacent or spaced-apart ones of any such conventional ion sources, ion separation instruments and/or ion processing instruments.
Turning now to the ion processing instrument 210, it will be understood that the instrument 210 may be or include, in the form of one or more of the ion processing stages OS1-OSR, one or more conventional instruments for separating ions according to one or more molecular characteristics (e.g., according to ion mass, ion mass-to-charge, ion mobility, ion retention time, or the like) and/or one or more conventional ion processing instruments for collecting and/or storing ions (e.g., one or more quadrupole, hexapole and/or other ion traps or guides), for filtering ions (e.g., according to one or more molecular characteristics such as ion mass, ion mass-to-charge, ion mobility, ion retention time and the like), for fragmenting or otherwise dissociating ions, for normalizing or shifting ion charge states, and the like. It will be understood that the ion processing instrument 210 may include one or any combination, in any order, of any such conventional ion separation instruments and/or ion processing instruments, and that some embodiments may include multiple adjacent or spaced-apart ones of any such conventional ion separation instruments and/or ion processing instruments. In any implementation which includes one or more mass spectrometers, any one or more such mass spectrometers may be implemented in any of the forms described above with respect to
As one specific implementation of the ion separation instrument 200 illustrated in
As another specific implementation of the ion separation instrument 200 illustrated in
As yet another specific implementation of the ion separation instrument 200 illustrated in
As still another specific implementation of the ion separation instrument 200 illustrated in
Referring now to
MS/MS, e.g., using only the ion separation instrument 230, is a well-established approach where precursor ions of a particular molecular weight are selected by the first mass spectrometer 232 (MS1) based on their m/z value. The mass selected precursor ions are fragmented, e.g., by collision-induced dissociation, surface-induced dissociation, electron capture dissociation, or photo-induced dissociation, in the ion dissociation stage 234. The fragment ions are then analyzed by the second mass spectrometer 236 (MS2). Only the m/z values of the precursor and fragment ions are measured in both MS1 and MS2. For high mass ions, the charge states are not resolved and so it is not possible to select precursor ions with a specific molecular weight based on the m/z value alone. However, by coupling the instrument 230 to the CDMS 10 illustrated and described herein, it is possible to select a narrow range of m/z values and then use the CDMS 10 to determine the masses of the m/z selected precursor ions. The mass spectrometers 232, 236 may be, for example, one or any combination of a magnetic sector mass spectrometer, time-of-flight mass spectrometer or quadrupole mass spectrometer, although in alternate embodiments other mass spectrometer types may be used. In any case, the m/z selected precursor ions with known masses exiting MS1 can be fragmented in the ion dissociation stage 234, and the resulting fragment ions can then be analyzed by MS2 (where only the m/z ratio is measured) and/or by the CDMS instrument 10 (where the m/z ratio and charge are measured simultaneously). Low mass fragments, i.e., dissociated ions of precursor ions having mass values below a threshold mass value, e.g., 10,000 Da (or other mass value), can thus be analyzed by conventional MS, using MS2, while high mass fragments (where the charge states are not resolved), i.e., dissociated ions of precursor ions having mass values at or above the threshold mass value, can be analyzed by CDMS 10.
It will be understood that the dimensions of the various components of the ELIT 14 and the magnitudes of the electric fields established therein, as implemented in any of the systems 10, 200, 220 illustrated in the attached figures and described above, may illustratively be selected so as to establish a desired duty cycle of ion oscillation within the ELIT 14, corresponding to a ratio of time spent by an ion in the charge detection cylinder CD and a total time spent by the ion traversing the combination of the ion mirrors M1, M2 and the charge detection cylinder CD during one complete oscillation cycle. For example, a duty cycle of approximately 50% may be desirable for the purpose of reducing noise in fundamental frequency magnitude determinations resulting from harmonic frequency components of the measured signals. Details relating to such dimensional and operational considerations for achieving a desired duty cycle, e.g., such as 50%, are illustrated and described in U.S. Patent Application Ser. No. 62/616,860, filed Jan. 12, 2018, U.S. Patent Application Ser. No. 62/680,343, filed Jun. 4, 2018 and International Patent Application No. PCT/US2019/013251, filed Jan. 11, 2019, all entitled ELECTROSTATIC LINEAR ION TRAP DESIGN FOR CHARGE DETECTION MASS SPECTROMETRY, the disclosures of which are all expressly incorporated herein by reference in their entireties.
It will be further understood that one or more charge calibration or resetting apparatuses may be used with the ELIT 14 alone and/or in any of the systems 10, 200, 220 illustrated in the attached figures and described herein. An example of one such charge calibration or resetting apparatus is illustrated and described in U.S. Patent Application Ser. No. 62/680,272, filed Jun. 4, 2018 and in International Patent Application No. PCT/US2019/013284, filed Jan. 11, 2019, both entitled APPARATUS AND METHOD FOR CALIBRATING OR RESETTING A CHARGE DETECTOR, the disclosures of which are both expressly incorporated herein by reference in their entireties.
It will be still further understood that the trigger trapping techniques illustrated in the attached figures and described herein may be implemented in each of two or more ELITs and/or in each of two or more ELIT regions in systems and/or applications which include at least one ELIT array having two or more ELITs or having two or more ELIT regions. Examples of some such ELITs and/or ELIT arrays are illustrated and described in U.S. Patent Application Ser. No. 62/680,315, filed Jun. 4, 2018 and in International Patent Application No. PCT/US2019/013283, filed Jan. 11, 2019, both entitled ION TRAP ARRAY FOR HIGH THROUGHPUT CHARGE DETECTION MASS SPECTROMETRY, the disclosures of which are both expressly incorporated herein by reference in their entireties.
It will be further understood that one or more ion source optimization apparatuses and/or techniques may be used with one or more embodiments of the ion source 12 as part of or in combination with any of the systems 10, 200, 220 illustrated in the attached figures and described herein, some examples of which are illustrated and described in U.S. Patent Application Ser. No. 62/680,223, filed Jun. 4, 2018 and entitled HYBRID ION FUNNEL-ION CARPET (FUNPET) ATMOSPHERIC PRESSURE INTERFACE FOR CHARGE DETECTION MASS SPECTROMETRY, and in International Patent Application No. PCT/US2019/013274, filed Jan. 11, 2019 and entitled INTERFACE FOR TRANSPORTING IONS FROM AN ATMOSPHERIC PRESSURE ENVIRONMENT TO A LOW PRESSURE ENVIRONMENT, the disclosures of which are both expressly incorporated herein by reference in their entireties.
It will be still further understood that the trigger trapping techniques illustrated in the attached figures and described herein may be implemented in or as part of systems configured to operate in accordance with real-time analysis and/or real-time control techniques, some examples of which are illustrated and described in U.S. Patent Application Ser. No. 62/680,245, filed Jun. 4, 2018 and International Patent Application No. PCT/US2019/013277, filed Jan. 11, 2019, both entitled CHARGE DETECTION MASS SPECTROMETRY WITH REAL TIME ANALYSIS AND SIGNAL OPTIMIZATION, the disclosures of which are both expressly incorporated herein by reference in their entireties. As one non-limiting example, one or more real-time control apparatus and/or techniques described in the patent application identified in this paragraph may be used to select one or more values of the charge signal amplitude values CHA, to control the voltage source 44 illustrated in
It will be still further understood that in any of the systems 10, 200, 220 illustrated in the attached figures and described herein, the ELIT 14 may be replaced with an orbitrap, and that the trigger trapping techniques illustrated in the attached figures and described herein may be used with such an orbitrap. An example of one such orbitrap is illustrated and described in U.S. Patent Application Ser. No. 62/769,952, filed Nov. 20, 2018 and in International Patent Application No. PCT/US2019/013278, filed Jan. 11, 2019, both entitled ORBITRAP FOR SINGLE PARTICLE MASS SPECTROMETRY, the disclosures of which are both expressly incorporated herein by reference in their entireties.
It will be yet further understood that the trigger trapping techniques illustrated and described herein may be used in systems and/or applications in which one or more ion inlet trajectory control apparatuses and/or techniques is/are used to provide for simultaneous measurements of multiple individual ions within the ELIT 14. Examples of some such ion inlet trajectory control apparatuses and/or techniques are illustrated and described in U.S. Patent Application Ser. No. 62/774,703, filed Dec. 3, 2018 and in International Patent Application No. PCT/US2019/013285, filed Jan. 11, 2019, both entitled APPARATUS AND METHOD FOR SIMULTANEOUSLY ANALYZING MULTIPLE IONS WITH AN ELECTROSTATIC LINEAR ION TRAP, the disclosures of which are both expressly incorporated herein by reference in their entireties.
While this disclosure has been illustrated and described in detail in the foregoing drawings and description, the same is to be considered as illustrative and not restrictive in character, it being understood that only illustrative embodiments thereof have been shown and described and that all changes and modifications that come within the spirit of this disclosure are desired to be protected. For example, it will be understood that the ELIT 14 illustrated in the attached figures and described herein is provided only by way of example, and that the concepts, structures and techniques described above may be implemented directly in ELITs of various alternate designs. Any such alternate ELIT design may, for example, include any one or combination of two or more ELIT regions, more, fewer and/or differently-shaped ion mirror electrodes, more or fewer voltage sources, more or fewer DC or time-varying signals produced by one or more of the voltage sources, one or more ion mirrors defining additional electric field regions, or the like.
This application is a U.S. national stage entry of PCT Application No. PCT/US2019/013280, filed Jan. 11, 2019, which claims the benefit of and priority to U.S. Provisional Patent Application Ser. No. 62/680,296, filed Jun. 4, 2018, the disclosures of which are incorporated herein by reference in their entireties.
This invention was made with government support under CHE1531823 awarded by the National Science Foundation. The United States Government has certain rights in the invention.
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| Number | Date | Country | |
|---|---|---|---|
| 20210210335 A1 | Jul 2021 | US |
| Number | Date | Country | |
|---|---|---|---|
| 62680296 | Jun 2018 | US |
