This application claims priority to Chinese patent application No. 202311255831.9, filed on Sep. 26, 2023, the disclosure of which is incorporated herein by reference in its entirety.
The present disclosure relates to the technical field of semiconductors, and in particular to a contact filling method.
In the existing contact V0 process, filling is performed with titanium Ti, titanium nitride TiN, and tungsten W in sequence. Due to the presence of a barrier layer and a nucleation layer Nuc, a contact resistance of the contact V0 process is high, affecting the device performance.
A developing filling method is direct filling with pretreatment and selective tungsten, which can greatly reduce the contact resistance of the contact V0 and improve the device performance. However, a high resistance trench (HR trench) and a metal layer trench (MO trench) Co are present during filling of a wafer of the existing contact V0 process, where the bottom of the HR trench is TiN, and the bottom of the metal layer trench is Co. A nucleation point of tungsten provided by the pretreatment can achieve good selective growth of the MO trench. However, since the bottom of the HR trench is TiN, the incubation time of selective W on TiN is the same as that of silicon oxide, failing to achieve the condition for the selective growth. Moreover, after the pretreatment and a selective tungsten deposition process, the TIN at the bottom of the HR trench may be damaged, thus causing a high resistance problem.
The existing solution is adding a cap layer (SiN and oxide) on the TIN at the bottom of the HR trench. This method not only increases the number of integration processes (2 times of deposition, 1 time of etching, and 1 time of wet etching), but also increases the difficulty in etching control of an etch stop layer of the HR trench due to the increase in a stack of film layers, and affects a process window. In addition, the wet etching of the etch stop layer imposes a large impact on the defect performance.
The present disclosure provides a contact filling method, at least including:
In some examples, the width of the first oxide layer in step II is a width in a lateral plane.
In some examples, the width of the Co layer in step IV is a width in a lateral plane.
In some examples, the selective Co layer is formed on the TiN layer at the bottom of the first contact and on the Co layer at the bottom of the second contact respectively in step V using a selective deposition method.
In some examples, the first contact and the second contact are filled with tungsten respectively in step VI using a selective deposition method.
In some examples, the selective Co layer formed on the TiN layer at the bottom of the first contact in step V is used to protect the TiN layer at the bottom of the first contact from damage and to avoid high resistance phenomena.
In some examples, the selective Co layer is formed on the TiN layer at the bottom of the first contact and on the Co layer at the bottom of the second contact respectively in step V in the same process.
As described above, the contact filling method of the present disclosure has the following beneficial effects: the present disclosure solves the problem that selective tungsten cannot be grown in a high resistance trench (HR trench). Regarding the pretreatment, there is no need to take into account a loss of TiN, so that the process is more tunable. Regarding the integration, only a thin film deposition step is added, which has a small impact. The selective tungsten can be formed, greatly reducing the contact V0 resistance, and improving device performance.
The embodiments of the present disclosure are described below using specific examples, and those skilled in the art could readily understand other advantages and effects of the present disclosure from the contents disclosed in the description. The present disclosure can also be implemented or applied using other different specific implementations, and various details in the description can also be modified or changed based on different viewpoints and disclosures without departing from the spirit of the present disclosure.
References are made to
The present disclosure provides a contact filling method. Referring to
Step I. A first oxide layer is provided, wherein a Co layer embedded in the first oxide layer is formed on one side of the first oxide layer, and the Co layer penetrates through upper and lower surfaces of the first oxide layer; a stack layer is formed on upper surfaces of the first oxide layer and the Co layer, wherein the stack layer comprises a first SiN layer, a TiN layer, and a second SiN layer in sequence from bottom to top. Referring to
In step I, the first oxide layer 01 is provided, wherein the Co layer 02 embedded in the first oxide layer 01 is formed on one side of the first oxide layer 01, and the Co layer 02 penetrates through upper and lower surfaces of the first oxide layer 01; and then the stack layer is formed on upper surfaces of the first oxide layer 01 and the Co layer 02, wherein the stack layer includes the first SiN layer 03, the TiN layer 04, and the second SiN layer 05 in sequence from bottom to top. The first SiN layer 03, the TiN layer 04, and the second SiN layer 05 in
Step II. The second SiN layer and the TiN layer above the first oxide layer on one side provided with the Co layer are removed by etching, and then the second SiN layer above the first oxide layer on one side provided with no Co layer and the first SiN layer on the side of the first oxide layer that is provided with the Co layer are covered with the second oxide layer.
Furthermore, in this embodiment of the present disclosure, the width of the first oxide layer in step II is a width in a lateral plane.
In step II, the second SiN layer 05 and the TiN layer 04 above the first oxide layer 01 on the side provided with the Co layer 02 are removed by etching, and then the second SiN layer 05 above the first oxide layer 01 on the side provided with no Co layer and the first SiN layer 03 on the side of the first oxide layer 01 that is provided with the Co layer are covered with the second oxide layer 06.
In this embodiment, the width of the first oxide layer is the width in the lateral plane. In this embodiment, the first oxide layer is disposed on a wafer, and the width thereof in the lateral plane refers to the width of a wafer plane occupied thereby.
Step III. The second oxide layer and the second SiN layer above the first oxide layer on the side provided with no Co layer are removed by development etching, until an upper surface of the TiN layer is exposed, so as to form a first contact, wherein the TiN layer acts as the bottom of the first contact, and the diameter of the first contact is less than the width of the first oxide layer. The diameter of the first contact 07 being less than the width of the first oxide layer 01, indicates that the diameter of the first contact 07 here refers to the diameter of the bottom of the first contact. In step III, the second oxide layer 06 and the second SiN layer 05 above the first oxide layer 01 on the side provided with no Co layer are removed by development etching, until the upper surface of the TiN layer 04 is exposed, so as to form the first contact 07, wherein the TiN layer 04 acts as the bottom of the first contact 07, and the diameter of the first contact 07 is less than the width of the first oxide layer 01.
Step IV. The second oxide layer and first SiN layer above the first oxide layer on the side provided with the Co layer are removed by development etching, until the upper surface of the Co layer is exposed, so as to form a second contact, wherein the diameter of the second contact is less than the width of the Co layer. Referring to
Step V. A selective Co layer is formed on the TiN layer at the bottom of the first contact and on the Co layer at the bottom of the second contact respectively.
Furthermore, in this embodiment of the present disclosure, the selective Co layer is formed on the TiN layer at the bottom of the first contact and on the Co layer at the bottom of the second contact respectively in step V using a selective deposition method.
Furthermore, in this embodiment of the present disclosure, the selective Co layer formed on the TiN layer at the bottom of the first contact in step V is used to protect the TIN layer at the bottom of the first contact from damage and to avoid high resistance phenomena.
Furthermore, in this embodiment of the present disclosure, the selective Co layer is formed on the TiN layer at the bottom of the first contact and on the Co layer at the bottom of the second contact respectively in step V in the same process.
Referring to
Step VI. The first contact and the second contact are filled with tungsten respectively.
Furthermore, in this embodiment of the present disclosure, the first contact and the second contact are filled with tungsten respectively in step VI using a selective deposition method.
Referring to
Since a growth mechanism of the selective Co is an electron donor, a TiN surface at the bottom of the high resistance trench and a Co surface at the bottom of the metal trench may both provide free electrons for the growth of Co molecules, without growing on the surface of a SiN dielectric layer and silicon oxide. Therefore, in a selective tungsten process, before the growth of the selective tungsten, a thin layer of selective Co is grown on the TiN surface, so that during the growth of selective tungsten, the high resistance trench and the metal layer trench both have Co films at bottoms thereof, thereby achieving the condition for the selective growth of tungsten and solving the problem that selective tungsten cannot be grown in the high resistance trench. Regarding the pretreatment, there is no need to take into account a loss of TiN, so that the process is more tunable. Regarding the integration, only a thin film deposition step is added, which has a small impact. The process for the selective tungsten is implementable, greatly reducing a contact resistance, and improving device performance.
To sum up, the present disclosure solves the problem that selective tungsten cannot be grown in a high resistance trench. Regarding the pretreatment, there is no need to take into account a loss of TiN, so that the process is more tunable. Regarding the integration, only a thin film deposition step is added, which has a small impact. The selective tungsten can be formed, greatly reducing the contact V0 resistance, and improving device performance. Therefore, the present disclosure effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments merely illustrate the principle and effect of the present disclosure, rather than limiting the present disclosure. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present disclosure. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the art without departing from the spirit and technical idea disclosed in the present disclosure shall still be covered by the claims of the present disclosure.
Number | Date | Country | Kind |
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202311255831.9 | Sep 2023 | CN | national |