Patent Application
20240114800
Embodiments of the present disclosure generally relate to piezoelectric devices, and more particularly to deposition of piezoelectric films, in particular to physical vapor deposition of piezoelectric films.
Piezoelectric materials have been used for several decades in a variety of technologies, e.g., ink jet printing, medical ultrasound and gyroscopes. Conventionally, piezoelectric layers are fabricated by producing a piezoelectric material in a bulk crystalline form and then machining the material to a desired thickness, or by using sol-gel techniques to deposit the layer. Lead zirconate titanate (PZT), typically of the form Pb[ZrxTi1-x]O3, is a commonly used piezoelectric material.
More recently relaxor-lead titanate (relaxor-PT), such as (1-X)[Pb(Mg1/3Nb2/3)O3]—X[PbTiO3] (PMNPT), (1-X)[Pb(Y1/3Nb2/3)O3]—X[PbTiO3] (PYNPT), (1-X)[Pb(Zr1/3Nb2/3)O3]—X[PbTiO3] (PZNPT), (1-X)[Pb(In1/3Nb2/3)O3]—X[PbTiO3](PINPT), etc. have been proposed as better piezoelectric materials. Relaxor-PT can offer improved piezoelectric properties over the more commonly used PZT material.
There is a need for fabrication of high quality relaxor-PT layers and films, in particular PMNPT layers and films, over a useful area in a commercially viable manner.
One or more embodiments are directed to a piezoelectric device comprising: a substrate; a lead magnesium niobate-lead titanate (PMNPT) piezoelectric film on the substrate, the PMNPT piezoelectric film comprising: a thermal oxide layer on the substrate; a first electrode above on the thermal oxide layer; a seed layer above the first electrode; a lead magnesium niobate-lead titanate (PMNPT) piezoelectric layer on the seed layer; and a second electrode on the PMNPT piezoelectric layer; the PMNPT film comprising a piezoelectric coefficient (d33) of greater than or equal to 200 pm/V.
Additional embodiments are directed to a physical vapor deposition system comprising a conditioning chamber and a first support to hold a substrate in the conditioning chamber, the conditioning chamber being configured to provide a temperature of the substrate of 500° C.±50° C.; a deposition chamber and a second support to hold the substrate in the deposition chamber, the deposition chamber being configured to provide a temperature of the substrate of 650° C.±50° C.; a target in the deposition chamber comprising a piezoelectric material; and a power supply configured to apply power to the target to generate a plasma in the chamber to sputter the piezoelectric material from the target onto the substrate.
Further embodiments are directed to a method of fabricating a piezoelectric film, the method comprising: conditioning a substrate with a seed layer as an exposed layer in a conditioning chamber and setting a temperature of the substrate to 500° C.±50° C.; transferring the substrate to a processing chamber and setting a temperature of the substrate to 650° C.±50° C.; depositing a piezoelectric material onto the seed layer in a crystallographic phase in the processing chamber by physical vapor deposition to prepare a piezoelectric layer; and thermally annealing the substrate in the processing chamber to convert the piezoelectric layer to a final piezoelectric film.
Before describing several exemplary embodiments of the disclosure, it is to be understood that the disclosure is not limited to the details of construction or process steps set forth in the following description. The disclosure is capable of other embodiments and of being practiced or being carried out in various ways.
As used in this specification and the appended claims, the term “substrate” refers to a surface, or portion of a surface, upon which a process acts. It will also be understood by those skilled in the art that reference to a substrate can also refer to only a portion of the substrate, unless the context clearly indicates otherwise. Additionally, reference to depositing on a substrate can mean both a bare substrate and a substrate with one or more films or features deposited or formed thereon.
A “substrate” as used herein, refers to any substrate or material surface formed on a substrate upon which film processing is performed during a fabrication process. For example, a substrate surface on which processing can be performed includes materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon doped silicon oxides, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, without limitation, semiconductor wafers. Substrates may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure and/or bake the substrate surface. In addition to film processing directly on the surface of the substrate itself, in the present disclosure, any of the film processing steps disclosed may also be performed on an underlayer formed on the substrate as disclosed in more detail below, and the term “substrate surface” is intended to include such underlayer as the context indicates. Thus for example, where a film/layer or partial film/layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film/layer becomes the substrate surface.
As used herein, “consists essentially of” with respect to composition of a layer means that the stated elements compose greater than 95%, greater than 98%, greater than 99% or greater than 99.5% of the stated material on an atomic basis. For the avoidance of doubt, no stoichiometric ratios are implied by the identification of materials disclosed herein. For example, a SiO material contains silicon and oxygen. These elements may or may not be present at a 1:1 ratio.
Depositing a high quality lead magnesium niobate-lead titanate (PMNPT) thin film can be more challenging than depositing a lead zirconate titanate (PZT) thin film due to the presence of one more element in PMNPT as compared to PZT (five elements in PMNPT versus four elements in PZT). Provided herein are superior quality PMNPT thin layers with excellent resulting film qualities. According to one or more embodiments, PMNPT thin films and methods of their fabrication are particularly useful for micro electro mechanical systems (MEMS) sensors and actuators, which are suitable for ink jet printing, medical ultrasound, and gyroscopes.
Reference to a piezoelectric layer, for example, a relaxor-PT layer, in particular to a PMNPT layer, refers to a thickness of material resulting from deposition of a piezoelectric material, for example, a relaxor-PT material, and in particular a PMNPT material.
Reference to a piezoelectric film, for example, a relaxor-PT film, in particular to a PMNPT film, refers to a plurality of layers of one or more materials including a piezoelectric layer, for example, a relaxor-PT layer, and in particular a PMNPT layer. A final film may include an annealing treatment of an underlying layer.
Embodiments herein relate to piezoelectrc devices, physical vapor deposition systems, and methods of fabricating piezoelectric layers and films. The piezoelectric films advantageously comprise a piezoelectric coefficient (d33) of greater than or equal to 200 pm/V, including greater than or equal to 250 pm/V, greater than or equal to 300 pm/V, or greater than or equal to 330 pm/V.
Measurement by Double-Beam Laser Interferometry (DBLI) of a piezoelectric coefficient (d33) was 330 pm/V±10 pm/V for a PMNPT film fabricated as follows: a substrate with a seed layer comprising titanium was conditioned in a conditioning chamber, where a temperature of the substrate was set to 500° C.±50° C.; the substrate was transferred to a processing chamber, where a temperature of the substrate was set to 650° C.±50° C.; a PMNPT material was physical vapor deposition (PVD)-deposited onto the seed layer in a crystallographic phase; and the substrate was annealed in the processing chamber to yield a final PMNPT film. Thickness of the resulting film was 3 micrometers. Formation of the PMNPT film and a <001> crystallographic orientation was confirmed by measurement by x-ray diffraction (XRD). Scanning electronic microscope micrographs showed crystalline columnar grains and exclusive <001> crystallographic orientation of the resulting film. A piezoelectric coefficient (d33) for the underlying PMNPT layer prior to annealing was 300 pm/V±10 pm/V.
In one or more embodiments, the substrate 12 is a semiconductor wafer, which can be a silicon wafer, or another semiconductor such as germanium (Ge). The silicon wafer can be a single crystal silicon wafer.
In one or more embodiments, as shown in
In one or more embodiments, the thermal oxide layer 20 comprises one or more silicon oxides, including SiO2, SiO, or combinations thereof. In one or more embodiments, the thermal oxide layer 20 has a thickness in a range of from about 50 to about 1000 nm. In one or more embodiments, the thermal oxide layer 20 is an amorphous layer.
In one or more embodiments, the adhesion layer 22 comprises a metal oxide. The stoichiometry of the metal oxide layer can include MO2, M2O3, or MO (with M representing the metal element), or another suitable stoichiometry of the metal and oxygen. In one or more embodiments, the adhesion layer 22 comprises titanium oxide, e.g., TiO2, Ti2O3, TiO, or anther stoichiometry of titanium and oxygen. In some implementations, rather than a metal oxide layer, the adhesion is a pure metal or a metal alloy. Examples for the metal (either for the metal of the metal oxide, or for the pure metal or component of the metal alloy) include titanium, chromium, chromium-nickel, and nickel. The adhesion layer 22 can be thinner than the thermal oxide layer 20. For example, a titanium oxide adhesion layer 22 can have a thickness in a range of about 25 to about 40 nm. The adhesion layer 22 can have a crystallographic orientation for facilitating a desired crystallographic orientation of the first conductive layer 24. For example, a TiO2 layer can have a <001> orientation to facilitate a <111> orientation in a platinum conductive layer.
The first conductive layer 24 and the second conductive layer 30 are independently formed from conductive materials. In one or more embodiments, the second conductive layer 30 has the same material composition as the first conductive layer 24. Similarly, the first conductive layer 24 and the second conductive layer 30 have independent thicknesses. In one or more embodiments, the first conductive layer 24 and the second conductive layer 30 have independent thicknesses in a range of 50-300 nm. In one or more embodiments, the second conductive layer 30 has the same thickness as the first conductive layer 24.
In one or more embodiments, the first conductive layer 24 and the second conductive layer 30 independently comprise a conductive material, including but not limited to: platinum, gold, iridium, molybdenum, SrRuO3, or combinations thereof. In one or more embodiments, the first conductive layer 24 is thicker than the adhesion layer 22, and/or is thicker than the thermal oxide layer 20. For example, the first conductive layer 24 can have a thickness in a range of about 50 to about 300 nm. The first conductive layer 24 can have a crystallographic orientation for facilitating a desired crystallographic orientation of the seed layer 26. For example, a platinum layer can have a <111> crystallographic orientation to facilitate a <001> orientation in a titanium oxide seed layer.
In one or more embodiments, the seed layer 26 is a metal oxide, in particular, an oxide of titanium or niobium. In one or more embodiments, the seed layer is TiO2, Ti2O3, TiO, or another stoichiometry of titanium and oxygen. Desirably, the seed layer 26 has a uniform stoichiometry across the surface of the substrate 12. The seed layer 26 can have a crystallographic orientation for facilitating a desired crystallographic orientation of the piezoelectric layer 28. For example, a titanium oxide layer can have a suitable crystallographic orientation to facilitate a <001> orientation in a PMNPT piezoelectric layer. In one or more embodiments, the seed layer 26 is thinner than the adhesion layer 22. In one or more embodiments, the seed layer 26 has a thickness in a range of about 1 nm to about 5 nm, in particular, 2 nm±10%.
The piezoelectric layer 16 is deposited on the seed layer 26. Examples of material for the piezoelectric layer 16 include relaxor-PT materials. In particular, the material can be (1-x)[Pb(Mg(1-y)Nby)O3]-x[PbTiO3] (PMNPT), where x is about 0.2 to 0.8, and y is about 0.8 to 0.2, e.g., about ⅔. Due to the presence of the metal oxide seed layer, the PMNPT material can be predominantly, e.g., substantially entirely, a <001> crystallographic orientation. In one or more embodiments, the piezoelectric layer has a thickness in a range of about 50 nm to about 10 microns.
A voltage can be applied between the first conductive layers 24 and the second conductive layer 30 in order to actuate the piezoelectric layer 16. Thus, the first conductive layer provides a lower electrode 24 and the second conductive layer 30 provides an upper electrode with the piezoelectric layer 16 sandwiched therebetween.
To fabricate the stack of inner layers 14, the thermal oxide layer 20 is prepared by thermal processing of a thermal material, for example, silicon in an oxygen-containing atmosphere, yielding an oxide of SiO2 grown on a Si <001> single crystal wafer. The thermal oxide can be grown to a thickness in a range of about 50 to about 1000 nm, for example, 100 nm. The thermal oxide can be formed on both sides of the silicon wafer.
When the optional adhesion layer is included, an adhesion material, for example, a metal, is deposited by PVD from a metal target in some embodiments. For example, the adhesion layer may comprise titanium. For example, the metal layer can be deposited on the substrate whose temperature is in a range of from room temperature (e.g., 25° C.) to 600° C.; and a power density of 0.5 to 20 Watts per square inch, e.g., about 1.5 Watts per square inch, applied to the target metal. Deposition of the adhesion layer can be followed by annealing in a rapid thermal processing chamber or furnace in the presence of oxygen or air to form the adhesion layer in the form of the metal oxide layer, e.g., TiOx. The annealing can be at a temperature of 500-800° C., e.g., for 2-30 minutes. The resulting adhesion layer can have a thickness in a range of about 5 nm to about 400.
The first conductive layer is deposited on the substrate. For example, on the adhesion layer (if present), on the silicon oxide (if present), or directly on the semiconductor wafer. For example, a platinum layer can be deposited on the substrate whose temperature is in a range of from room temperature (e.g., 25° C.) to 500° C., with a power density of 0.5 to 20 Watts per square inch, e.g., 4-5 Watts per square inch, applied to a platinum material target. Deposition of the first conductive layer can proceed until the layer has a thickness in a range of from about 50 to about 300 nm. The adhesion layer, if present, provides improved adhesion between the first conductive layer (e.g., platinum) and the thermal oxide layer (e.g., silicon oxide).
The seed layer 26 is generally a very thin metal layer, e.g., titanium, which is deposited on the lower electrode, e.g., the platinum layer, by a PVD (e.g., DC sputtering) or a CVD (e.g., ALD) technique. In particular, a titanium layer can be deposited, e.g., by DC sputtering. For example, the titanium seed layer can be deposited on the substrate whose temperature is in a range of from room temperature (e.g., 25° C.) to 500 C and a power density of 0.5 to 4 Watts per square inch, e.g., 1 Watt per square inch, applied to a titanium material target. In one or more embodiments, the seed layer has a thickness in a range of from about 1 nm to about 5 nm. The thin metal layer can then be oxidized, e.g., heated in an oxidizing atmosphere to convert the metal layer to a metal oxide, e.g., convert Ti to TiOx, to provide the seed layer. Additionally, the oxidized seed layer can also be deposited directly by a PVD or CVD technique, e.g., TiOx deposition by RF sputtering or ALD.
In one or more embodiments, a piezoelectric device comprises: a substrate and a lead magnesium niobate-lead titanate (PMNPT) piezoelectric film on the substrate. In one or more embodiments, the PMNPT piezoelectric film comprises: a thermal oxide layer on the substrate; a first electrode above on the thermal oxide layer; a seed layer above the first electrode; a lead magnesium niobate-lead titanate (PMNPT) piezoelectric layer on the seed layer; and a second electrode on the PMNPT piezoelectric layer.
In one or more embodiments, the PMNPT layer (prior to annealing) comprises a piezoelectric coefficient (d33) of greater than or equal to 170 pm/V, including greater than or equal to 220 pm/V, greater than or equal to 270 pm/V, or greater than or equal to 300 pm/V.
In one or more embodiments, the PMNPT film comprises a piezoelectric coefficient (d33) of greater than or equal to 200 pm/V, including greater than or equal to 250 pm/V, greater than or equal to 300 pm/V, or greater than or equal to 330 pm/V.
In some embodiments, the PMNPT piezoelectric film comprises: a thermal oxide layer of silicon oxide on the substrate; a first electrode of platinum above on the thermal oxide layer; a seed layer of a titanium oxide above the first electrode; a lead magnesium niobate-lead titanate (PMNPT) piezoelectric layer on the seed layer; and a second electrode of platinum on the PMNPT piezoelectric layer.
In one or more embodiments, the PMNPT piezoelectric layer comprises a thickness in a range of greater than or equal to 50 nanometers to less than or equal to 10 micrometers, including all values and subranges therebetween.
In one or more embodiments, the PMNPT film comprises a thickness in a range of greater than or equal to 1 micrometers to less than or equal to 5 micrometers, including all values and subranges therebetween.
Turning to
In one or more embodiments, the substrate resides in the conditioning chamber for a duration in a range of 5 seconds to 5 minutes.
At operation 330, the substrate is transferred from the pre-conditioning chamber to a deposition chamber. In one or more embodiments, the deposition chamber comprises a second support to hold the substrate in the deposition chamber. In one or more embodiments, operation 320 is conducted in a first chamber that is integrated with a second chamber where operation 340 is conducted, which allows for a transfer between the chambers without breaking vacuum and/or without exposure to ambient air.
Next at operation 340, the piezoelectric layer is deposited on the seed layer. The deposition chamber is configured to provide a temperature of the substrate in a range of 600° C. to 700° C., e.g., 650° C.±50° C. Further discussion of the deposition chamber is provided with respect to
In one or more embodiments, the PVD treatment includes sputtering the piezoelectric material from a target in the deposition chamber. In particular, a piezoelectric layer is deposited while keeping the target at a relatively low temperature, e.g., no higher than 100° C. For example, the target can be kept at a temperature in a range of from room temperature (e.g., 25° C.) to 100° C. A cooling system in the ceiling of the deposition chamber can be used to cool the target.
In one or more embodiments, the physical vapor deposition of the piezoelectric material includes applying power to the target at a power less than 1.5 W/cm2 of the target. Power applied to the target can be restricted to less than 1.5 W/cm2, e.g., less than 1.2 W/cm2. For example, for a 13 inch diameter target, the power source can apply about 1000 W power (in contrast a conventional PVD operation would be conducted at 1.5 kW to 5 kW). This lower power level results in less heat being generated in the target.
In one or more embodiments, the substrate resides in the deposition chamber for a duration in a range of 60 seconds to 30 minutes.
After deposition of the piezoelectric layer, at operation 350 the substrate is subjected to an annealing process. In one or more embodiments, the annealing process is an ex-situ thermal annealing. The substrate is removed from the deposition chamber and transferred to, for example, a furnace or rapid thermal processing system. The substrate can be heated to a temperature in a range for about 500° C. to about 750° C. In particular, for a piezoelectric layer formed of relaxor-PT material, the substrate can be heated to a temperature above the phase transition temperature between the perovskite and pyrochlore phases of the relaxor-PT material. For a piezoelectric layer that is about 70% PMN and 30% PT, the substrate should be raised to a temperature of about 750° C. or higher.
The temperature of the substrate should be raised with sufficient speed to limit formation of piezoelectric crystals in the pyrochlore phase, e.g. to below 50%. For example, the temperature can be raised from room temperature at a rate of 10-50° C. per second until the desired temperature is reached. Without being limited to any particular theory, the energy required for piezoelectric materials such as PMNPT to transition from the pyrochlore phase to the perovskite phase can be greater than the energy required to transition from the amorphous phase to the perovskite phase. Thus, if temperature is raised slowly, the piezoelectric material can enter and become “locked in” the pyrochlore phase. However, if the temperature is raised sufficiently rapidly, the piezoelectric material does not have sufficient time to form crystals in the pyrochlore phase.
The annealing can be conducted in a regular atmosphere, pure oxygen environment, pure nitrogen environment, a mixture of pure oxygen and nitrogen or in vacuum. Presence of oxygen during annealing can affect stoichiometry of the piezoelectric layer.
The annealing can significantly change crystalline grain size. After annealing, the piezoelectric coefficient d33 of the film is greater than the piezoelectric coefficient d33 of the layer.
Consistent with the foregoing, methods of this disclosure can be performed in the same chamber or in one or more separate processing chambers. In some embodiments, the substrate is moved from the first chamber to a separate, second chamber for further processing. The substrate can be moved directly from the first chamber to the separate processing chamber, or it can be moved from the first chamber to one or more transfer chambers, and then moved to the separate processing chamber. Accordingly, a suitable processing apparatus may comprise multiple chambers in communication with a transfer station. An apparatus of this sort may be referred to as a “cluster tool” or “clustered system,” and the like.
Generally, a cluster tool is a modular system comprising multiple chambers which perform various functions including substrate center-finding and orientation, annealing, deposition and/or etching. According to one or more embodiments, a cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber may house a robot that can shuttle substrates between and among processing chambers and load lock chambers. The transfer chamber is typically maintained at a vacuum condition and provides an intermediate stage for shuttling substrates from one chamber to another and/or to a load lock chamber positioned at a front end of the cluster tool. Two well-known cluster tools which may be adapted for the present disclosure are the Centura® and the Endura®, both available from Applied Materials, Inc., of Santa Clara, Calif. However, the exact arrangement and combination of chambers may be altered for purposes of performing specific steps of a process as described herein. Other processing chambers which may be used include, but are not limited to, cyclical layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etch, pre-clean, chemical clean, thermal treatment such as RTP, plasma nitridation, anneal, orientation, hydroxylation and other substrate processes. By carrying out processes in a chamber on a cluster tool, surface contamination of the substrate with atmospheric impurities can be avoided without oxidation prior to depositing a subsequent film.
In some embodiments, the first processing chamber and the second processing chamber are part of the same, clustered, processing tool. Accordingly, in some embodiments, the method is an in-situ integrated method.
In some embodiments, the first processing chamber and the second processing chamber are different processing tools. Accordingly, in some embodiments, the method is an ex-situ integrated method.
According to one or more embodiments, the substrate is continuously under vacuum or “load lock” conditions, and is not exposed to ambient air when being moved from one chamber to the next. The transfer chambers are thus under vacuum and are “pumped down” under vacuum pressure. Inert gases may be present in the processing chambers or the transfer chambers. In some embodiments, an inert gas is used as a purge gas to remove some or all of the reactants. According to one or more embodiments, a purge gas is injected at the exit of the deposition chamber to prevent reactants from moving from the deposition chamber to the transfer chamber and/or additional processing chamber. Thus, the flow of inert gas forms a curtain at the exit of the chamber.
The substrate can be processed in single substrate deposition chambers, where a single substrate is loaded, processed and unloaded before another substrate is processed. The substrate can also be processed in a continuous manner, similar to a conveyer system, in which multiple substrate are individually loaded into a first part of the chamber, move through the chamber and are unloaded from a second part of the chamber. The shape of the chamber and associated conveyer system can form a straight path or curved path. Additionally, the processing chamber may be a carousel in which multiple substrates are moved about a central axis and are exposed to deposition, etch, annealing, and/or cleaning processes throughout the carousel path.
The substrate can also be stationary or rotated during processing. A rotating substrate can be rotated continuously or in discreet steps. For example, a substrate may be rotated throughout the entire process, or the substrate can be rotated by a small amount between exposures to different reactive or purge gases. Rotating the substrate during processing (either continuously or in steps) may help produce a more uniform deposition or etch by minimizing the effect of, for example, local variability in gas flow geometries.
At least one conditioning chamber 920, which may be referred to as a pre-clean/buffer chamber is connected to the central transfer station 910. The conditioning chamber 920 can include one or more of a heater, a radical source or plasma source. The conditioning chamber 920 can be used for preconditioning the substrates herein prior to deposition. The conditioning chamber 920 pre-heats the substrate for processing. In some embodiments, there are two conditioning chambers 920 connected to the central transfer station 910.
A processing chamber 930 can be connected to the central transfer station 910. The processing chamber 930 can be configured as a physical vapor deposition chamber for depositing a piezoelectric material onto a seed layer and may be in fluid communication with one or more reactive gas sources to provide one or more flows of reactive gases to the processing chamber 930. The substrate can be moved to and from the processing chamber 930 by the robot 912 passing through isolation valve 914.
Other processing chambers 940 and 960 can also be connected to the central transfer station 910 for any further desired processing. The substrate can be moved to and from the processing chamber 940 by robot 912 passing through isolation valve 914. The substrate can be moved to and from the processing chamber 960 by robot 912 passing through isolation valve 914.
In some embodiments, each of the processing chambers 930, 940, and 960 is configured to perform different portions of the processing method.
In some embodiments, the processing system 900 includes one or more metrology stations. For example metrology stations can be located within pre-clean/buffer chamber 920, within the central transfer station 910 or within any of the individual processing chambers. The metrology station can be any position within the system 900 that allows the distance of the recess to be measured without exposing the substrate to an oxidizing environment.
At least one controller 950 is coupled to one or more of the central transfer station 910, the pre-clean/buffer chamber 920, processing chambers 930, 940, or 960. In some embodiments, there are more than one controller 950 connected to the individual chambers or stations and a primary control processor is coupled to each of the separate processors to control the system 900. The controller 950 may be one of any form of general-purpose computer processor, microcontroller, microprocessor, etc., that can be used in an industrial setting for controlling various chambers and sub-processors.
The at least one controller 950 can have a processor 952, a memory 954 coupled to the processor 952, input/output devices 956 coupled to the processor 952, and support circuits 958 to communication between the different electronic components. The memory 954 can include one or more of transitory memory (e.g., random access memory) and non-transitory memory (e.g., storage).
The memory 954, or computer-readable medium, of the processor may be one or more of readily available memory such as random access memory (RAM), read-only memory (ROM), floppy disk, hard disk, or any other form of digital storage, local or remote. The memory 954 can retain an instruction set that is operable by the processor 952 to control parameters and components of the system 900. The support circuits 958 are coupled to the processor 952 for supporting the processor in a conventional manner. Circuits may include, for example, cache, power supplies, clock circuits, input/output circuitry, subsystems, and the like.
The chamber 100 includes chamber walls 101 that surround a vacuum chamber 102, a gas source 104, a pumping system 106 and a target power source 108. Inside the vacuum chamber 102 is a target 110 and a pedestal 112 to support the substrate 120. A shield can be placed inside the chamber to enclose a reaction zone. The pedestal can be vertically movable, and a lift mechanism 116 can be coupled to the pedestal 112 to position the pedestal 112 relative to the target 110. A heater or chiller 136, e.g., a resistive heater or a thermoelectric chiller, can be embedded in the pedestal 112 to maintain the substrate 120 at a desired process temperature.
The target 110 is composed of the material to be deposited, e.g., lead magnesium niobate-lead titanate for PMNPT. However, the target can have an excess of PbOx relative to the desired stoichiometry for the layer to be deposited to account for the loss of lead due to its volatile nature. For example, the target can have an excess of PbO of 1-20 mol %. The target itself should be of homogenous composition. he target 110 can be platinum (Pt) or Titanium (Ti) for deposition of other layers.
The gas source 104 can introduce an inert gas, e.g., argon (Ar) or xenon (Xe), or a mixture of an inert gas with a processing gas, e.g., oxygen, into the vacuum chamber 102. The chamber pressure is controlled by the pumping system 106. The target power source 108 may include a DC source, a radio frequency (RF) source, or a DC-pulsed source.
In operation, the substrate 120 is supported within the chamber 102 by the pedestal 112, gas from the source 104 flows into the chamber 102, and the target power source 108 applies power to the target 110 at a frequency and voltage to generate a plasma in the chamber 102. The target materials are sputtered from the target 110 by the plasma, and deposited on the substrate 120.
If the target power source 108 is DC or DC-pulsed, then the target 110 acts as a negatively biased cathode and the shield is a grounded anode. For example, a plasma is generated from the inert gas by applying a DC bias to the sputtering target 210 sufficient to generate a power density of about 0.5 to 350 Watts per square inch, e.g., 100-38,000 W for a 13 inch diameter target, and more typically about 100-10,000 W. If the target power source 108 is an RF source, then the shield is typically grounded and the voltage at the target 110 varies relative to the shield at a radio frequency, typically 13.56 MHz. In this case, electrons in the plasma accumulate at the target 110 to create a self-bias voltage that negatively biases the target 110.
The chamber 100 may include additional components for improving the sputtering deposition process. For example, a power source 124 may be coupled to the pedestal 112 for biasing the substrate 120, in order to control the deposition of the film on the substrate 120. The power source 124 is typically an AC source having a frequency of, for example, between about 350 to about 450 kHz. When the bias is applied by the power source 124, a negative DC offset is created (due to electron accumulation) at the substrate 120 and the pedestal 112. The negative bias at the substrate 120 attracts sputtered target material that becomes ionized. The target material is generally attracted to the substrate 120 in a direction that is substantially orthogonal to the substrate 120. As such, the bias power source 124 improves the step coverage of deposited material compared to an unbiased substrate 120.
The chamber 100 may also have a magnet 126 or magnetic sub-assembly positioned behind the target 110 for creating a magnetic field proximate to the target 110. In some implementations, the magnet rotates during the deposition process.
The operation of the chamber can be controlled by a controller 150, e.g., a dedicated microprocessor, e.g., an ASIC, or a conventional computer system executing a computer program stored in a non-volatile computer readable medium. The controller 150 can include a central processor unit (CPU) and memory containing the associated control software.
Reference throughout this specification to “one embodiment,” “certain embodiments,” “one or more embodiments” or “an embodiment” means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of the phrases such as “in one or more embodiments,” “in certain embodiments,” “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily referring to the same embodiment of the disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.
Although the disclosure herein has been described with reference to particular embodiments, those skilled in the art will understand that the embodiments described are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the method and apparatus of the present disclosure without departing from the spirit and scope of the disclosure. Thus, the present disclosure can include modifications and variations that are within the scope of the appended claims and their equivalents.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2021/072459 | 1/18/2021 | WO |
