Korean Patent Application No. 10-2016-0060271, filed on May 17, 2016, in the Korean Intellectual Property Office, and entitled: “Display Device Including An Anisotropic Conductive Film, and Manufacturing Method of the Anisotropic Conductive Film,” is incorporated by reference herein in its entirety.
Embodiments relate to a display device including an anisotropic conductive film and a manufacturing method of an anisotropic conductive film.
A display device displaying an image (such as a liquid crystal display and an organic light emitting diode display) includes a display panel. To control the operation of the display panel, a pad portion for input and output of a signal may be disposed in the display panel, and the pad portion may be bonded with an integrated circuit chip or a flexible printed circuit board.
For an electrical connection and physical coupling between the integrated circuit chip or the flexible printed circuit board and the pad portion, an anisotropic conductive film (ACF) may be used. The anisotropic conductive film (as a film in which conductive particles are disposed in an insulating layer) has conductivity in a thickness direction of the film and is insulative in a surface or lateral direction of the film.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
Embodiments are directed to a display device including an anisotropic conductive film and a manufacturing method of an anisotropic conductive film.
The embodiments may be realized by providing a display device including a pad portion positioned on a substrate, the pad portion including a plurality of pads; an anisotropic conductive film positioned on the pad portion; and a connection member bonded to the pad portion through the anisotropic conductive film, the connection member including a plurality of bumps, wherein the anisotropic conductive film includes a supporting layer including a plurality of conductive particles, each of the conductive particles having a part protruded from a first surface of the supporting layer and a part protruded from a second surface of the supporting layer; a first adhesive layer contacting the first surface of the supporting layer and the part of each conductive particle protruding from the first surface; and a second adhesive layer contacting the second surface of the supporting layer and the part of each conductive particle protruding from the second surface, and wherein at least one of the first adhesive layer and the second adhesive layer is positioned at both of a first region of the display device and a second region of the display device, the first region being a region in which the pads and the bumps are overlapped and the second region being a region in which the pads and the bumps are not overlapped.
The supporting layer may be formed of a material that is different from a material of the first adhesive layer and a material of the second adhesive layer.
The supporting layer may include at least one of polyimide, polyethylene terephthalate, nylon 6, polyvinylidene fluoride, polycarbonate, polybutylene succinate, or polyethylene.
A melting point of the supporting layer may be higher than a curing point of the first adhesive layer and a curing point of the second adhesive layer.
An interval between the conductive particles adjacent to one another in a first direction may be uniform in the first region and the second region.
An interval between the conductive particles adjacent to one another in a second direction may be uniform in the first region and the second region, the second direction crossing the first direction.
The plurality of conductive particles may be arranged as a rectangle or a rhombus in a plan view.
A diameter of the plurality of conductive particles may be larger than a thickness of the supporting layer.
A part of the first adhesive layer in the first region may be thinner than a part of the first adhesive layer in the second region.
A part of the second adhesive layer in the first region may be thinner than a part of the second adhesive layer in the second region.
The embodiments may be realized by providing a method for manufacturing an anisotropic conductive film, the method including arranging conductive particles at a non-cured resin layer; curing the resin layer to fix the conductive particles in the cured resin layer; and etching the cured resin layer to form a supporting member such that a part of the conductive particles are exposed.
Etching the cured resin layer may include exposing the part of the conductive particles on at least one surface of the supporting member.
The etching the cured resin layer may include reactivity ion etching.
The supporting layer may include at least one of polyimide, polyethylene terephthalate, nylon 6, polyvinylidene fluoride, polycarbonate, polybutylene succinate, or polyethylene.
The method may further include forming an adhesive layer on at least one surface of the supporting member.
The adhesive layer may be formed to be in contact with the exposed part of the conductive particles.
Forming the adhesive layer may include laminating a non-cured resin layer on the supporting member.
The adhesive layer may be formed of a material that is different from a material of the supporting layer.
A melting point of the supporting layer may be higher than a curing point of the adhesive layer.
The supporting layer may be formed to have a thickness that is smaller than a diameter of each conductive particle.
Features will be apparent to those of skill in the art by describing in detail exemplary embodiments with reference to the attached drawings in which:
Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; however, they may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey exemplary implementations to those skilled in the art.
In the drawing figures, the dimensions of layers and regions may be exaggerated for clarity of illustration. Like reference numerals refer to like elements throughout.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. Further, in the specification, the word “on” or “above” means positioned on or below the object portion, and does not necessarily mean positioned on the upper side of the object portion based on a gravitational direction.
In addition, unless explicitly described to the contrary, the word “comprise” and “include” and variations such as “comprises”, “includes”, “including”, or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.
Further, in the specification, the phrase “in a plan view” means when an object portion is viewed from the above, and the phrase “in a cross-section” means when a cross-section taken by vertically cutting an object portion is viewed from the side.
A display device according to an exemplary embodiment will be described with reference to accompanying drawings.
Referring to
The display panel 10 may include a display area DA displaying the image, and a non-display area NDA in which elements and/or wires to generate and/or transmit various signals applied to the display area DA are disposed and positioned outside the display area DA. In
In the display area DA of the display panel 10, a plurality of pixels PX, e.g., may be disposed in a matrix direction. In the display area DA, the signal lines such as a plurality of gate lines and a plurality of data lines may also be disposed. The plurality of gate lines may mainly extend in a first direction D1 (e.g., a row direction), and the plurality of data lines may mainly extend in a second direction D2 (e.g., a column direction) crossing the first direction D1. Each pixel PX may be connected with a gate line and a data line, thereby being applied with a gate signal and a data signal from these signal lines. In a case of an organic light emitting diode display, in the display area DA, for example, a plurality of driving voltage lines extending in the second direction D2 and transmitting a driving voltage to the pixel PX may be disposed.
In the non-display area NDA of the display panel 10, a first pad portion PP1 may be disposed to receive a signal from outside of the display panel 10. The first pad portion PP1 may be connected to one end of the flexible printed circuit board 50. An anisotropic conductive film may be positioned between the first pad portion PP1 and the flexible printed circuit board 50. The other end of the flexible printed circuit board 50, e.g., may be connected to an external printed circuit board, thereby transmitting a signal such as image data.
A driving device generating and/or processing the various signals to drive the display panel 10 may be positioned at the non-display area NDA of the display panel 10 or the flexible printed circuit board 50, or may be positioned at the external printed circuit board. The driving device may include a data driver applying the data signal to the data line, a gate driver applying the gate signal to the gate line, and a signal controller controlling the data driver and the gate driver.
In an implementation, the data driver may be mounted to a second pad portion PP2 positioned between the display area DA and the first pad portion PP1 in a shape of an integrated circuit chip 400. The anisotropic conductive film may be located between the second pad portion PP2 and the integrated circuit chip 400. In an implementation, the data driver may be mounted to the flexible printed circuit board 50 in an integrated circuit chip shape, thereby being connected to the first pad portion PP1 in a tape carrier package (TCP). In an implementation, the gate driver may be provided in the integrated circuit chip shape. In an implementation, it may be integrated with the non-display area of the left/right edges of the display panel 10. The signal controller may be formed of the integrated circuit chip 400 such as the data driver or a separate integrated circuit chip.
So far, the overall configuration of the display device has been described. Next, the display device according to an exemplary embodiment will be described while focusing on a part where the flexible printed circuit board 50 is connected to the first pad portion PP 1.
Referring to
A pad P of the first pad portion PP1 may be positioned on the substrate 110, and the flexible printed circuit board 50 may include a bump B protruded toward the pad P. The bump B of the flexible printed circuit board 50 may be electrically connected to the pad P of the first pad portion PP1 through conductive particles CP of the anisotropic conductive film 20. The bump B and the pad P may each be referred to as an electrode.
In an implementation, the anisotropic conductive film 20 may include three layers, e.g., a supporting layer 21, and a first adhesive layer 22, and a second adhesive layer 23 positioned on and under the supporting layer 21. For example, the first adhesive layer 22 may be on one side of the supporting layer 21 and the second adhesive layer 23 may be on another side of the supporting layer 21. The supporting layer 21 may include the conductive particles CP, e.g., the supporting layer 21 may surround or accommodate the conductive particles CP, and may electrically connect the flexible printed circuit board 50 to the first pad portion PP1. The first and second adhesive layers 22 and 23 may physically connect the flexible printed circuit board 50 to the first pad portion PP1.
In the supporting layer 21, the conductive particles CP may be arranged in a single layer at a predetermined interval, and a position of the conductive particles may be rigidly fixed by the supporting layer 21 (which may be cured prior to being applied to the display device). The adjacent conductive particles CP may be insulated from each other by the supporting layer 21.
The conductive particles CP may be positioned at or in a first region R1 (where the bump B and the pad P face and overlap each other), and may also be positioned at a second region R2 (where the bump B and the pad P do not overlap, e.g., where the bump B and/or the pad P are not present on the substrate 110 or the circuit board 50. In the first region R1, the conductive particles CP may contact the bump B and the pad P that are disposed thereon and thereunder, thereby electrically connection them. Accordingly, the signals transmitted through the flexible printed circuit board 50 may be transmitted to the display panel 10 through the bump B, the conductive particles CP, and the pad P. The conductive particles CP may be isolated in the second region R2. For example, in the second region R2, the conductive particles CP may not contact any of the bumps B or pads P, and do not contact any adjacent conductive particles CP. Accordingly, although the conductive particles CP are present in the second region R2, a short may not be generated between the adjacent bumps B or the adjacent pads P. In an implementation, the conductive particles CP may not be positioned at or present in the second region R2.
The conductive particles CP may be spherical, and may have a diameter that is greater than a thickness of the supporting layer 21 (e.g., in the third direction D3). In an implementation, the conductive particles CP may have a diameter of several micrometers, e.g., about 2 to about 5 micrometers. Accordingly, the conductive particles CP may not be entirely disposed inside the supporting layer 21, and a part thereof may be on the or extend outside of the supporting layer 21. For example, a part of each conductive particle CP may be protruded on or at the upper surface of the supporting layer 21 and a part may be protruded under the lower surface of the supporting layer 21. For example, the conductive particle CP may extend outwardly from each of opposite sides of the supporting layer 21. In an implementation, the conductive particles CP may have a structure such that a metal layer such as nickel, cobalt, gold, silver, and copper is coated on the spherical polymer. In an implementation, the conductive particles CP may have another three-dimensional shape, e.g., other than the spherical shape.
The conductive particles CP in the supporting layer 21 may be substantially arranged with a constant interval between the adjacent conductive particles CP in any direction. For example, the conductive particles CP may be arranged at a uniform interval in the first direction D1 and may also be arranged at a uniform interval in the second direction D2 crossing the first direction D1. This uniform interval may be maintained throughout the first region R1 and the second region R2, because the conductive particles CP that are previously cured or fixed in position when pressing the anisotropic conductive film (AFC) may not be moved within the supporting layer 21 to be fixed.
The first adhesive layer 22 may be positioned at or on the upper surface of the supporting layer 21, and the second adhesive layer 23 may be positioned at or on the lower surface of the supporting layer 21. The first and second adhesive layers 22 and 23 may be formed thinly in the first region R1, and may be thickly formed in the second region R2.
Before the anisotropic conductive film 20 is used to bond the flexible printed circuit board 50 to the first pad portion PP1, the first and second adhesive layers 22 and 23 may be in the non-cured state and may have substantially the same thickness throughout the entire surface of the anisotropic conductive films 20. To bond the flexible printed circuit board 50 to the first pad portion PP1, if the anisotropic conductive film 20 is disposed therebetween and pressure is applied, among the first and second adhesive layers 22 and 23 in the non-cured state, the part that is disposed in the first region R1 may flow and may be pushed into the second region R2. Thus, the first adhesive layer 22 may fill the space between the adjacent bumps B, and the second adhesive layer 23 may fill the space between the adjacent pads P. Accordingly, the conductive particles CP may contact the bump B and the pad P in the first region R1 such that the bump B and the pad P are electrically connected. In the second region R2, the area where the first and second adhesive layers 22 and 23, and the flexible printed circuit board 50, and the first pad portion PP1 are contacted may be increased, thereby increasing the adherence. In an implementation, the first and/or second adhesive layers 22 and 23 in the first region R1 may not be completely pressed out to the second region R2, and a part may remain in the first region R1. For example, as shown in
The supporting layer 21 may be in the cured state before and after applying the anisotropic conductive film 20 to the display device. In an implementation, the first and second adhesive layers 22 and 23 are in the non-cured state before being applied to the display device and in the cured state after being applied to the display device. Accordingly, in the process in which the anisotropic conductive film 20 is applied to the display device and the first and second adhesive layers 22 and 23 are cured, the structure of the supporting layer 21 may be maintained, and it may be difficult for the conductive particles CP included in the supporting layer 21 to flow, thereby maintaining their position. Accordingly, the generation of an undesirable short may be suppressed and a capture rate of the conductive particles CP may be improved, thereby improving the insulating and the connecting reliability. Also, the conductive particles CP, as described above, may be arranged with the uniform interval in the first region R1 and the second region R2.
The supporting layer 21 may be formed of a different material from that of the first and second adhesive layers 22 and 23. For example, when the first and second adhesive layers 22 and 23 are formed of a material that is cured by heat, the supporting layer 21 may be formed of a material having a higher melting point than a curing point of the first and second adhesive layers 22 and 23. Thus, the supporting layer 21 may not flow at a temperature applied to cure the first and second adhesive layers 22 and 23, and the conductive particles CP in the supporting layer 21 may maintain their original position. In an implementation, the supporting layer 21, e.g., may include at least one of a polyimide, polyethylene terephthalate, nylon 6, polyvinylidene fluoride, polycarbonate, polybutylene succinate, and polyethylene.
The first adhesive layer 22 and the second adhesive layer 23 may be formed of a material having an insulating property and adhesion, e.g., a thermosetting resin or a photocurable resin. In an implementation, the first adhesive layer 22 and the second adhesive layer 23 may each independently include, e.g., an epoxy resin layer, an acryl resin layer, or a polyester resin layer.
Referring to
The conductive particles CP may not be protruded from the lower surface of the supporting layer 21, for the second adhesive layer 23 disposed at the lower surface of the supporting layer 20, and the part disposed at the first region R1 may be completely pushed to the second region R2 when pressing the anisotropic conductive film 20. Accordingly, in the first region R1, the second adhesive layer 23 may not exist or may not be present as shown. On the other hand, the conductive particles CP may be protruded from the upper surface of the supporting layer 21, and the part of the first adhesive layer 22 may exist or may be present in the first region R1 like the exemplary embodiment show in
Referring
In an implementation, the flexible printed circuit board 50 may be bonded to the first pad portion PP1 was described. In an implementation, the characteristics related to the above-described anisotropic conductive film 20 may be equally applied to the integrated circuit chip 400 bonded to the second pad portion PP2 shown in
Next, the cross-sectional structure of the region A of
Referring to
Referring to
A gate insulating layer 140 may be positioned on the first conductive layer 129 and the gate electrode 124. The gate insulating layer 140 may be formed by depositing an inorganic insulating material such as a silicon oxide and a silicon nitride.
A semiconductor layer 154 of the transistor TR may be positioned on the gate insulating layer 140. In the pixel area, a source electrode 173 and a drain electrode 175 of the transistor TR may be positioned on the semiconductor layer 154, and in the pad region, a second conductive layer 179 may be positioned on the gate insulating layer 140. The second conductive layer 179 may overlap the first conductive layer 129 and may be connected to the first conductive layer 129 through a contact hole formed in the gate insulating layer 140. The second conductive layer 179, the source electrode 173, and the drain electrode 175 may be formed by depositing and patterning a conductive material, e.g., copper (Cu), aluminum (Al), silver (Ag), molybdenum (Mo), chromium (Cr), gold (Au), platinum (Pt), palladium (Pd), tantalum (Ta), tungsten (W), titanium (Ti), or nickel (Ni).
A protection layer 180 (including an organic insulating material and/or an inorganic insulating material) may be positioned on the source electrode 173 and the drain electrode 175, and a pixel electrode 191 (including a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO)) may be positioned on the protection layer 180. The pixel electrode 191 may be connected to the drain electrode 175 through a contact hole formed in the protection layer 180, thereby receiving a data signal. A liquid crystal layer 3 including liquid crystal molecules 31 may be positioned on the pixel electrode 191, and an insulating layer 210 sealing the liquid crystal layer 3 along with the substrate 110 may be positioned on the liquid crystal layer 3. The insulating layer 210 may have a substrate shape.
A common electrode 270 generating an electric field to the liquid crystal layer 3 along with the pixel electrode 191 to control an arrangement direction of the liquid crystal molecules 31 may be positioned under the insulating layer 210. An alignment layer may be positioned between the pixel electrode 191 and the liquid crystal layer 3 and between the liquid crystal layer 3 and the common electrode 270. In an implementation, the common electrode 270 may be positioned between the substrate 110 and the liquid crystal layer 3. The common electrode 270 may include the transparent conductive material, e.g., indium tin oxide (ITO) or indium zinc oxide (IZO).
In the pad portion shown in
Referring to
The gate insulating layer 140 may be positioned on the semiconductor layer 131. The first conductive layer 129 of the pad P and the gate electrode 124 of the transistor TR may be positioned on the gate insulating layer 140. The first conductive layer 129 and the gate electrode 124 may be formed together by depositing and patterning the conductive material such as the metal. In an implementation, the gate insulating layer 140 may be positioned throughout the entire surface of the substrate 110, or the gate insulating layer 140 may be positioned only at the region overlapping the gate conductor such as the first conductive layer 129 and the gate electrode 124.
An interlayer insulating layer 160 may be positioned on the first conductive layer 129 and the gate electrode 124. The second conductive layer 179 of the pad P and the source electrode 173 and the drain electrode 175 of the transistor TR may be positioned on the interlayer insulating layer 160. The second conductive layer 179 may overlap the first conductive layer 129, and may be connected to the first conductive layer 129 through the contact hole formed in the interlayer insulating layer 160. The source electrode 173 and the drain electrode 175 may be respectively connected to the source region and the drain electrode of the semiconductor layer 131 through the contact holes formed in the interlayer insulating layer 160 and the gate insulating layer 140.
The protection layer 180 may be positioned on the source electrode 173 and the drain electrode 175. In the pad region, the protection layer 180 may be positioned between the adjacent pads P as shown. In an implementation, the protection layer 180 may not be positioned in the pad region. The pixel electrode 191 may be positioned on the protection layer 180. The pixel electrode 191 may be connected to the drain electrode 175 through the contact hole formed in the protection layer 180, thereby being applied with the data signal.
A pixel definition 360 may be positioned on the protection layer 180 and the part of the pixel electrode 191. The pixel definition 360 may have an opening overlapping the pixel electrode 191. In the opening of the pixel definition 360, an emission layer 370 may be positioned on the pixel electrode 191, and the common electrode 270 may be positioned on the emission layer 370. The pixel electrode 191, the emission layer 370, and the common electrode 270 may together configure the organic light emitting diode. The pixel electrode 191 may be an anode of the organic light emitting diode, and the common electrode 270 may be a cathode of the organic light emitting diode. An encapsulation layer 390 encapsulating the organic light emitting diode may be positioned on the common electrode 270.
In the pad region, the flexible printed circuit board 50 including bumps B may be positioned on the pad P, and the anisotropic conductive film 20 may be positioned between the pad P and the flexible printed circuit board 50. The anisotropic conductive film 20, as described above, may include a supporting layer 21 including the conductive particles CP, and a first adhesive layer 22 and a second adhesive layer 23 thereunder and thereon. The conductive particles CP positioned to overlap the first adhesive layer 22 and the second adhesive layer 23 between the pad P and the bump B may contact them to be electrically connected, and the conductive particles CP that are not positioned between the pad P and the bump B may be isolated. The conductive particles CP may be uniformly positioned throughout the entire region, and the reliability of the anisotropic conductive film 20 may be ensured.
Until now, the exemplary embodiments in which the anisotropic conductive film is applied between the connection member such as the flexible printed circuit board and the pad portion of the display panel to be electrically and physically connected are described. Now, the anisotropic conductive film and the method thereof will be described with reference to
Referring to
The supporting layer 21 may be a polymer layer in a cured state. The supporting layer 21 may be in the cured state, and the conductive particles CP in the supporting layer 21 may be fixed. The supporting layer 21 may be polymerized, and when applying the anisotropic conductive film 20, movement may be difficult under the heating, and accordingly the conductive particles CP in the supporting layer 21 may be difficult to move. The supporting layer 21 may be formed of a material having a higher melting point than the curing point of the first and second adhesive layers 22a and 23b. In an implementation, the supporting layer 21 may include at least of, e.g., polyimide, polyethylene terephthalate, nylon 6, polyvinylidene fluoride, polycarbonate, polybutylene succinate, or polyethylene.
The first adhesive layer 22a on the supporting layer 21 and the second adhesive layer 23a under the supporting layer 21 may be the resin layers in the non-cured state. For example, the first adhesive layer 22a and the second adhesive layer 23a may be a thermosetting resin layer or a light-curing resin layer. The first adhesive layer 22a and the second adhesive layer 23a may be a polymerized type of resin layer including an epoxy compound or an acrylate compound, and a polymerization initiator, and the polymerization initiator may be an ion polymerization initiator or a radical polymerization initiator. The first adhesive layer 22a and the second adhesive layer 23a may be formed of same materials or different materials from each other. At least one of the first adhesive layer 22a and the second adhesive layer 23a may be the thermosetting resin such as the epoxy resin, a polyester resin, a bismaleimide resin, and a cyanate resin, and may be in a semi-cured state. In an implementation, the first adhesive layer 22a may be thicker than the second adhesive layer 23a.
Referring to
Referring to
Referring to
When the conductive particles CP are disposed inside the resin layer 21a, the resin layer 21a may be in the cured state, and although the pressure may be applied during the usage of the anisotropic conductive layer, the conductive particles CP may not be contacted with the electrodes to be electrically connected, but may be insulated by the resin layer 21a. As the conductive particles CP are exposed outside the resin layer 21a by etching the resin layer 21a, the conductivity in the direction of the thickness of the anisotropic conductive layer may be ensured while fixing the conductive particles CP in the supporting layer 21. In an implementation, as the etching of the resin layer 21a to expose the conductive particles CP, e.g., the dry etching such as reactive ion etching may be used.
Referring to
In the above-formed anisotropic conductive film 20, the conductive particles CP may not be moved within the supporting layer 21, but rather may be fixed with the constant interval, and this may be equally maintained after being pressed or heat-pressed to connect the connection member as well as before using the anisotropic conductive film 20.
The anisotropic conductive film 20 shown in
Referring to
Differently from the exemplary embodiment shown in
Referring to
Referring to
By way of summation and review, in a process of bonding the integrated circuit chip or the flexible printed circuit board to the pad portion through the anisotropic conductive film, a pressure may be applied to the anisotropic conductive film. In this case, the conductive particles may flow in the resin such that the insulation in the surface direction of the film and/or the conductivity in the thickness direction of the film may be deteriorated.
The embodiments may provide a display device including an anisotropic conductive film in which the flow of the conductive particles may be reduced and/or prevented.
According to exemplary embodiments, even if the anisotropic conductive film is pressed, the flow of the conductive particles may be reduced and/or prevented, and the conductivity in the thickness direction and the insulating in the surface direction of the anisotropic conductive film may be improved in the display device.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, as would be apparent to one of ordinary skill in the art as of the filing of the present application, features, characteristics, and/or elements described in connection with a particular embodiment may be used singly or in combination with features, characteristics, and/or elements described in connection with other embodiments unless otherwise specifically indicated. Accordingly, it will be understood by those of skill in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the following claims.
Number | Date | Country | Kind |
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10-2016-0060271 | May 2016 | KR | national |