Claims
- 1. A method of fabricating a semiconductor device having a silicide junction having a smooth interface between a doped silicon region and a mixed metal silicide region comprising:providing a silicon substrate having a doped silicon region disposed thereon; applying a layer of titanium metal over at least the doped silicon region; applying a layer of nickel over at least the titanium layer; heating the silicon substrate, doped silicon region, titanium layer and nickel layer to form a single mixed silicide layer comprising a mixture of nickel silicide and titanium silicide; and removing unreacted titanium and nickel.
- 2. A method of claim 1, wherein the titanium layer is 10 to 50 angstroms thick.
- 3. A method of claim 1, wherein the nickel layer is 20 to 100 angstroms thick.
- 4. A method of claim 1, wherein the nickel layer is approximately twice as thick as the titanium layer.
- 5. A method of claim 1, wherein the doped silicon regions are source/drain regions.
- 6. A method of claim 5, wherein the source/drain regions are As-doped silicon regions.
- 7. A method of claim 1, wherein the heating is conducted at about 400° C. to about 700° C. for a period of about 10 s to about 1 h.
- 8. A method of claim 7, wherein heating is conducted at about 450° C. to about 600° C.
- 9. A method of fabricating a semiconductor device having a silicide junction having a smooth interface between a doped silicon region and a mixed metal silicide region comprising:providing a silicon substrate having a doped silicon region disposed thereon; applying a layer of titanium metal, having a thickness of 10 to 50 angstroms, over at least the doped silicon region; applying a layer of nickel, having a thickness of 20 to 100 angstroms, over at least the titanium layer; heating the silicon substrate, doped silicon region, titanium layer and nickel layer, at about 450° C. to about 600° C. for about 10 s to about 30 s to form a mixed silicide layer comprising a mixture of nickel silicide and titanium silicide; and removing unreacted titanium and nickel.
- 10. A method of claim 1, wherein the doped silicon region is doped with 1015 to 1016 atoms/cm2 of As.
- 11. A method of claim 1, wherein the doped silicon region is doped with a dopant, wherein the dopant comprises As applied to the doped silicon region at 10-30 KeV.
- 12. A method of claim 1, wherein the titanium metal and nickel metal layers are removed by stripping with a 4:1 solution of H2SO4 and H2O2.
- 13. A method of fabricating a semiconductor device comprising:forming active regions in a silicon substrate by doping the active regions with arsenic; depositing first and second metal layers on the silicon substrate, the first metal layer comprising nickel and the second metal layer comprising a non-nickel refractory metal; annealing to form metal silicide in the active regions, the metal silicide comprising a single layer comprising a mixture of nickel silicide and non-nickel refractory metal silicide, and the metal silicide having a smooth interface with the remaining portion of the active regions.
- 14. A method of claim 13 wherein the second metal layer is 10 to 50 angstroms thick and the first metal layer is 20 to 100 angstroms thick.
- 15. A method of claim 13 wherein the second metal layer is deposited after the first metal layer.
- 16. A method of claim 13 wherein the first metal layer is approximately twice as thick as the second metal layer.
- 17. A method of claim 13, wherein the non-nickel refractory metal is a metal that diffuses into active silicon regions upon annealing.
- 18. A method of 13 wherein the non-nickel refractory metal is titanium.
- 19. A method of fabricating a semiconductor device comprising:forming active regions in a silicon substrate by doping the active regions with arsenic; depositing first and second metal layers on the silicon substrate, the first metal layer comprising nickel and the second metal layer comprising titanium; annealing to form metal silicide in the active regions, the metal silicide comprising a mixture of nickel silicide and non-nickel refractory metal silicide, and the metal silicide having a smooth interface with the remaining portion of the active regions; wherein: the second metal layer is 10 to 50 angstroms thick and the first metal layer is 20 to 100 angstroms thick; and the annealing is conducted at about 700° C. to about 900° C. for a period of about 10 second to about 1 hour.
RELATED APPLICATIONS
This application contains subject matter similar to the subject matter disclosed in U.S. patent application Ser. No. 09/729,696, filed on Dec. 6, 2000, and U.S. patent application Ser. No. 09/729,697, filed on Dec. 6, 2000.
US Referenced Citations (5)
Non-Patent Literature Citations (4)
Entry |
Setton et al. “Formation of ternary silicide for Ni/Ti/Si (100) and Ni/TiSi2” Journal of Materials Research 4(5), Sep./Oct. 1989, pp. 1218-1226.* |
Horache et al. “Ti/Ni bilayers on silicon: sputter-induced intermixing, rapid thermal annealing, and ternary silicide formation” Thin Solid Films 177, 1989, pp. 263-270.* |
Mo et al. “Formation and properties of ternary silicide (CoxNi1-x)Si2 thin films” Proceedings of the IEEE 1998 5th International Conference on Solid-State and Integrated Circuit Technology, 1998, pp. 271-274.* |
Lauwers et al. Comparative study of Ni-silicide and Co-silicide for sub 0.25 mm technologies, Microelectronic Engineering 50(1-4) pp. 103-106. |