Patent Application
20100263914
This disclosure relates generally to an electronic package, and in particular to an electronic package having a substrate with a plurality of floating metal elements disposed in a layer of the substrate.
In electronic packaging, trace routing on a package substrate tends to have an impact on overall circuit performance. The design of the package often requires specific spacing between different signal traces and planes for achieving a desired level of performance. The spacing constraints can often improve circuit performance, but may also negatively affect the manufacturability of the package.
In a conventional package structure, a package substrate is provided with one or more layers. To improve reliability, it is desired that each layer have a certain percentage of copper with respect to the size of the package substrate. When the required spacing between signal traces is substantial, the percentage of copper in the layer is thereby reduced and the required amount of copper is not achieved for reliability purposes. As a result, there can be reliability issues associated with the package substrate.
Package assembly can also be negatively affected by a reduced amount of copper in a layer of the package substrate. It is necessary for the package substrate to maintain a certain flatness during assembly, and when this is not achieved, the package substrate cannot be used for assembly processes such as die attachment, package solder ball/pin attachment, flip chip mold underfill, flip chip capillary underfill, and flip chip bump metallic bonding between die and package substrate during reflow.
Also, during substrate manufacturing processes, it is necessary for the design of the package to include a specific amount of copper to prevent the substrate from warping. As an example, it may be desired that each layer have at least 50% metal coverage. This can be problematic in RF packaging designs when the metal coverage in a layer may only be about 30%.
Another problem encountered in a package substrate is that the design of the package is finalized and the electrical performance of the design has been confirmed, but there is not the desired amount of copper in the layer of the package substrate. Since the design is finalized and electrical performance is confirmed, it is undesirable to change the design of the package by moving signal traces and affect the electrical performance of the overall system. However, by not increasing the metal content in the layer, the package substrate can bend, crack, and/or warp.
Therefore, it would be desirable to optimize the design of an electronic package by increasing the metal content in a layer of a package substrate without affecting the electrical performance of the overall system.
For a more complete understanding of the present disclosure, reference is now made to the following detailed description and the accompanying drawings. In an exemplary embodiment, an electronic package is provided that includes an electronic substrate and a plurality of metal elements disposed in a layer of the substrate. The plurality of metal elements do not serve an electrical function in the package. The plurality of metal elements can be arranged in a two-dimensional or three-dimensional array. Each of the plurality of metal elements can be substantially the same shape and be made of copper, aluminum, silver, or gold. Alternatively, the material of the plurality of metal elements can be the same material used for signal lines in the layer. The plurality of metal elements can minimize the effects of capacitance, inductance, and resistance in the substrate. The plurality of metal elements can be disposed in the layer of the substrate to increase the percentage of metal in that layer to achieve a threshold density, for example, 80%. In one embodiment, each of the plurality of metal elements is free from contacting another element in the layer.
In another embodiment, a method of increasing the content of metal in a layer of an electronic package is provided. The method includes identifying an area in the layer that does not include a desired amount of metal. The identified area is filled with a plurality of metal elements such that the plurality of metal elements do not serve an electrical function. The method can further include arranging each of the plurality of metal elements in an array. The plurality of metal elements can be substantially the same shape and be made of copper, aluminum, gold, or silver. Each of the plurality of metal elements is spaced apart in the layer. The method can also include choosing the shape of each of the plurality of metal elements based on the size and configuration of the identified area.
In a different embodiment, a layer in an electrical package is provided. The layer includes an area that comprises signal lines and an area with a plurality of metal elements disposed therein. The plurality of metal elements can be positioned in a pattern in the layer. The plurality of metal elements also do not serve an electrical function and each of the plurality of metal elements can be formed to have substantially the same shape.
Referring to the exemplary embodiment shown in
The substrate 102 can include a plurality of substrate layers (hereinafter “layer”). In
Since a majority of the package is formed of dielectric material, it may be desirable to increase the amount or percentage of metal in each layer. To do so, voids or open spaces between signal lines in the layer are identified and a plurality of metal elements can be formed therein. In
Referring to
Each metal element can be made of copper, aluminum, gold, silver, or any other metal used to form the signal lines 106 in the layer. Also, the plurality of metal elements can comprise any number of individual elements. The number of metal elements that fills a space can be based upon the size and shape of the space. For example, in
The plurality of metal elements can be arranged in a repeated pattern such as a two-dimensional or three-dimensional array. Again, the shape of the metal elements and the pattern of the plurality of metal elements can depend on the size and shape of the space in the layer 104. In the second space 110 of the layer 104, the plurality of metal elements 204 are circular in shape but are arranged in a rectangular, two-dimensional array to substantially fill the space 110. The third space 112 and fourth space 114 are configured by the signal lines 106 to include angled edges 116, 118. To fill the most area within each space 112 and 114, the plurality of metal elements 206, 208 that are formed in each space 112, 114, respectively, are triangular. The shape of each of the plurality of metal elements can be varied to achieve the desired level of metal content in the layer 104.
In
The size of each metal element in a plurality of metal elements can depend on the size and shape of the space in the layer. In one embodiment, for example, each metal element can be about 30 μm×30 μm or larger. Each metal element is spaced from an adjacent metal element such that no metal element within an array is in contact or couples with another metal element. In other words, each metal element is “floating” independently in the layer.
As described above, when the electrical performance of the overall system is confirmed, it is desirable that the plurality of metal elements have no significant impact on the electrical performance of the system. Each metal element has a capacitance, and by arranging the plurality of metal elements in a repeated pattern or array (i.e., series), the overall capacitance is reduced relative to a single large metal element. The effective capacitance can therefore be reduced substantially by arranging the plurality of small metal elements in an array. This aspect makes it desirable to form small individual metal elements in a repeated pattern with other metal elements.
It is also desirable to form small independent metal elements so there is very little inductance attributed to each element. Further, since the plurality of metal elements are “floating” in the layer and do not couple to any signal line, the metal elements do not contribute any resistance to the overall system. Therefore, since the plurality of metal elements contribute little to no capacitance, inductance, or resistance, there is no substantial electrical impact to the system.
However, while there is essentially no impact to the electrical performance of the overall system, the plurality of metal elements can provide mechanical benefits to the package. Since most of the package contains dielectric material, the robustness of the package can be improved by the plurality of metal elements to prevent bending or cracking. The metal elements can improve the substrate manufacturing yield, substrate stiffness, and resistance to substrate warpage. Additional benefits of adding metal elements to the substrate include improving the overall package assembly. The substrate should have a specified flatness for die attachment, flip chip bump metallic bonding between die and package substrate during reflow, flip chip capillary underfill, flip chip mold underfill, and package solder ball/pin attachment. Each of these assembly processes can be difficult to perform without a flat substrate. The metal elements also can improve the package coplanarity.
In the substrate manufacturing process, it is desirable to have a certain metal coverage in a substrate layer to resist warpage. The percentage of metal required in the layer of the package can depend on the application and/or vendor. In RF applications, for example, at least 50% metal coverage may be desired in the layer. In other packaging applications, about 80% metal coverage may be desired. In packaging designs without metal elements, for example, there may only be 20% metal coverage in a given layer. Therefore, forming these “floating” metal elements can achieve the desired amount of metal coverage for the layer in a package. The metal elements can be selected to be large enough to achieve the desired metal density of the layer, but small enough to not have a significant impact on the electrical performance of the system.
In
Once available space is identified for forming the plurality of metal elements, the type of metal element is determined. At block 1304, for example, the size, quantity, and shape of each metal element is determined. To make this determination, the size and configuration of the identified space in the layer to be filled is evaluated. Depending on the configuration of the identified space, the shape of the plurality of metal elements can be selected. If the space is configured as a diamond, for example, the diamond-shaped metal elements shown in
In addition to manufacturing considerations, the size of the plurality of metal elements is also an important consideration with regard to electrical performance impact. While it may be easier to manufacture fewer individual metal elements and a smaller quantity of metal elements having greater size may consume more area within the available space, a larger quantity of smaller metal elements can reduce the effective capacitance in the system. Since it is important that the plurality of metal elements have no substantial impact on the electrical performance of the package, the shape and size of each metal element also depends on the impact to the electrical performance of the package. Thus, there can be a size trade-off between metal content and ease of manufacture considerations versus electrical impact considerations.
Also, the plurality of metal elements that fill a given space can be formed in a repeated pattern such as a two-dimensional or three-dimensional array. Each metal element in the array can be formed of the same shape and size to reduce capacitance. The pattern can be selected based on the size and configuration of the space in the layer and the desired metal content, manufacturability, and impact on electrical performance of the package.
At block 1306, the plurality of metal elements are formed in the identified space of the layer. The plurality of metal elements can be formed by photomasking and etching the metal elements in the layer or any other known process. The process of forming the metal elements can be the same as the process for forming the signal lines in the layer and therefore no special process may be required. The metal elements can be formed at the same time as the signal lines are formed or at an alternative time. It is desirable that each metal element not contact or be coupled to another metal element or any other object in the layer. In other words, each metal element is “floating” in the layer.
The method can also include confirming that the total amount of metal added to the layer achieves the desired metal coverage for manufacturability. This may include confirming the desired metal coverage for coplanarity and warpage recommendations.
After the plurality of metal elements have been formed, the electrical package can be made ready for installation in an electronic device such as a cell phone, computer, personal digital assistant (PDA), and the like.
In
While exemplary embodiments incorporating the principles of the present invention have been disclosed hereinabove, the present invention is not limited to the disclosed embodiments. Instead, this application is intended to cover any variations, uses, or adaptations of the invention using its general principles. Further, this application is intended to cover such departures from the present disclosure as come within known or customary practice in the art to which this invention pertains and which fall within the limits of the appended claims.
