Patent Application
20210125950
The present invention, generally, relates to bumping technology, more particularly, to a method of fabricating a bump structure, the bump structure, an electronic device including the bump structure and a method of manufacturing the electronic device.
The 3D and 2.5D chip packaging is technology that enables wideband signal transmission and short wiring length and it has attracted attention for improving the performance of computer systems in the future. As the bump pitch and the bump size in the 3D and 2.5D packaging become fine in comparison with conventional flip-chip packaging, reliability issues due to stress concentration at a solder joint and its interface and electro-migration due to high current density have arisen.
IMS (Injection Molded Solder) technology is a bumping technique in which solder bumps are formed on a substrate by injecting molten solder into openings in a resist mask directly. The IMS technology has an advantage of the flexibility of solder alloy composition, which leads to improvement on the mechanical characteristics and the resistance for the electro-migration, as well as fine pitch capability.
Recent trends in the high-density interconnect have led to the use of copper pillar (or post) bumps. However, an expensive copper plating process is required to fabricate a copper pillar underneath a solder cap. There is another technology capable of fabricating a pillar bump without the use of an expensive plating process, in which a pillar is fabricated by sintering conductive particles, which are typically provided as a paste form. The sintered pillar shows good reliability when the pillar is fabricated on a contact pad that is made of the same material, i.e. the sintered copper pillar is fabricated on a copper pad.
However, when conductive material that is different from the pillar, especially aluminum, is used as the contact pads, adhesion between the pillar and the contact pad is degraded even if the surface oxide of the aluminum pads is removed before the bump formation.
Therefore, there is a need for a novel bumping technique capable of fabricating a bump structure including a set of bumps formed on a substrate, in which the bumps made by sintering conductive particles are tightly bonded to pads made of conductive material different from the conductive particles.
According to an embodiment of the present invention, a method of fabricating a bump structure is provided. The method includes preparing a substrate that includes a set of pads formed on a surface thereof, in which the pads include first conductive material. The method also includes coating a metallic adhesion layer on each pad. The method further includes forming a bump on each pad by sintering conductive particles using a mold layer, in which the conductive particles includes second conductive material different from the first conductive material.
The method according to the embodiment of the present invention enables fabrication of a bump structure including a set of bumps on a substrate, in which the bumps made by sintering the conductive particles are tightly bonded to pads of the substrate even if the pads are made of conductive material different from the conductive particles.
In a particular embodiment, the mold layer has a set of openings, each of which is aligned with one of the pads. The method includes, in forming the bump on each pad, disposing the mold layer on the substrate and filling conductive particles into the openings of the mold layer. The conductive particles filled in the openings of the mold layer are sintered to give a bump base on each pad. The method further includes filling solder material into the remaining space in each opening of the mold layer above the bump base to form a solder cap on each bump base.
In a preferable embodiment, the first conductive material includes Al and the second conductive material includes Cu. Since semiconductor devices typically use Al pads at the outermost layer, it is possible to fabricate the sintered bump base tightly bonded to the pads for practical use.
In one particular embodiment, the conductive particles are provided in a form of a paste. The bump base formed on each pad has a shape of a cup conforming to a contour of the opening of the mold layer and has a bottom bonded to the pad by the metallic adhesion layer. Thereby, it allows us to keep sufficient solder volume on the bump base even though the bump size becomes fine in comparison with a flat-topped pillar shape. Also, the bump base having the cup shape has an advantage in terms of the resistance for the electro-migration since the flow of current is dispersed in such shaped bump.
In a preferable embodiment, the method further includes applying a resist layer over the surface of the substrate. The method also includes patterning the resist layer to fabricate the mold layer. The method includes further depositing metallic adhesion material on the pads and the mold layer so as to conform to a contour of the mold layer and to provide the metallic adhesion layer coated on each pad. Since a removal process of a metallic layer underneath the resist layer after resist stripping is eliminated, undercut at the root of the bump is prevented.
In a preferable embodiment, the method includes, in filling the solder material, dissolving metallic adhesion material deposited on a top surface of the mold layer into solder material. Thereby, it allows a removal process of extra metallic adhesion material to be omitted while removing extra metallic adhesion material sufficiently. In this preferable embodiment, the metallic adhesion material may be selected from the group consisting of Cu, Ni, Au and any combination thereof. Cu, Ni and Au would be easily dissolved into the solder material such as molten solder during the filling process of the solder material.
In a preferred embodiment, the method further includes stripping the mold layer from the substrate so as to wash away the mold layer with metallic adhesion material on a top surface of the mold layer being lifted-off and washed together with the mold layer. Thereby, it allows a removal process of extra metallic adhesion material to be omitted regardless of the composition of the metallic adhesion material. Thus, it allows us to employ other functional material such as a Ti barrier as the metallic adhesion material even if the material is insolvable to the solder material such as molten solder. Also, the metallic adhesion material conforming to the contour of the mold layer would work as a sidewall barrier that prevents a short circuit between bumps due to ion migration.
In a preferred embodiment, the method includes further removing metallic adhesion material deposited on a top surface of the mold layer by a technique selected from the group consisting of chemical-mechanical polishing (CMP), mechanical polishing, fly-cutting and chemical etching. Although a removal process of extra metallic adhesion material is performed, however, the removal process of the metallic layer after the resist stripping, which would cause undercut at the root of the bump, is eliminated. It also allows us to employ other functional material such as a Ti barrier as the metallic adhesion material even if the material is insolvable to the solder material such as molten solder. Also, the metallic adhesion material conforming to the contour of the mold layer would work as a sidewall barrier that prevents a short circuit between bumps due to ion migration.
In a particular embodiment, the method further includes depositing metallic adhesion material over the surface of the substrate to have a first part corresponding to the metallic adhesion layer coated on each pad and a second part formed on an outside area of the pads. The method includes applying a resist layer on the metallic adhesion material. The method also includes patterning the resist layer to fabricate the mold layer. The method includes stripping the mold layer from the substrate, thereby leaving the bump on the substrate, in which each bump includes the solder cap and the bump base formed on the pad. The method further includes removing the second part of the metallic adhesion material exposed from the bumps. It also allows us to employ other functional material such as a Ti barrier as the metallic adhesion material even if the material is insolvable to the solder material such as molten solder. In this particular embodiment, the metallic adhesion material may be selected from the group consisting of Cu, Ti, Ni, Au and any combination thereof.
In a particular embodiment, filling the solder material includes injecting molten solder into each opening of the mold layer. In this embodiment, no electro- and electroless-plating is required to fabricate the set of the bumps, thereby avoiding an expensive pillar and solder cap fabrication process, an expensive facility and a complicated management of the plating process.
In one preferable embodiment, the method includes removing surface oxide from the pads by reverse sputtering before the coating of the metallic adhesion layer and the metallic adhesion layer is coated on each pad by sputtering. The combination of the reverse sputtering and the sputtering of the metallic adhesion layer is preferable to reduce a time interval from surface oxide removal to surface coating of the pads.
In one particular embodiment, the substrate includes a semiconductor device, the set of the pads is formed on at least an active surface of the semiconductor device. The method further includes interconnecting the semiconductor device to external circuitry with the bump, so the method is a manufacturing method of an electronic device. A high-temperature condition of sintering would contribute to the strengthening of the bonding between the sintered pillar and the pad. However, the semiconductor devices generally degrade under such a high-temperature condition. The method according to the embodiment of the present invention enables the bonding between the bump base and the pad to be enhanced without the use of high temperature condition.
According to other embodiment of the present invention, a bump structure is provided. The bump structure including a substrate including a set of pads formed on a surface thereof, in which the pads include first conductive material. The bump structure includes also a set of bumps, each of which is formed on one of the pads. Each bump includes a metallic adhesion layer formed on the pad and a bump base formed on the metallic adhesion layer. The bump base is a sintered body of conductive particles including second conductive material different from the first conductive material.
The bump structure according to the embodiment of the present invention shows good reliability even if the pads are made of conductive material different from the conductive particles since the bumps made by sintering of conductive particles are tightly bonded to pads. Also, it enables the bonding between the bump base and the pad to be enhanced without the use of a high temperature condition. Hence, it is possible to prevent a degradation of the semiconductor device due to the bumping process.
In a preferred embodiment, each bump further includes a solder cap formed on the bump base. The bump base has a shape of a cup having a bottom bonded to the pad via the metallic adhesion layer and the cup is filled with solder material of the solder cap. In a particular embodiment, the first conductive material may include Al, the second conductive material may include Cu and the metallic adhesion layer may include material selected from the group consisting of Cu, Ti, Ni, Au and combination thereof.
In a preferred embodiment, the metallic adhesion layer covers a side surface of the bump base as a sidewall barrier. Thereby, the sidewall barrier prevents a short circuit between the bumps due to ion migration.
According to further other embodiment of the present invention, an electronic device is provided. The electronic device includes a semiconductor device including a set of pads formed on an active surface thereof, in which the pads include first conductive material. The electronic device also includes a set of bumps each formed on one of the pads. Each bump includes a metallic adhesion layer formed on the pad and a bump base formed on the metallic adhesion layer and the bump base is a sintered body of conductive particles including second conductive material different from the first conductive material. The electronic device further includes circuitry interconnected to the semiconductor device through the set of the bumps.
The electronic device according to the embodiment of the present invention shows good durability since the bumps made by sintering the conductive particles are tightly bonded to pads even if the pads are made of conductive material different from the conductive particle for bump base.
In a preferable embodiment, the metallic adhesion layer covers a side surface of the bump base as a sidewall barrier. The provision of the sidewall barrier prevents a short circuit between bumps due to ion migration.
According to another embodiment of the present invention, a method of manufacturing an electronic device is provided. The method includes preparing a bumped semiconductor device. The bumped semiconductor device includes a substrate including a set of pads formed on a surface thereof, wherein the pads include first conductive material. The bumped semiconductor device also includes a set of bumps each formed on one of the pads, in which each bump includes a metallic adhesion layer formed on the pad and a bump base formed on the metallic adhesion layer and the bump base is a sintered body of conductive particles including second conductive material different from the first conductive material. The method further includes interconnecting the bumped semiconductor device to external circuitry through the set of the bumps.
The electronic device provided by the method according to the embodiment of the present invention shows good durability since the bumps made by sintering the conductive particles are tightly bonded to pads even if the pads are made of conductive material different from the conductive particle for bump base.
Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.
The subject matter, which is regarded as the invention, is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings. Note that the sizes and relative positions of elements and layers in the drawings are not necessarily drawn to scale. Some of these elements or layers are arbitrarily enlarged and positioned for improving legibility of drawing. In the drawings:
Hereinafter, the present invention will be described with respect to particular embodiments, but it will be understood by those skilled in the art that the embodiments described below are mentioned only by way of examples and are not intended to limit the scope of the present invention.
One or more embodiments according to the present invention are directed to a method of fabricating a bump structure, an associated bump structure, an associated electronic device including a bump structure, and an associated method of manufacturing an electronic device including a bump structure, in which a set of bumps tightly bonded to respective pads of a substrate is achieved.
Hereinafter, with reference to
The bump structure 100 shown in
The substrate 110 may be any substrate made of semiconductor material. In a particular embodiment, the substrate 110 is a wafer (or panel) that a plurality of electronic devices is built in. In this particular embodiment, the wafer may be separated into plural chips (or dice) finally. In other particular embodiment, the substrate 110 is a chip separated from the wafer. Both of the wafer and the chip are semiconductor devices in the described embodiment. The wafer and the chip may be made of silicon, III-V or II-VI compound semiconductor materials or other semiconductor materials. The wafer and the chip may be fabricated by any standard semiconductor process, including FEOL (Front End Of Line) and BEOL (Back End Of Line) processes. Although the substrate 110 is described to be a semiconductor device in the described embodiment, however, any other substrates such as a ceramic substrate and glass substrate, a printed circuit board may be used as the substrate 110.
The pads 112 is made of conductive material. Examples of the conductive material may generally include metals such as aluminum (Al), copper (Cu), cobalt (Co) and other metal material. Hereinafter, the case where the pad 112 is made of Al will be mainly described as an example to which the present bumping technique is applicable. The pads 112 may be located on the surface of the substrate 110 with certain pitch (e.g. 20-300 micrometers). As shown in
Although not shown in
The bump base 122 is made of conductive material, which may generally include copper (Cu), nickel (Ni) silver (Ag), gold (Au) or other metal material. Each bump base 122 is fabricated by sintering the conductive particles using a mold layer or resist layer disposed on the substrate 110. So the bump base 122 is a sintered body of conductive particles including conductive material different from that of the pad 112. Hereinafter, the case where the bump base 122 is made of copper will be mainly described as an example to which the present bumping technique is applicable. Hence, the conductive particles are copper particle and the bump base 122 is a sintered body of the copper particles.
In a preferable embodiment, copper nano-particles, copper micro-particles and their mixture are used for bump base formation. The sintered body of the conductive particles would have porous morphology. The size of particles may range from 1 nm to 15 μm.
The bump base 122 has a shape of a cup having a bottom that is bonded to the pad 112 via the metallic adhesion layer 126. The cup of the bump base 122 is filled with solder material of the solder cap 124.
The metallic adhesion layer 126 is made of metal material selected from the group consisting of Cu, Ti, Ni, Au and combination of aforementioned elements. The metallic adhesion layer 126 may include a single layer or a plurality of layers (or a stack), each of which includes an aforementioned element as a pure metal or two or more aforementioned elements as an alloy. In particular embodiments, the metallic adhesion layer 126 is a stack of Ti/Cu, a layer or a stack of Cu, Au, and/or Ni.
The solder material of the solder cap 124 may have any appropriate composition. In one or more embodiments, any of lead-free solder alloys including binary, ternary and quaternary systems of one or more elements selected from the group consisting of tin, bismuth, silver, indium, antimony, copper, zinc, nickel, aluminum, manganese and palladium, may be used as the solder material. Examples of the lead-free solder alloys may include Bi—Sn, Sn—Ag, Sn—Ag—Bi, Sn—Ag—Cu, Sn—Cu alloys, to name but a few. With the high degree of freedom regarding the composition of the solder, any composition suitable for the bumping may be selected.
Hereinafter, referring to a series of
As shown in
As shown in
Although the removal of the surface oxide and the deposition of the metallic adhesion material 128 are performed by virtually any standard means, a combination of the reverse sputtering and the sputtering of the metallic adhesion material is preferably employed to reduce a time interval from surface oxide removal to surface protection of the pads 112 when the pads 112 are formed of a metal easily and persistently oxidized such as Al. Long time interval would cause degradation of the bonding of the Al pads. Furthermore, this combination is advantageous in a viewpoint of eliminating the plating process, which is generally expensive itself, and requires expensive facility and complicated management of the plating process.
As shown in
As shown in
The resist layer 130 may be patterned by virtually any standard means including photolithography. In a particular embodiment, the step of the patterning may include sub-steps of exposing the photoresist material with a photomask 131 and developing the exposed photoresist material so as to open the openings 130a at positions aligned with the pads 112. In the embodiment shown in
The resist layer 130 may has a designed thickness that may provide an adequate height for bumping. The diameter of the opening 130a may affect the size of the bump 120 finally obtained. In one embodiment, the diameter of the opening 130a may range from 5 micrometers to 150 micrometers. Also, the space of the opening 130a may provide room to accommodate conductive material that would be filled by subsequent filling steps.
As shown in
The diameter of the conductive particles may range from 1 nm to 15 μm.
In the described embodiment, the conductive particles are provided in a form of a paste. The filling of the conductive particle (also referred to as the conductive paste) 132, hereinafter) may be done by virtually any standard means including screen-printing and injecting techniques, for example. The conductive particles may be immersed in organic solvent. The viscosity of the conductive paste 132 and the particle fraction in the conductive paste 132 may be determined in consideration of paste shrinkage, in other words, the thickness of a conductive layer to be obtained by sintering of the next step.
As shown in
The sintering is a process of forming a solid mass of material by heat and/or pressure without melting the material to the point of liquefaction. In the sintering process, the conductive paste 132 is shrunk so that the bump base 122 is formed to cover the sidewall of the opening 130a of the resist layer 130 and the surface of the pad 112 (i.e. the metallic adhesion material 128) as shown in
The bump base 122 corresponds to a metal pillar (or post). The space 136b remains on the bump base 122 reaching the upper end of the opening 130a. The bump base 122 has a cone-shaped surface as shown in
In the described embodiment, the step of filling the conductive paste 132 and the step of sintering the conductive paste 132 are performed at once, respectively. However, when the thickness of the central portion of the bump base 122 is thinner than a predetermined thickness, which may be in the range of 1 to 50 μm, for example, the conductive paste filling step and the sintering step are performed multiple times alternatingly to form one or more additional conductive layers to ensure a predetermined thickness of the bump base 122.
As shown in
As shown in
As shown in
The bump structure 100 of
The present bumping process enables fabrication of the bump structure including the set of the bumps 120 on the substrate 110, in which the bumps 120 made by sintering the conductive paste 132 are tightly bonded to the pads 112 of the substrate 110 even though the pads 112 are made of conductive material (i.e. Al in the described embodiment) different from the conductive particles for sintering (i.e. Cu in the described embodiment). Generally, semiconductor devices include Al pads at the outermost layer. Hence, it is possible to fabricate the sintered bump base 122 tightly bonded to the pads 112 for practical use.
Furthermore, since the bump base 122 is fabricated by sintering the conductive particles 132 and the solder cap 124 is fabricated by injecting molten solder, no electro- and electroless-plating processes are required to fabricate main structures of the bumps, thereby avoiding expensive pillar and solder cap fabrication process, expensive facility and complicated management of the plating process.
In the aforementioned embodiment, the removal of the extra metallic adhesion material is conducted after the resist stripping. However, in other embodiments, the removal of the metallic adhesion material may be omitted.
Hereinafter, referring to a series of
As shown in
As shown in
As shown in
As similar to the aforementioned embodiment, the combination of the reverse sputtering and the sputtering of the metallic adhesion material is preferably employed when the pad 112 is formed of a metal easily and persistently oxidized such as Al.
As shown in
As shown in
As shown in
Note that the striping step may be omitted if non-strip type resist is employed for forming the resist layer 130. Thus, the structure shown in
In the embodiment shown in
Hereinafter, referring to a series of
Note that this bumping process also includes steps described in
As shown in
As shown in
In the embodiment shown in
Hereinafter, referring to a series of
Note that this bumping process also includes the steps described in
As shown in
As shown in
In the embodiment shown in
Hereinafter, with reference to
As shown in
The bumped semiconductor chip 310 prepared at this step is fabricated by any one of the aforementioned bumping processes, followed by the dicing process if the bumping process is performed at wafer level. As already described with reference to
As shown in
As also shown in
By performing the step of mounting the bumped semiconductor chip 310 and the step of bonding the bumps 320 to the pad 352, the bumped semiconductor chip 310 is interconnected to the organic substrate 350, which includes external circuitry.
The electronic device manufactured by the aforementioned flip-chip bonding process shows good durability since the bumps 320 made by sintering the conductive particles are tightly bonded to the pads 312 even if the pads 312 are made of conductive material different from the conductive particle for bumping.
Hereinafter, with reference to a series of
As shown in
Although the related bumping process shown in
As shown in
Although expensive electroplating of the solder material may be omitted in the bumping process shown in
As shown in
Although the removal of the seed layer after the resist stripping may be omitted however, expensive electroless plating of a Ni pillar, expensive facility and complicated management of the plating process are still required.
As shown in
As shown in
As shown in
By the bumping process shown in
However, this process is limited to the case where the pads 812 and the pillar 822 are made of the same material, especially copper. As a result of intensive studies, the inventors have found that it is difficult to bond a sintered body of a conductive paste to a pad made of conductive material different from the conductive paste, e.g., bonding a sintered copper to an Al pad, under atmospheric pressure even just after removing the natural oxide film by the reverse sputtering. A high-temperature condition of the sintering is expected to contribute to strengthening of the bonding between the sintered pillar and the pad. However, the semiconductor devices generally degrade under such a high-temperature condition above temperature of typical reflow process, e.g., >300 Celsius degrees.
In contrast to the aforementioned related bumping process shown in
Also in contrast to the aforementioned related bumping processes shown in
As described above, according to one or more embodiments of the invention, a novel bumping technique capable of fabricating a bump structure including a set of bumps formed on a substrate, in which the bumps made by sintering conductive particles are tightly bonded to pads made of conductive material different from the conductive particles, is provided.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising”, when used in this specification, specify the presence of stated features, steps, layers, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, layers, elements, components and/or groups thereof.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below, if any, are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of one or more aspects of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed.
Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
