The present invention relates to a gallium nitride wafer.
Patent Document 1 (Japanese Patent Application Laid-Open No. 10-135164) describes a method of producing a semiconductor wafer by slicing a silicon semiconductor ingot. The method is as follows. Surfaces of a silicon wafer formed as above are planarized. The planarized silicon wafer is subjected to alkali etching. The etched silicon wafer is polished by a double-side polishing machine so that the front side of the silicon wafer becomes a mirror-finished surface and so that the back side is polished so as to leave irregularities for permitting discrimination between the two sides. The double-side-polished silicon wafer is then cleaned. This production method of semiconductor wafer enables efficient production of the silicon wafer, the back side of which has the irregularities for permitting discrimination between the two sides, in a uniform thickness and without any influence of the back side on the front side.
Patent Document 2 (Japanese Patent Application Laid-Open No. 2001-167993) describes a semiconductor wafer made of a GaAs, InP, InSb, InAs, or GaP semiconductor and permitting discrimination between the two sides. In a notched semiconductor wafer having a notch in its peripheral part, the surface roughness of a chamfer in the peripheral part of one surface thereof is different from that of a chamfer in the notch. The surface roughness of a chamfer in the peripheral part of the other surface is equivalent to that of the chamfer in the notch. If illuminating the notched semiconductor wafer, then the gloss at the chamfer in the peripheral part on the one surface side of the compound wafer is different from that at the chamfer in the notch, and the gloss at the chamfer in the peripheral part on the other surface side is equivalent to that at the chamfer in the notch, which enables visual discrimination between the two sides.
Patent Document 3 (Japanese Patent Application Laid-Open No. 2002-15966) describes a semiconductor wafer made of a GaAs, InP, InSb, InAs, or GaP semiconductor and permitting accurate discrimination between the two sides. The semiconductor wafer of a disk shape has a notch in a part of the outer periphery, and this notch is chamfered from the both sides in order to discriminate the crystal orientation and is formed so that an inclination angle of the chamfer of the front side is different from that of the back side.
Patent Document 4 (Japanese Patent Application Laid-Open No. 2002-222746) describes a nitride semiconductor wafer permitting easy discrimination of crystal face orientations and the like. A GaN substrate has the primary surface of (0001) plane and has an orientation flat for discriminating <1-100> equivalent directions.
Patent Document 1: Japanese Patent Application Laid-Open No. H10-135164
In Patent Document 1, the front side is discriminated from the back side by the different irregularities between the front and back sides of the silicon substrate. However, gallium nitride is transparent to visible light and, when the front side of a gallium nitride wafer is observed, reflected components of light from the front side and back side both are observed. Therefore, if the roughness of the back side is large in a ground-glass appearance even where the roughness of the front side is small in a mirror-finished appearance, the reflected component of light from the back side is also observed. Accordingly, it is not always the case that the front side can be readily discriminated from the back side by simply differentiating the roughness of the front side from that of the back side.
In Patent Document 2 and Patent Document 3, the front and back of the semiconductor wafer can be discriminated from each other in wafers made of GaAs, InP, InSb, InAs or GaP semiconductor, but, unlike these semiconductors, gallium nitride is transparent to visible light and the crystal symmetry of these semiconductors is different from that of gallium nitride.
Document 4 discloses the method for discriminating the front and back of the circular wafer by laser marking. It discloses that a character string is marked in parallel with a cleavage line by laser marking to discriminate cleavage lines. However, it is not easy to discriminate the cleavage line by use of a short character string and it is necessary to define the parallelism of the character string. Accordingly, there remains unsatisfactory accuracy of exposed patterns when semiconductor lasers are fabricated on this circular wafer. Patent Document 4 also discloses that an asymmetric notch is formed in a cleavage surface in order to discriminate the front and back of the circular wafer, and a crack may occur along the cleavage line unless adequate attention is paid to a notch forming work.
The present invention has been accomplished in view of the above-described concerns and it is an object of the invention to provide a gallium nitride wafer permitting the discrimination of the front side and back side thereof from each other.
One aspect of the present invention relates to a gallium nitride wafer of a substantially circular. This gallium nitride wafer comprises: (a) a plurality of stripe regions representing a direction of one crystal axis of <11-20> axis and <1-100> axis and extending in a direction of a predetermined axis, (b) a plurality of single crystal regions separated from each other by the stripe regions, and (c) a visible mark provided in at least one of a front side and a back side of the gallium nitride wafer. The stripe regions and the single-crystal regions appear on the front side of the gallium nitride wafer, a dislocation density of the stripe regions is larger than a dislocation density of the single crystal regions, and a crystal orientation of the stripe regions is different from a crystal orientation of the single crystal regions
In this gallium nitride wafer, the direction of the crystal axis of the wafer can be discriminated by use of the stripe regions, and the front and back of the wafer can be discriminated from each other by the mark.
In the gallium nitride wafer of the present invention, preferably, the predetermined axis makes an angle equal to or less than 0.1 degrees with reference to one crystal axis of <11-20> axis and <1-100> axis. In this gallium nitride wafer, semiconductor devices can be aligned on the wafer in association with the stripe regions, whereby the orientation of the semiconductor devices can be associated with a cleavage line with high accuracy.
In the gallium nitride wafer of the present invention, preferably, the predetermined axis makes an angle equal to or less than 0.03 degrees with reference to one crystal axis of <11-20> axis and <1-100> axis. In this gallium nitride wafer, the stripe regions can be oriented in alignment with the predetermined crystal axis with very high accuracy in fabrication of the gallium nitride wafer.
In the gallium nitride wafer of the present invention, preferably, the mark is provided on the back side of (000-1) plane of the gallium nitride wafer. This gallium nitride wafer requires no region for the mark for the front side in which semiconductor devices are to be fabricated. In the gallium nitride wafer of the present invention, preferably, the mark is provided on the front side of (0001) plane of the gallium nitride wafer.
In the gallium nitride wafer of the present invention, preferably, the front side of the gallium nitride wafer is inclined at a certain off-angle with reference to a predetermined crystal axis, and the mark is provided at a position for specifying the direction of the above inclination with reference to the predetermined crystal axis.
In this gallium nitride wafer, the direction of the off-angle of the off-angled substrate can be discriminated using the visible mark provided in either of the front side and the back side.
In the gallium nitride wafer of the present invention, preferably, the mark is formed by irradiation with a laser beam. In this gallium nitride wafer, the visible mark can be readily made with the laser beam.
Another aspect of the present invention relates to a gallium nitride wafer. The gallium nitride wafer is a gallium nitride wafer having an edge of circular arc and comprises: (a) a plurality of stripe regions representing a direction of one crystal axis of <11-20> axis and <1-100> axis and extending in a direction of a predetermined axis, (b) a plurality of single crystal regions separated from each other by the stripe regions, and (c) a cut portion provided at the edge of the gallium nitride wafer. The stripe regions and the single crystal regions appear on a front side of the gallium nitride wafer, a dislocation density of the stripe regions is larger than a dislocation density of the single-crystal regions, a crystal orientation of the stripe regions is different from a crystal orientation of the single-crystal regions, the cut portion is located at the edge within either of the following center angle range with respect to a first reference line: not: less than +10 degrees nor more than +80 degrees; and not more than −10 degrees nor less than −80 degrees, and the first reference line extends substantially parallel or substantially perpendicular to the stripe regions and passes through a center of the gallium nitride wafer.
In this gallium nitride wafer, the direction of the crystal axis of the wafer can be discriminated by the stripe regions, and the front and back of the wafer can be discriminated from each other by the cut portion.
In the gallium nitride wafer of the present invention, preferably, the cut portion has a notch shape. In this gallium nitride wafer, the notch is provided in a direction deviating from a cleavage line, and thus the gallium nitride wafer is less likely to be broken because of the notch.
In the gallium nitride wafer of the present invention, preferably, the cut portion is an orientation flat and the orientation flat extends along a second reference line intersecting with the first reference line. In this gallium nitride wafer, the orientation flat is provided in a direction deviating from a cleavage line, and thus the gallium nitride wafer is less likely to be broken because of the orientation flat.
In the gallium nitride wafer of the present invention, preferably, a length of the orientation flat is equal to or more than 5 mm. In the wafer of inch size, the orientation flat is visible.
The above object and other objects, features, and advantages of the present invention will become apparent more readily in view of the following detailed description of the preferred embodiments of the present invention with reference to the accompanying drawings.
As described above, the present invention provides the gallium nitride wafer permitting discrimination of the front side and back side thereof.
The teachings of the present invention will readily be understood in view of the following detailed description with reference to the accompanying drawings illustrated by way of example. Referring to the accompanying drawings, embodiments of a gallium nitride wafer of the present invention will be explained. When possible, parts identical to each other will be referred to with symbols identical to each other.
Part (A) of
Part (B) of
As shown in part (A) of
In this gallium nitride wafer 11 (21), the direction of the crystal axis of the wafer can be discriminated by the stripe regions 13 (23) and the front and back of the wafer 11 (21) can be discriminated from each other by use of the mark 17 (27). Semiconductor devices can be fabricated on the wafer in alignment with the predetermined crystal axis by use of the stripe regions 13 (23) and the semiconductor devices fabricated on the wafer can be separated by cleavage into a plurality of semiconductor dies. For example, in the case of a light-emitting device, such as semiconductor lasers, the active region is provided on the single crystal regions 15 (25) and oriented in the direction of the stripe regions 13 (23), and the facets are formed by cleavage as accurately oriented relative to the active region.
The gallium nitride wafers described above are fabricated, for example, as follows. Prior to formation of a thick film of gallium nitride, a mask with a predetermined pattern (e.g., stripe pattern) is provided on a GaAs substrate of a desired size (e.g., 2 inches). A thick film of gallium nitride is deposited on this substrate by HVPE method. One or more gallium nitride wafers are fabricated from the thick film of gallium nitride by slicing it.
The mark 17 can be provided in the front side 11a of the gallium nitride wafer 11, as shown part (B) in
Laser marking is performed using a carbon dioxide laser. Dots are formed on a wafer with pulsed laser beam having the peak power of 170 Watts and the pulse width of 100 μsec (irradiation power per pulse: 17 mJ). A symbol string, such as a character string for a lot number, composed of a plurality of dots for the string each having the diameter of about 110 μm can be marked. Since a lot number is expressed by a plurality of characters and this string does not have any axial: symmetry, it is available to discriminate the one side of the wafer from the other, i.e. the front or back, on which the mark is formed even if the wafer is made of gallium nitride transparent to visible light.
As described above, the first embodiment provides the gallium nitride wafer permitting discrimination between the two sides of the wafer of gallium nitride transparent to visible light.
Part (A) of
With reference to part (A) of
In the present embodiment the cut portion 37 is formed in the segment Angle1.
In this gallium nitride wafer 31, the direction of the crystal axis of the wafer 31 can be discriminated by the stripe regions 33, and the front and back of the wafer can be discriminated by the cut portion 37.
Part (B) of
As described above, the second embodiment provides the gallium nitride wafer permitting discrimination between the two sides of the wafer of gallium nitride transparent to visible light.
Part (A) of
As described above, the third embodiment provides the gallium nitride wafer permitting discrimination between the two sides of the wafer of gallium nitride transparent to the visible light.
Part (A) of
An axis “COFF” indicates a direction of a normal to the front side 51a of the gallium nitride wafer 51. An angle “AngleOFF” is made between the axis “COFF” and the crystal axis “C0.” The front side 51a of the gallium nitride wafer 51 is inclined at an off-angle with respect to the predetermined crystal axis “C0.” This off-angle “AngleOFF” is, for example, in the range of approximately 0.05 degrees to 1.0 degree. A dashed line “PC0” indicates a plane perpendicular to the crystal axis “C0” (imaginary plane corresponding to the crystal axis “C0”).
The mark 57 is provided at a position where the mark 57 can specify this inclination direction for the front side 51a with reference to the predetermined crystal axis “C0.” In the present embodiment the mark 57 intersects with a plane defined by the axis “COFF” and the crystal axis “C0,” but the position of the mark 57 does not have to be limited to this specific example, and the mark 57 may be provided at the position of 90 degrees clockwise or counterclockwise rotation with reference to the inclination direction, for example. In a preferred example, the crystal axis “C0” is selected as the c-axis. The axis COFF is inclined at an angle in the range of AngleOFF=0.05 degrees to 1.0 degree with reference to the crystal axis “C0v.” The mark 57 indicates the direction in which the front side 51a of the gallium nitride wafer 51 is inclined with reference to the c-plane of gallium nitride. This permits the discrimination of the inclination direction of c-axis of the gallium nitride wafer.
In general, in order to control steps and defects of atomic level in the front side of the substrate during epitaxial growth on the substrate, an off-angled substrate whose principal surface is slightly inclined from a predetermined crystal orientation may be used. For example, where the primary surface of a gallium nitride wafer is slightly inclined from the (0001) plane in a direction of: a specific crystal plane, it may be impossible to discriminate the direction of the specific crystal plane in the gallium nitride wafer. Since the gallium nitride wafer of the present embodiment is provided with the mark at the specific position on the primary surface, the direction of the slight inclination can be specified thereby. Of course, it is also possible similarly to provide the mark at a specific position on the primary surface from the (000-1) plane.
Since a gallium nitride wafer is expensive, there are desires for a larger-size wafer from which much more semiconductor dies can be produced. Since gallium nitride is a highly brittle material, if a flat or the like is formed in the peripheral part of the wafer, a crack is likely to run vertically from that portion by virtue of heat, mechanical shock, or the like introduced in a subsequent process. Therefore, a substrate of circular shape is required for GaN. On the other hand, a flat has been used heretofore in order to achieve the discrimination of the cleavage surface and the discrimination between the two sides. The first and second embodiments of the present invention enable the identification of the cleavage surface and the discrimination between the two sides in the wafers of a substantially circular shape. Although the wafer of the third embodiment does not have a perfect circle shape, it permits the identification of the cleavage surface and the discrimination between the two sides even with only one flat formed in the outer periphery. A small number of flats in the outer periphery does not reduce an area of the primary surface for forming semiconductor devices.
Having described and illustrated the principle of the invention in a preferred embodiment thereof, it is appreciated by those having skill in the art that the invention can be modified in arrangement and detail without departing from such principles. Details of structures of these devices can be modified as necessary. The present invention is not limited to the specific examples disclosed in the embodiments. We therefore claim all modifications and variations coming within the spirit and scope of the following claims.
Number | Date | Country | Kind |
---|---|---|---|
P2004-211749 | Jul 2005 | JP | national |
This application is the U.S. National Phase under 35 U.S.C. § 371 of International Application No. PCT/JP2006/305253, filed on Mar. 16, 2006, which in turn claims the benefit of Japanese Application No. 2005-211749, filed on Jul. 21, 2005, the disclosures of which Applications are incorporated by reference herein.
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/JP2006/305253 | 3/16/2006 | WO | 00 | 12/10/2007 |