Claims
- 1. A field effect transistor device structure comprising
- a. a silicon substrate of first conductivity type having a planar surface,
- b. diffusion regions of second conductivity type in said substrate surface, serving as an FET source and drain, having proximate edges separated by a channel region,
- c. a recess in said substrate surface within said diffusion regions forming a mesa having a height above the bottom of said recess, containing said channel region,
- d. a silicon dioxide gate insulator layer on the top surface and having a portion extending over the edges of said mesa,
- e. a dual thickness silicon dioxide insulator layer formed over said recess having a first, relatively thick region covering a first portion said recess having a thickness approximately thirteen times said height of said mesa, and a second, relatively thin protective extension region extending from said first region to cover a second portion of said recess and to cover said portion of said gate insulator layer extending over said edges of said mesa,
- f. a field effect transistor gate electrode overlying said gate insulator layer and said protective extension of said silicon dioxide insulator layer,
- g. source and drain electrodes connected respectively to said diffusion regions.
Parent Case Info
This is a continuation of Ser. No. 579,102, filed May 20, 1975, now abandoned, which was a division of Ser. No. 411,518, filed Oct. 31, 1973, now U.S. Pat. No. 3,899,372.
US Referenced Citations (3)
Divisions (1)
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Number |
Date |
Country |
Parent |
411518 |
Oct 1973 |
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Continuations (1)
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Number |
Date |
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579102 |
May 1975 |
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