Patent Application
20170164818
1. Technical Field
The disclosure relates to an imaging unit disposed on a distal end of an insertion section of an endoscope that is configured to be inserted into a subject to image an inside of the subject. The disclosure also relates to an imaging module and an endoscope system.
2. Related Art
Conventionally, in the medical field and the industrial field, endoscope apparatuses have been widely used for various examinations. Among these endoscope apparatuses, a medical endoscope apparatus is capable of acquiring an in-vivo image inside the body cavity without making an incision on a subject such as a patient by inserting an elongated and flexible insertion section including an image sensor disposed on the distal end thereof into the body cavity of the subject and further capable of performing a therapeutic treatment by allowing a treatment tool to project from the distal end of the insertion section as needed, and thus widely used.
An imaging unit which includes an image sensor and a circuit board on which electronic components such as a capacitor and an IC chip which constitute a drive circuit for the image sensor are mounted is inserted in the distal end of the insertion section of such an endoscope apparatus, and a signal cable is soldered to the circuit board of the imaging unit.
In recent years, there has been proposed an imaging unit that achieves a three-dimensional structure of a circuit board connected to an image sensor for the purpose of simplifying a signal line connecting operation in a cable, improving the reliability of a connected part, or reducing the size (See JP 2005-278760 A, JP 2006-223624 A, JP 2000-199863 A, JP 2013-197501 A, and JP 2014-110847 A, for example).
In some embodiments, an imaging unit includes: a semiconductor package having an image sensor and having a first connection electrode on a back face of the semiconductor package; a first multi-layer substrate having a plurality of layered substrates and having second and third connection electrodes respectively on a front face and on a back face of the first multi-layer substrate, the second connection electrode on the front face being configured to be electrically and mechanically connected to the first connection electrode of the semiconductor package; a second multi-layer substrate having a plurality of layered substrates, the second multi-layer substrate being configured to be electrically and mechanically connected to the back face of the first multi-layer substrate such that a layer direction of the second multi-layer substrate is perpendicular to a layer direction of the first multi-layer substrate; an electronic component mounted inside the first multi-layer substrate; and a plurality of cables configured to be electrically and mechanically connected to the second multi-layer substrate. The second multi-layer substrate is connected to the back face of the first multi-layer substrate to form a T shape. The first multi-layer substrate and the second multi-layer substrate lie within a projected plane in an optical axis direction of the semiconductor package.
In some embodiments, an imaging module includes: a semiconductor package having an image sensor and having a first connection electrode on a back face of the semiconductor package; a first multi-layer substrate having a plurality of layered substrates and having second and third connection electrodes respectively on a front face and on a back face of the first multi-layer substrate, the second connection electrode on the front face being configured to be electrically and mechanically connected to the first connection electrode of the semiconductor package; a second multi-layer substrate having a plurality of layered substrates, the second multi-layer substrate being configured to be electrically and mechanically connected to the back face of the first multi-layer substrate such that a layer direction of the second multi-layer substrate is perpendicular to a layer direction of the first multi-layer substrate; and an electronic component mounted inside the first multi-layer substrate. The second multi-layer substrate is connected to the back face of the first multi-layer substrate to form a T shape. The first multi-layer substrate and the second multi-layer substrate lie within a projected plane in an optical axis direction of the semiconductor package.
In some embodiments, an endoscope system includes an insertion section having the imaging unit disposed on a distal end of the insertion section.
The above and other features, advantages and technical and industrial significance of this invention will be better understood by reading the following detailed description of presently preferred embodiments of the invention, when considered in connection with the accompanying drawings.
An endoscope system having an imaging unit will be described below as modes for carrying out the present invention (hereinafter, referred to as “embodiment(s)”). The invention is not limited to the embodiments. The same reference signs are used to designate the same elements throughout the drawings. It is to be noted that the drawings are schematic drawings, and the relationship between the thickness and the width in each member and the ratio of each member are different from the actual relationship and ratio. The dimension and the ratio may partially differ from each other also between the drawings.
The endoscope 2 includes an insertion section 6 which is configured to be inserted into a subject, an operating unit 7 which is located at the proximal end side of the insertion section 6 and is configured to be grasped by an operator, and a flexible universal cord 8 which extends from the operating unit 7.
The insertion section 6 is achieved using, for example, an illumination fiber (light guide cable), an electric cable, and an optical fiber. The insertion section 6 includes a distal end part 6a which has a built-in imaging unit (described below), a bendable part 6b which includes a plurality of bending pieces so as to be freely bendable, and a flexible tube part 6c which is disposed at the proximal end side of the bendable part 6b. The distal end part 6a is provided with an illumination unit which illuminates the inside of a subject through an illumination lens, an observation unit which images the inside of a subject, an opening with which a treatment tool channel communicates, and an air/water feeding nozzle (not illustrated).
The operating unit 7 includes a bending knob 7a which bends the bendable part 6b in up-down and right-left directions, a treatment tool insertion part 7b from which a treatment tool such as a biopsy forceps or a laser scalpel is inserted into the body cavity of a subject, and a plurality of switches 7c for operating peripheral devices including the information processing device 3, the light source device 4, an air feeding device, a water feeding device, and a gas feeding device. A treatment tool inserted from the treatment tool insertion part 7b passes through the treatment tool channel formed inside thereof and is exposed from the opening formed on the distal end of the insertion section 6.
The universal cord 8 is configured using, for example, an illumination fiber, an electric cable, and an optical fiber. The universal cord 8 is branched at the proximal end thereof, and includes a connector 8a on one end of the branched part and a connector 8b on the other proximal end thereof. The connector 8a is freely attachable to and detachable from a connector of the information processing device 3. The connector 8b is freely attachable to and detachable from the light source device 4. The universal cord 8 transmits illumination light emitted from the light source device 4 to the distal end part 6a through the connector 8b and the illumination fiber. Further, the universal cord 8 transmits an image signal captured by the imaging unit (described below) to the information processing device 3 through the cable and the connector 8a.
The information processing device 3 performs predetermined image processing on an image signal output from the connector 8a and controls the entire endoscope system 1.
The light source device 4 is configured using, for example, a light source which emits light and a condenser lens. The light source device 4 emits light from the light source and supplies the emitted light to the endoscope 2 which is connected through the connector 8b and the illumination fiber of the universal cord 8 as illumination light to the inside of a subject under the control of the information processing device 3.
The display device 5 is configured using, for example, a display using a liquid crystal or an organic electro luminescence (EL). The display device 5 displays various kinds of information including an image on which predetermined image processing has been performed by the information processing device 3 through a video cable 5a. Accordingly, an operator can perform observation and property determination for a desired position inside a subject by operating the endoscope 2 while checking an image (in-vivo image) displayed on the display device 5.
Next, the imaging unit used in the endoscope system 1 will be described in detail.
An imaging unit 10 has a semiconductor package 20 which includes an image sensor and a connection electrode 21 formed on the back face thereof, a first multi-layer substrate 30 which has a plate shape and includes a connection electrode 31 formed on the front face thereof and a connection electrode 33 formed on the back face thereof, the connection electrode 31 on the front face being electrically and mechanically connected to the connection electrode 21 of the semiconductor package 20, a second multi-layer substrate 40 which has a plate shape and is electrically and mechanically connected to the back face of the first multi-layer substrate 30 with a layer direction of the second multi-layer substrate 40 perpendicular to a layer direction of the first multi-layer substrate 30, an electronic component 51 mounted inside the first multi-layer substrate 30, and a plurality of cables 60 configured to be electrically and mechanically connected to the second multi-layer substrate 40.
The image sensor of the semiconductor package 20 includes, for example, a CMOS, and a light receiver which receives light condensed by a lens unit is disposed on a face f1 as the front face. The light receiver is connected to the connection electrode 21 formed on a face f2 as the back face. A bump 22 which includes, for example, a solder is formed on the connection electrode 21. The semiconductor package 20 is preferably a chip size package (CSP) that is formed by performing wiring, electrode forming, resin sealing, and dicing on an image sensor chip in a wafer state so that the image sensor chip finally has a size equal to the size of the semiconductor package.
The first multi-layer substrate 30 has a plate shape in which a plurality of substrates having wiring is layered (a plurality of substrates parallel to a face f3 and a face f4 is layered). For example, a ceramic substrate, a glass epoxy substrate, a glass substrate, or a silicon substrate is used as each of the layered substrates. A plurality of electronic components 51 is built inside the first multi-layer substrate 30, and a plurality of vias 32 for electrically connecting the wiring on the layered substrates is formed inside the first multi-layer substrate 30. As illustrated in
The connection electrode 31 is formed on the face f3 of the first multi-layer substrate 30, and electrically and mechanically connected to the connection electrode 21 of the semiconductor package 20 through the bump 22. A connection part between the connection electrode 31 and the connection electrode 21 is sealed with a sealing resin 23. The connection electrode 33 is formed on the face f4 of the first multi-layer substrate 30 and connected to the connection electrode 31 through the via 32.
The electronic components 51 inside the first multi-layer substrate 30 are mounted in an electronic component arrangement region 36 in substrate layers of the first multi-layer substrate 30. The electronic component arrangement region 36 is sectioned so as to be adjacent to a via arrangement region 35 in which the vias 32 are arranged. The electronic components 51 and the vias 32 can be efficiently arranged within a limited space by sectioning the electronic component arrangement region 36 and the via arrangement region 35 so as to be adjacent to each other.
The second multi-layer substrate 40 has a plate shape in which a plurality of substrates having wiring is layered (a plurality of substrates parallel to a face f5 and a face f6 is layered) similarly to the first multi-layer substrate 30. For example, a ceramic substrate, a glass epoxy substrate, a glass substrate, or a silicon substrate is used as each of the layered substrates. The second multi-layer substrate 40 is electrically and mechanically connected to the first multi-layer substrate 30 with the layer direction of the second multi-layer substrate 40 perpendicular to the layer direction of the first multi-layer substrate 30. The first multi-layer substrate 30 and the second multi-layer substrate 40 are connected to form a T shape. The face f4 which is the back face of the first multi-layer substrate 30 is equally divided into two parts by the second multi-layer substrate 40.
A connection electrode 41 is formed on one end of the second multi-layer substrate 40 and connected to the connection electrode 33 of the first multi-layer substrate 30 with a solder 34. The connection between the first multi-layer substrate 30 and the second multi-layer substrate 40 is performed in such a manner that an adhesive is applied to a predetermined position of the first multi-layer substrate 30, the second multi-layer substrate 40 is then placed and temporarily fixed, and the connection electrode 33 and the connection electrode 41 are then connected with the solder 34.
A cable connecting electrode 42 for connecting the plurality of cables 60 is formed on the other end of the second multi-layer substrate 40. In each of the cables 60, an insulating outer sheath 62 on one end is peeled, and an exposed conductor 61 is connected to the cable connecting electrode 42 with a solder 43.
In the first embodiment, the electronic components 51 are built into the first multi-layer substrate 30 which is directly connected to the semiconductor package 20. Thus, it is possible to reduce the distance between the electronic components 51 and the image sensor inside the semiconductor package 20, that is, reduce the wiring length to reduce noise. Further, since the electronic components 51 are mounted in the first multi-layer substrate 30, wiring reduction is achieved compared to the case in which the electronic components 51 are mounted in the second multi-layer substrate 40. Accordingly, the entire length of the imaging unit can be reduced.
In the first embodiment, the first multi-layer substrate 30, the second multi-layer substrate 40, and the plurality of cables 60 lie within a projected plane in an optical axis direction of the semiconductor package 20. It is therefore possible to achieve a reduced diameter of the imaging unit 10.
First Modification of First Embodiment
In an imaging unit according to a first modification of the first embodiment, the second multi-layer substrate 40 is connected to the back face of the first multi-layer substrate 30 at a position shifted from the center thereof.
In an imaging unit 10A according to the first modification of the first embodiment, as illustrated in
When the second multi-layer substrate 40 is connected to the center of the first multi-layer substrate 30 so as to equally divide the back face of the first multi-layer substrate 30 into two parts and the cables 63 to 66 having different outer diameters are connected in any manner, the outer diameter of the imaging unit 10A may be increased. In the first modification of the first embodiment, the second multi-layer substrate 40 is connected to the back face of the first multi-layer substrate 30 at the position shifted from the center thereof so as to divide the projected plane in the optical axis direction of the image sensor into a wide projected plane and a narrow projected plane by the second multi-layer substrate 40, and the cables 63 and 64 having a large outer diameter are connected to a face (the face f5) corresponding to the wide projected plane and the cables 65 and 66 having a small outer diameter are connected to a face (the face f6) corresponding to the narrow projected plane. Accordingly, even when the cables 63 and 64 having a large outer diameter are used, it is possible to allow the first multi-layer substrate 30, the second multi-layer substrate 40, and the cables 63 and 64 to lie within the projected plane in the optical axis direction of the image sensor, thereby to achieve the reduced diameter of the imaging unit 10A.
Further, in the first modification of the first embodiment, the cables 63 to 66 are connected to the second multi-layer substrate 40 at different positions along the optical axis direction. On the face f5 of the second multi-layer substrate 40, the cable 64 is connected at a position closer to the first multi-layer substrate 30, and the cable 63 is connected at the proximal end side. On the face f6, the cable 66 is connected at a position closer to the first multi-layer substrate 30, and the cable 65 is connected at the proximal end side. The cable 64 which is connected at the position closer to the first multi-layer substrate 30 transmits an electric signal to the semiconductor package 20 through the electronic component 51 mounted inside the first multi-layer substrate 30. The electric signal is transmitted from the cable 64 to the semiconductor package 20 as indicated by a solid line in
Second Modification of First Embodiment
In an imaging unit according to a second modification of the first embodiment, the second multi-layer substrate 40 is connected to the first multi-layer substrate 30 with the second multi-layer substrate 40 inclined with respect to the horizontal direction.
In an imaging unit 10B according to the second modification of the first embodiment, as illustrated in
When the second multi-layer substrate 40 is connected to the center of the first multi-layer substrate 30 so as to equally divide the back face of the first multi-layer substrate 30 into two parts and the cables 63 and 65 having different outer diameters are connected in any manner, the outer diameter of the imaging unit 10B may be increased. In the second modification of the first embodiment, the second multi-layer substrate 40 is connected to the first multi-layer substrate 30 with the second multi-layer substrate 40 inclined with respect to the horizontal direction, and the cables 63 having a large outer diameter are arranged near a corner a1 and a corner a2. Accordingly, even when the cables 63 having a large outer diameter are used, it is possible to allow the first multi-layer substrate 30, the second multi-layer substrate 40, and the cables 63 and 65 to lie within the projected plane in the optical axis direction of the image sensor, thereby to achieve the reduced diameter of the imaging unit 10B.
In an imaging unit according to a second embodiment, vias are arranged along the outer periphery of a first multi-layer substrate.
In an imaging unit 100 according to the second embodiment, as illustrated in
More electronic components 51 can be mounted and more vias 32C can be arranged in the first multi-layer substrate 30C by arranging the electronic component arrangement region 36 in the central part of the first multi-layer substrate 30C and by arranging the via arrangement region 35 along the outer periphery which surrounds the electronic component arrangement region 36.
First Modification of Second Embodiment
In an imaging unit according to a first modification of the second embodiment, some of the cables are connected to the vias of the first multi-layer substrate.
In an imaging unit 10D according to the first modification of the second embodiment, as illustrated in
In the first modification of the second embodiment, the cable 65 having a small outer diameter is connected to the via 32C, and the first multi-layer substrate 30C, the second multi-layer substrate 40, and the cables 63 and 65 lie within the projected plane in the optical axis direction of the semiconductor package 20. Thus, it is possible to achieve the reduced diameter of the imaging unit 10D.
In an imaging unit according to a third embodiment, a recess is formed on the back face of a first multi-layer substrate to which a second multi-layer substrate is connected.
In an imaging unit 10E according to the third embodiment, as illustrated in
An electronic component 51 which is built into the first multi-layer substrate 30E is arranged at a position different from the position of the recess 37. In the third embodiment, the electronic component 51 is mounted on the same layer as the recess 37 in the first multi-layer substrate 30E. Thus, the electronic component 51 is mounted at a position shifted from the position of the recess 37. When the electronic component 51 is mounted on a layer different from the layer of the recess 37, the position of the electronic component 51 and the position of the recess 37 may overlap each other. However, in order to reduce the length in the optical axis direction of the first multi-layer substrate 30E, the electronic component 51 and the recess 37 are preferably arranged at different positions on the same layer.
According to some embodiments, an electronic component is mounted inside a first multi-layer substrate adjacent to a semiconductor package. With this structure, it is possible to achieve a reduced diameter and to prevent low image quality caused by generation of noise.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015-000496 | Jan 2015 | JP | national |
This application is a continuation of PCT international application Ser. No. PCT/JP2015/080527, filed on Oct. 29, 2015 which designates the United States, incorporated herein by reference, and which claims the benefit of priority from Japanese Patent Application No. 2015-000496, filed on Jan. 5, 2015, incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2015/080527 | Oct 2015 | US |
| Child | 15442768 | US |
