A portion of the disclosure of this patent document (including its incorporated documents) contains material which is subject to mask work protection, *M*, PDF Solutions, Inc. The mask work owner (PDF Solutions, Inc.) has no objection to the facsimile reproduction by anyone of the patent document (including its incorporated documents) or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all mask work rights whatsoever.
This invention relates generally to improved processes for manufacturing semiconductor wafers and chips through use of in-line measurements obtained via non-contact electrical measurements (“NCEM”), to on-chip structures configured to provide useful information via NCEM, and to implementation of NCEM structures in library compatible fill cells.
U.S. Pat. No. 5,008,727 (“Standard cell having test pad for probing and semiconductor integrated circuit device containing the standard cells”) to Katsura et al., incorporated by reference herein, discloses placement of a testing pad in a standard cell.
U.S. Pat. No. 6,091,249 A (“Method and apparatus for detecting defects in wafers”) to Graham et al., incorporated by reference herein, discloses structures and methods for testing certain defects using a non-contact (“NC”) technique.
U.S. Pat. No. 6,452,412 B1 (“Drop-in test structure and methodology for characterizing an integrated circuit process flow and topography”) to Jarvis et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 6,949,765 B2 (“Padless structure design for easy identification of bridging defects in lines by passive voltage contrast”) to Song et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 7,101,722 B1 (“In-line voltage contrast determination of tunnel oxide weakness in integrated circuit technology development”) to Wang et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 7,105,436 B2 (“Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing”) to Zhao et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 7,518,190 B2 (“Grounding front-end-of-line structures on a 501 substrate”) to Cote et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 7,930,660 B2 (“Measurement structure in a standard cell for controlling process parameters during manufacturing of an integrated circuit”), to Ruderer et al., incorporated by reference herein, describes the use of test structures in fill cells for manufacturing optimization.
U.S. Pat. No. 7,939,348 B2 (“E-beam inspection structure for leakage analysis”), to Seng et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 8,039,837 B2 (“In-line voltage contrast detection of PFET silicide encroachment”) to Patterson et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 8,339,449 B2 (“Defect monitoring in semiconductor device fabrication”), to Fong et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 8,399,266 B2 (“Test structure for detection of gap in conductive layer of multilayer gate stack”) to Mo et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 8,421,009 B2 (“Test structure for charged particle beam inspection and method for defect determination using the same”) to Xiao, incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Pat. No. 8,575,955 B1 (“Apparatus and method for electrical detection and localization of shorts in metal interconnect lines”) to Brozek, incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
U.S. Patent Publication 20090102501 A1 (“Test structures for e-beam testing of systematic and random defects in integrated circuits”) to Guldi et al., incorporated by reference herein, discloses structures and methods for testing certain defects using an NC technique.
The invention generally involves the placement of NC-testable structures, and DOEs (Designs of Experiments) based on such structures, preferably within the “fill cells” typically used in standard cell logic regions. As used in this application, “fill cells” (or “filler cells”) refer to cells configured for placement in standard cell rows, but not configured to perform any logical or information storage function(s). Modern, standard-cell layouts commonly use such fill cells to relieve routing congestion. See, e.g., Cong, J., et al. “Optimizing routability in large-scale mixed-size placement,” ASP-DAC, 2013; and Menezes, C., et al. “Design of regular layouts to improve predictability,” Proceedings of the 6th IEEE International Caribbean Conference on Devices, Circuits and Systems, 2006. See also U.S. Pat. No. 8,504,969 (“Filler Cells for Design Optimization in a Place-and-Route System”) to Lin et al., incorporated by reference herein. As used herein “fill cells” may include structures designed to perform ancillary (i.e., not logical or storage) functions, for example, well ties and/or decoupling capacitors.
One NC measurement technique, useful in connection with certain embodiments of the invention, involves measuring or inspecting the surface of a partially processed wafer (in-line) with a scanning electron microscope (“SEM”) or other charged particle-based scanning/imaging device. As the measuring/inspecting proceeds, the SEM (or other device) induces charge on all electrically floating elements, whereas any grounded elements remain at zero potential. This voltage contrast becomes visible to the scanning/imaging device as a NCEM.
This NC measurement technique, commonly known as “voltage contrast inspection,” has been used in the semiconductor industry for many years, see, e.g., U.S. Pat. No. 6,344,750 B1 (“Voltage contrast method for semiconductor inspection using low voltage particle beam”), and exists in many different flavors—as demonstrated by the dozens of subsequent patents that cite the '750 patent as prior art.
U.S. patent application Ser. No. 14/612,841 (“Opportunistic placement of IC test structures and/or e-beam target pads in areas otherwise used for filler cells, tap cells, decap cells, scribe lines, and/or dummy fill, as well as product IC chips containing same”), filed Feb. 3, 2015, by inventors De et al., incorporated by reference herein, and owned by the assignee of the present application, discloses a number of highly efficient—and herein preferred—methods for obtaining NCEMs from the NCEM-enabled test structures utilized in the present invention. While these '841 methods represent the applicant's preferred NC measurement methods, it is applicant's intent that usage of the terms “NC measurement” or “NCEM” in this application should not be limited to these preferred methods in the absence of specific language (e.g., “selectively targeting . . . ”, “ . . . fewer than 10 pixels”) that indicates an intent to so limit a claim.
In general usage, the term Design of Experiments (DOE) or Experimental Design refers to the design of any information-gathering exercise where variation is present, whether under the full control of the experimenter or not.
Experimental Design is an established field, well known to persons skilled in the art. See NIST/SEMATECH e-Handbook of Statistical Methods, http://www.itl.nist.gov/div898/handbook/, updated Oct. 30, 2013, incorporated by reference herein.
As will be apparent to the skilled reader, the typical DOE herein relates to an experiment involving one or more semiconductor die(s) and/or wafer(s), wherein said one or more die(s) and/or wafer(s) contain multiple instances of a substantially similar test structure, at least some of which vary in terms of one or more layout-related parameters (including, but not limited to, size, spacing, offset, overlap, width, extension, run length, periodicity, density, neighborhood patterning, including underlayers) or process related parameters (including, but not limited to, dose, rate, exposure, processing time, temperature, or any tool-specifiable setting). As the person skilled in the art knows, the selection of specific parameter(s) to vary, the amount/distribution of their variation, and the number and location of test structures that express such variation will be selected based upon the goals of the experiment, the involved process, and the availability of appropriate places (e.g., fill cell locations, tap cell locations, decap cell locations, scribe line areas, etc.) to instantiate the test structures.
Preferred embodiments of the invention utilize DOEs constructed from NCEM-enabled fill cells. In accordance with certain preferred embodiments of the invention, NCEM-enabled fill cells all have some common elements (e.g., height, supply rail configuration, and gate patterning that is consistent with standard cells in the library), then vary according to the measurement type (e.g., short, open, leakage, or resistance), layer(s) involved, and/or structure(s) to be evaluated/tested. Such NCEM-enabled fill cells also generally include a pad, configured to accelerate targeted NC evaluation by, for example, determining an associated NCEM from a small number of enlarged pixels (e.g., 10 or fewer), or without creating any image at all. Such pads can be formed from a variety of low-resistance materials and configured in a variety of shapes.
In certain preferred embodiments, such NCEM-enabled fill cells may additionally include two or more mask-patterned features that define a rectangular test area, such test area being characterized by two parameters (e.g., X/Y or r/θ dimensions). Additionally, for such NCEM-enabled fill cells, an expanded test area surrounds the cell's test area, the expanded test area being defined by a predetermined expansion of each boundary of the test area, or by predetermined proportionate expansion of the test area's area. Alternatively, in the case of cells designed to measure or characterize inter-layer effects, such test areas may be characterized as “test volumes,” with one or more additional parameter(s) characterizing the layers of the defining, mask-patterned features.
For fill cells designed to measure, detect, or characterize electrical short circuit behavior (so-called, “short-configured, NCEM-enabled fill cells”), the test area may represent an intended gap between two pattern-defined features that, in the absence of a manufacturing anomaly, would be electrically isolated. Alternatively, in such short-configured, NCEM-enabled fill cells, the test area may represent an overlap between two pattern-defined features that, in the absence of a manufacturing anomaly, would be electrically isolated. A single short-configured, NCEM-enabled fill cell may contain one or multiple test areas. In the case of a NCEM-enabled fill cell with multiple test areas, each of the cell's test areas is preferably wired in parallel, and each of the cell's test areas (and preferably each of its extended test areas, too) is identically or nearly identically configured.
Fill cells designed to measure, detect, or characterize electrical leakage behavior (so-called, “leakage-configured, NCEM-enabled fill cells”) typically resemble short-configured cells. Like the short-configured cells, such leakage-configured cells may include a test area that represents an intended gap between two pattern-defined features that, in ideality, should be electrically isolated, but in reality, inevitably exhibit some amount of leakage. Alternatively, in such leakage-configured, NCEM-enabled fill cells, the test area may represent an overlap between two pattern-defined features that, in ideality, would be electrically isolated, but in reality, inevitably exhibit some amount of leakage. A single leakage-configured, NCEM-enabled fill cell may contain one, but preferably contains multiple test areas. In the case of a cell with multiple test areas, each of the cell's test areas is preferably wired in parallel, and each of the cell's test areas (and preferably each of its extended test areas, too) is identically or nearly identically configured.
For fill cells designed to measure, detect, or characterize electrical open circuit behavior (so-called, “open-configured, NCEM-enabled fill cells”), the test area typically represents an intended overlap, or extension, between two pattern-defined features that, in the absence of a manufacturing anomaly, would be electrically connected. (It may also represent a single-layer pattern, such as a snake.) A single open-configured, NCEM-enabled fill cell may contain one or multiple test areas. In the case of multiple test areas, each of the cell's test areas is preferably connected in series, and each of the cell's test areas (and preferably each of the extended test areas, too) is identically or nearly identically configured.
Fill cells designed to measure, detect, or characterize electrical resistance behavior (so-called, “resistance-configured, NCEM-enabled fill cells”) typically resemble open-configured cells. Like the open-configured cells, such resistance-configured cells may include a test area that represents an intended overlap, or extension, between two pattern-defined features that, in ideality, would be connected by a nearly zero-resistance path, but in reality, inevitably produce a measurable level of resistance. (Such test area may also represent a single-layer pattern, such as a snake.) A single resistance-configured, NCEM-enabled fill cell may contain one, but preferably contains multiple test areas. In the case of multiple test areas, each of the cell's test areas is preferably connected in series, and each of the cell's test areas (and preferably each of the extended test areas, too) is identically or nearly identically configured.
DOEs, in accordance with such preferred embodiments, comprise a collection of substantially similarly configured NCEM-enabled fill cells, in a plurality of variants. Within a given DOE, such similarly configured fill cells would typically all be configured to measure, detect, or characterize the same behavior (e.g., gate-to-gate, or control-element-to-control-element, shorts, for example), in the same structural configuration (e.g., tip-to-tip, as per
In the case of DOEs involving complex changes to nearby patterning, changes that lie within an expanded test area (an area that encompasses a predetermined expansion of the test area by, for example 50-200%, or more) and involve either the test area-defining layer(s) or any layers that overlap or lie immediately above or below the test area-defining layers, are preferably limited in number. Limiting the number of such changes to fewer than three, five, ten, twenty, or thirty “background pattern variants” facilitates analysis of data that the experiment produces.
Another way to characterize the degree of relevant patterning variation between DOE variants—in certain embodiments of the invention—involves the concept of a pattern similarity ratio (“PSR”), whose computation is pictorially depicted in
Another aspect of DOEs, in accordance with the preferred embodiments, is that they include multiple instances (e.g., 3, 5, 10, 20, 500, 100, 200, or 500+) of each NCEM-enabled fill cell variant. Furthermore, such variants are preferably distributed, either regularly or irregularly, throughout the space available for instantiation of fill cells.
Accordingly, generally speaking, and without intending to be limiting, one aspect of the invention relates to ICs that include, for example: a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; wherein the integrated circuit includes at least a first DOE, the first DOE comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in a conductive layer, the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of at least first and second distinct, mask-patterned features, the test area being characterized by two dimensional parameters; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured, NCEM-enabled fill cells in the first DOE is configured to render a first selected manufacturing failure observable as an abnormal pad-to-ground leakage or conductance, detected by VC inspection of the pad; and, wherein the similarly-configured, NCEM-enabled fill cells of the first DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormal pad-to-ground leakage or resistance as a result of the first selected manufacturing failure. Such ICs may further include: a second DOE, comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in a conductive layer, the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of at least first and second distinct, mask-patterned features, the test area being characterized by two dimensional parameters; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured, NCEM-enabled fill cells in the second DOE is configured to render a second selected manufacturing failure observable as an abnormal pad-to-ground leakage or conductance, detected by VC inspection of the pad, and wherein the second selected manufacturing failure is different than the first selected manufacturing failure; and, wherein the similarly-configured, NCEM-enabled fill cells of the second DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormal pad-to-ground leakage or conductance as a result of the second selected manufacturing failure. The first selected manufacturing failure may involve short or leakage defects that present as abnormally high pad-to-ground conductance or leakage, and the second selected manufacturing failure may involve open or resistance defects that present as abnormally low pad-to-ground conductance or abnormally high pad-to-ground resistance. Both the first and second selected manufacturing failures may involve layers in a connector stack region of the IC. Such ICs may further include: a third DOE, comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in a conductive layer, the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of at least first and second distinct, mask-patterned features, the test area being characterized by two dimensional parameters; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured NCEM-enabled fill cells in the third DOE is configured to render a third selected manufacturing failure observable as an abnormal pad-to-ground leakage, conductance or resistance, detected by VC inspection of the pad, and wherein the third selected manufacturing failure is different than the first selected manufacturing failure, and is different than the second selected manufacturing failure; and, wherein the similarly-configured NCEM-enabled fill cells of the third DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormal pad-to-ground leakage, conductance or resistance as a result of the third selected manufacturing failure. Each of the first, second, and third DOEs preferably include NCEM-enabled fill cells in at least three, five, seven, or ten variants. The NCEM-enabled fill cells of the first, second, and third DOEs are preferably irregularly distributed within the standard cell area of the IC. Each variant may differ from the other(s) only in the position, size, or shape of its first or second mask-patterned feature, or only by a single dimensional parameter that characterizes their respective test areas.
Again, generally speaking, and without intending to be limiting, another aspect of the invention relates to ICs that include, for example: a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; wherein the IC includes at least a first DOE, the first DOE comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in a conductive layer, the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of first and second distinct, mask-patterned features, the test area characterized by two dimensional parameters, the test area configured to provide electrical isolation between the first and second mask-patterned features in the absence of a first selected manufacturing failure; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured, NCEM-enabled fill cells in the first DOE is configured to render a first selected manufacturing failure observable as an abnormally high pad-to-ground conductance or leakage, detected by VC inspection of the pad; and, wherein the similarly-configured, NCEM-enabled fill cells of the first DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormally high pad-to-ground conductance or leakage as a result of the first selected manufacturing failure. In each of the NCEM-enabled fill cells of the first DOE, the first and/or second distinct, mask-patterned features may each represent either a control element, or a portion thereof, and/or a portion of a control element connector or a substrate connector, and/or a portion of a control element jumper, substrate jumper, or interconnect jumper. In each of the NCEM-enabled fill cells of the first and/or second DOE(s), the first and second distinct, mask-patterned features may appear in a tip-to-tip configuration, a tip-to-side configuration, a side-to-side configuration, a diagonal configuration, or an interlayer overlap configuration.
Again, generally speaking, and without intending to be limiting, another aspect of the invention relates to ICs that include, for example: a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; wherein the IC includes at least a first DOE, the first DOE comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in one or more conductive layer(s), the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of a plurality of mask-patterned features, the test area characterized by two dimensional parameters, the plurality of mask-patterned features including at least first and second features that are electrically connected in the absence of a first manufacturing failure; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured NCEM-enabled fill cells in the first DOE is configured to render a first selected manufacturing failure observable as an abnormally high pad-to-ground conductance or leakage, detected by VC inspection of the pad; wherein the similarly-configured NCEM-enabled fill cells of the first DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormally high pad-to-ground conductance or leakage as a result of the first selected manufacturing failure; and, wherein the similarly-configured NCEM-enabled fill cells of the first DOE are selected from the list consisting of: AA-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-tip-short-configured, NCEM-enabled fill cells; TS-tip-to-tip-short-configured, NCEM-enabled fill cells; GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V0-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-tip-short-configured, NCEM-enabled fill cells; AA-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATE-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; TS-GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; M1-tip-to-side-short-configured, NCEM-enabled fill cells; V0-tip-to-side-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-side-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-side-short-configured, NCEM-enabled fill cells; V1-tip-to-side-short-configured, NCEM-enabled fill cells; M2-tip-to-side-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-side-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-tip-to-side-short-configured, NCEM-enabled fill cells; V2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-side-short-configured, NCEM-enabled fill cells; AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; TS-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-side-to-side-short-configured, NCEM-enabled fill cells; M1-side-to-side-short-configured, NCEM-enabled fill cells; V0-side-to-side-short-configured, NCEM-enabled fill cells; M1-V0-side-to-side-short-configured, NCEM-enabled fill cells; V1-M1-side-to-side-short-configured, NCEM-enabled fill cells; V1-side-to-side-short-configured, NCEM-enabled fill cells; M2-side-to-side-short-configured, NCEM-enabled fill cells; M2-V1-side-to-side-short-configured, NCEM-enabled fill cells; V2-M2-side-to-side-short-configured, NCEM-enabled fill cells; M3-side-to-side-short-configured, NCEM-enabled fill cells; V2-side-to-side-short-configured, NCEM-enabled fill cells; M3-V2-side-to-side-short-configured, NCEM-enabled fill cells; AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-V2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AA-diagonal-short-configured, NCEM-enabled fill cells; TS-diagonal-short-configured, NCEM-enabled fill cells; AACNT-diagonal-short-configured, NCEM-enabled fill cells; AACNT-AA-diagonal-short-configured, NCEM-enabled fill cells; GATE-diagonal-short-configured, NCEM-enabled fill cells; GATE-AACNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-GATE-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-diagonal-short-configured, NCEM-enabled fill cells; M1-diagonal-short-configured, NCEM-enabled fill cells; V0-diagonal-short-configured, NCEM-enabled fill cells; M1-V0-diagonal-short-configured, NCEM-enabled fill cells; V1-M1-diagonal-short-configured, NCEM-enabled fill cells; V1-diagonal-short-configured, NCEM-enabled fill cells; M2-diagonal-short-configured, NCEM-enabled fill cells; M2-V1-diagonal-short-configured, NCEM-enabled fill cells; M3-diagonal-short-configured, NCEM-enabled fill cells; V2-M2-diagonal-short-configured, NCEM-enabled fill cells; V2-diagonal-short-configured, NCEM-enabled fill cells; M3-V2-diagonal-short-configured, NCEM-enabled fill cells; AA-corner-short-configured, NCEM-enabled fill cells; AACNT-corner-short-configured, NCEM-enabled fill cells; AACNT-AA-corner-short-configured, NCEM-enabled fill cells; GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-TS-corner-short-configured, NCEM-enabled fill cells; GATECNT-corner-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-corner-short-configured, NCEM-enabled fill cells; M1-corner-short-configured, NCEM-enabled fill cells; V0-corner-short-configured, NCEM-enabled fill cells; M1-V0-corner-short-configured, NCEM-enabled fill cells; V1-M1-corner-short-configured, NCEM-enabled fill cells; V1-corner-short-configured, NCEM-enabled fill cells; M2-corner-short-configured, NCEM-enabled fill cells; M2-V1-corner-short-configured, NCEM-enabled fill cells; M3-corner-short-configured, NCEM-enabled fill cells; V2-M2-corner-short-configured, NCEM-enabled fill cells; V2-corner-short-configured, NCEM-enabled fill cells; M3-V2-corner-short-configured, NCEM-enabled fill cells; GATE-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATE-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-GATECNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V1-V0-interlayer-overlap-short-configured, NCEM-enabled fill cells; M2-M1-interlayer-overlap-short-configured, NCEM-enabled fill cells; V2-V1-interlayer-overlap-short-configured, NCEM-enabled fill cells; M3-M2-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATECNT-via-chamfer-short-configured, NCEM-enabled fill cells; V0-AACNT-via-chamfer-short-configured, NCEM-enabled fill cells; V1-M1-via-chamfer-short-configured, NCEM-enabled fill cells; V2-M2-via-chamfer-short-configured, NCEM-enabled fill cells; V0-merged-via-short-configured, NCEM-enabled fill cells; V1-merged-via-short-configured, NCEM-enabled fill cells; and, V2-merged-via-short-configured, NCEM-enabled fill cells; a second DOE, comprising a plurality of similarly-configured, NCEM-enabled fill cells, wherein each NCEM-enabled fill cell comprises at least: first and second elongated conductive supply rails, formed in a connector or interconnect stack, extending across the entire width of the cell, and configured for compatibility with corresponding supply rails contained in the logic cells of the standard cell region; a NCEM pad, formed in a conductive layer, the pad being at least two times larger, in at least one dimension, than a minimum size permitted by design rules; a rectangular test area defined by selected boundaries of at least first and second distinct, mask-patterned features, the test area being characterized by two dimensional parameters; a first conductive pathway that electrically connects the first mask-patterned feature to the pad; and, a second conductive pathway that electrically connects the second mask-patterned feature to a permanently or virtually grounded structure; wherein each of the similarly-configured, NCEM-enabled fill cells in the second DOE is configured to render a second selected manufacturing failure observable as an abnormally low pad-to-ground conductance or abnormally high pad-to-ground resistance, detected by VC inspection of the pad; and, wherein the similarly-configured, NCEM-enabled fill cells of the second DOE include a plurality of variants, where the variants differ in terms of their respective probability of presenting an abnormally low pad-to-ground conductance or abnormally high pad-to-ground resistance as a result of the second selected manufacturing failure; and, wherein the similarly-configured NCEM-enabled fill cells of the second DOE are selected from the list consisting of: AA-snake-open-configured, NCEM-enabled fill cells; TS-snake-open-configured, NCEM-enabled fill cells; AACNT-snake-open-configured, NCEM-enabled fill cells; GATE-snake-open-configured, NCEM-enabled fill cells; GATECNT-snake-open-configured, NCEM-enabled fill cells; V0-snake-open-configured, NCEM-enabled fill cells; M1-snake-open-configured, NCEM-enabled fill cells; V1-snake-open-configured, NCEM-enabled fill cells; M2-snake-open-configured, NCEM-enabled fill cells; V2-snake-open-configured, NCEM-enabled fill cells; M3-snake-open-configured, NCEM-enabled fill cells; AA-stitch-open-configured, NCEM-enabled fill cells; TS-stitch-open-configured, NCEM-enabled fill cells; AACNT-stitch-open-configured, NCEM-enabled fill cells; GATECNT-stitch-open-configured, NCEM-enabled fill cells; V0-stitch-open-configured, NCEM-enabled fill cells; M1-stitch-open-configured, NCEM-enabled fill cells; V1-stitch-open-configured, NCEM-enabled fill cells; M2-stitch-open-configured, NCEM-enabled fill cells; V2-stitch-open-configured, NCEM-enabled fill cells; M3-stitch-open-configured, NCEM-enabled fill cells; AACNT-TS-via-open-configured, NCEM-enabled fill cells; AACNT-AA-via-open-configured, NCEM-enabled fill cells; TS-AA-via-open-configured, NCEM-enabled fill cells; GATECNT-GATE-via-open, NCEM-enabled fill cells; V0-GATECNT-via-open-configured, NCEM-enabled fill cells; V0-AA-via-open-configured, NCEM-enabled fill cells; V0-TS-via-open-configured, NCEM-enabled fill cells; V0-AACNT-via-open-configured, NCEM-enabled fill cells; V0-GATE-via-open-configured, NCEM-enabled fill cells; V0-via-open-configured, NCEM-enabled fill cells; M1-V0-via-open-configured, NCEM-enabled fill cells; V1-M1-via-open-configured, NCEM-enabled fill cells; V1-M2-via-open-configured, NCEM-enabled fill cells; M1-GATECNT-via-open-configured, NCEM-enabled fill cells; M1-AANCT-via-open-configured, NCEM-enabled fill cells; V2-M2-via-open-configured, NCEM-enabled fill cells; V2-M3-via-open-configured, NCEM-enabled fill cells; M1-metal-island-open-configured, NCEM-enabled fill cells; M2-metal-island-open-configured, NCEM-enabled fill cells; M3-metal-island-open-configured, NCEM-enabled fill cells; V0-merged-via-open-configured, NCEM-enabled fill cells; V0-AACNT-merged-via-open-configured, NCEM-enabled fill cells; V0-GATECNT-merged-via-open-configured, NCEM-enabled fill cells; V1-merged-via-open-configured, NCEM-enabled fill cells; V2-merged-via-open-configured, NCEM-enabled fill cells; V1-M1-merged-via-open-configured, NCEM-enabled fill cells; V2-M2-merged-via-open-configured, NCEM-enabled fill cells.
Again, generally speaking, and without intending to be limiting, another aspect of the invention relates methods for making ICs that include, for example: (a) performing initial processing steps on a semiconductor wafer, the initial processing steps including: patterning a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; and, patterning a first DOE by instantiating a plurality of similarly-configured, NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area, each of the cells in the first DOE configured to enable evaluation of a first manufacturing failure by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the first manufacturing failure; (b) determining a presence or absence of the first manufacturing failure by: performing a voltage contrast examination of NCEM-enabled fill cells in the first DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the first DOE represent instance(s) of the first manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the first manufacturing failure; and, (c) based, at least in part, on results from step (b), selectively performing additional processing, metrology or inspection steps on the wafer, and/or on other wafer(s) currently being manufactured using a process flow(s) relevant to the observed first manufacturing failure. Step (a) may further involve: patterning a second DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area and fill cells in the first DOE, each of the cells in the second DOE configured to enable evaluation of a second manufacturing failure, different from the first manufacturing failure, by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the second manufacturing failure; and wherein step (b) further comprises: performing a voltage contrast examination of NCEM-enabled fill cells in the second DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the second DOE represent instance(s) of the second manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the second manufacturing failure. Step (a) may further involve: patterning a third DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area and fill cells in the first and second DOEs, each of the cells in the third DOE configured to enable evaluation of a third manufacturing failure, different from the first and second manufacturing failures, by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the third manufacturing failure; and wherein step (b) further comprises: performing a voltage contrast examination of NCEM-enabled fill cells in the third DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the third DOE represent instance(s) of the third manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the third manufacturing failure. At least one of the first, second, or third manufacturing failures preferably involves unintended shorts or leakages, and at least one of the first, second, or third manufacturing failures preferably involves unintended opens or excessive resistances. Instantiating the NCEM-enabled fill cells preferably comprises distributing the cells irregularly within the standard cell area. Within each of the DOEs, each variant may differ from the other(s) only in the position, size, or shape of a single mask-patterned feature. At least one of the first, second, or third manufacturing failures may involve unintended shorts between structures in a tip-to-tip configuration, or unintended shorts between structures in a tip-to-side configuration, or unintended shorts between structures in a side-to-side configuration, or unintended shorts between structures in a diagonal configuration, or unintended shorts between structures in an interlayer overlap configuration, or unintended interlayer shorts or leakages between structures in a corner configuration, unintended opens in snake-shaped structures, unintended opens in stitched structures, unintended opens in via-connected structures. Each of the first, second, and third DOEs preferably includes NCEM-enabled fill cells in at least three, five, seven, 11, 21, or more variants. Each of the first, second, and third DOEs may consist of cells selected from the list of: AA-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-tip-short-configured, NCEM-enabled fill cells; TS-tip-to-tip-short-configured, NCEM-enabled fill cells; GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V0-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-tip-short-configured, NCEM-enabled fill cells; AA-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATE-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; TS-GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; M1-tip-to-side-short-configured, NCEM-enabled fill cells; V0-tip-to-side-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-side-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-side-short-configured, NCEM-enabled fill cells; V1-tip-to-side-short-configured, NCEM-enabled fill cells; M2-tip-to-side-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-side-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-tip-to-side-short-configured, NCEM-enabled fill cells; V2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-side-short-configured, NCEM-enabled fill cells; AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; TS-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-side-to-side-short-configured, NCEM-enabled fill cells; M1-side-to-side-short-configured, NCEM-enabled fill cells; V0-side-to-side-short-configured, NCEM-enabled fill cells; M1-V0-side-to-side-short-configured, NCEM-enabled fill cells; V1-M1-side-to-side-short-configured, NCEM-enabled fill cells; V1-side-to-side-short-configured, NCEM-enabled fill cells; M2-side-to-side-short-configured, NCEM-enabled fill cells; M2-V1-side-to-side-short-configured, NCEM-enabled fill cells; V2-M2-side-to-side-short-configured, NCEM-enabled fill cells; M3-side-to-side-short-configured, NCEM-enabled fill cells; V2-side-to-side-short-configured, NCEM-enabled fill cells; M3-V2-side-to-side-short-configured, NCEM-enabled fill cells; AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-V2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AA-diagonal-short-configured, NCEM-enabled fill cells; TS-diagonal-short-configured, NCEM-enabled fill cells; AACNT-diagonal-short-configured, NCEM-enabled fill cells; AACNT-AA-diagonal-short-configured, NCEM-enabled fill cells; GATE-diagonal-short-configured, NCEM-enabled fill cells; GATE-AACNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-GATE-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-diagonal-short-configured, NCEM-enabled fill cells; M1-diagonal-short-configured, NCEM-enabled fill cells; V0-diagonal-short-configured, NCEM-enabled fill cells; M1-V0-diagonal-short-configured, NCEM-enabled fill cells; V1-M1-diagonal-short-configured, NCEM-enabled fill cells; V1-diagonal-short-configured, NCEM-enabled fill cells; M2-diagonal-short-configured, NCEM-enabled fill cells; M2-V1-diagonal-short-configured, NCEM-enabled fill cells; M3-diagonal-short-configured, NCEM-enabled fill cells; V2-M2-diagonal-short-configured, NCEM-enabled fill cells; V2-diagonal-short-configured, NCEM-enabled fill cells; M3-V2-diagonal-short-configured, NCEM-enabled fill cells; AA-corner-short-configured, NCEM-enabled fill cells; AACNT-corner-short-configured, NCEM-enabled fill cells; AACNT-AA-corner-short-configured, NCEM-enabled fill cells; GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-TS-corner-short-configured, NCEM-enabled fill cells; GATECNT-corner-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-corner-short-configured, NCEM-enabled fill cells; M1-corner-short-configured, NCEM-enabled fill cells; V0-corner-short-configured, NCEM-enabled fill cells; M1-V0-corner-short-configured, NCEM-enabled fill cells; V1-M1-corner-short-configured, NCEM-enabled fill cells; V1-corner-short-configured, NCEM-enabled fill cells; M2-corner-short-configured, NCEM-enabled fill cells; M2-V1-corner-short-configured, NCEM-enabled fill cells; M3-corner-short-configured, NCEM-enabled fill cells; V2-M2-corner-short-configured, NCEM-enabled fill cells; V2-corner-short-configured, NCEM-enabled fill cells; M3-V2-corner-short-configured, NCEM-enabled fill cells; GATE-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATE-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-GATECNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V1-V0-interlayer-overlap-short-configured, NCEM-enabled fill cells; M2-M1-interlayer-overlap-short-configured, NCEM-enabled fill cells; V2-V1-interlayer-overlap-short-configured, NCEM-enabled fill cells; M3-M2-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATECNT-via-chamfer-short-configured, NCEM-enabled fill cells; V0-AACNT-via-chamfer-short-configured, NCEM-enabled fill cells; V1-M1-via-chamfer-short-configured, NCEM-enabled fill cells; V2-M2-via-chamfer-short-configured, NCEM-enabled fill cells; V0-merged-via-short-configured, NCEM-enabled fill cells; V1-merged-via-short-configured, NCEM-enabled fill cells; V2-merged-via-short-configured, NCEM-enabled fill cells; AA-snake-open-configured, NCEM-enabled fill cells; TS-snake-open-configured, NCEM-enabled fill cells; AACNT-snake-open-configured, NCEM-enabled fill cells; GATE-snake-open-configured, NCEM-enabled fill cells; GATECNT-snake-open-configured, NCEM-enabled fill cells; V0-snake-open-configured, NCEM-enabled fill cells; M1-snake-open-configured, NCEM-enabled fill cells; V1-snake-open-configured, NCEM-enabled fill cells; M2-snake-open-configured, NCEM-enabled fill cells; V2-snake-open-configured, NCEM-enabled fill cells; M3-snake-open-configured, NCEM-enabled fill cells; AA-stitch-open-configured, NCEM-enabled fill cells; TS-stitch-open-configured, NCEM-enabled fill cells; AACNT-stitch-open-configured, NCEM-enabled fill cells; GATECNT-stitch-open-configured, NCEM-enabled fill cells; V0-stitch-open-configured, NCEM-enabled fill cells; M1-stitch-open-configured, NCEM-enabled fill cells; V1-stitch-open-configured, NCEM-enabled fill cells; M2-stitch-open-configured, NCEM-enabled fill cells; V2-stitch-open-configured, NCEM-enabled fill cells; M3-stitch-open-configured, NCEM-enabled fill cells; AACNT-TS-via-open-configured, NCEM-enabled fill cells; AACNT-AA-via-open-configured, NCEM-enabled fill cells; TS-AA-via-open-configured, NCEM-enabled fill cells; GATECNT-GATE-via-open, NCEM-enabled fill cells; V0-GATECNT-via-open-configured, NCEM-enabled fill cells; V0-AA-via-open-configured, NCEM-enabled fill cells; V0-TS-via-open-configured, NCEM-enabled fill cells; V0-AACNT-via-open-configured, NCEM-enabled fill cells; V0-GATE-via-open-configured, NCEM-enabled fill cells; V0-via-open-configured, NCEM-enabled fill cells; M1-V0-via-open-configured, NCEM-enabled fill cells; V1-M1-via-open-configured, NCEM-enabled fill cells; V1-M2-via-open-configured, NCEM-enabled fill cells; M1-GATECNT-via-open-configured, NCEM-enabled fill cells; M1-AANCT-via-open-configured, NCEM-enabled fill cells; V2-M2-via-open-configured, NCEM-enabled fill cells; V2-M3-via-open-configured, NCEM-enabled fill cells; M1-metal-island-open-configured, NCEM-enabled fill cells; M2-metal-island-open-configured, NCEM-enabled fill cells; M3-metal-island-open-configured, NCEM-enabled fill cells; V0-merged-via-open-configured, NCEM-enabled fill cells; V0-AACNT-merged-via-open-configured, NCEM-enabled fill cells; V0-GATECNT-merged-via-open-configured, NCEM-enabled fill cells; V1-merged-via-open-configured, NCEM-enabled fill cells; V2-merged-via-open-configured, NCEM-enabled fill cells; V1-M1-merged-via-open-configured, NCEM-enabled fill cells; V2-M2-merged-via-open-configured, NCEM-enabled fill cells.
Again, generally speaking, and without intending to be limiting, another aspect of the invention relates to methods for making ICs that include, for example: (a) performing initial processing steps on a first semiconductor wafer, the initial processing steps including, at least: patterning a first DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell library, each of the cells in the first DOE configured to enable evaluation of a first manufacturing failure by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the first manufacturing failure; patterning a second DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell library and fill cells in the first DOE, each of the cells in the second DOE configured to enable evaluation of a second manufacturing failure, different from the first manufacturing failure, by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the second manufacturing failure; and, patterning a third DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell library and fill cells in the first and second DOEs, each of the cells in the third DOE configured to enable evaluation of a third manufacturing failure, different from the first and second manufacturing failures, by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the third manufacturing failure; and, (b) determining a presence or absence of the first, second, and third manufacturing failures by: performing a voltage contrast examination of NCEM-enabled fill cells in the first DOE; determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the first DOE represent instance(s) of the first manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the first manufacturing failure; performing a voltage contrast examination of NCEM-enabled fill cells in the second DOE; determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the second DOE represent instance(s) of the second manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the second manufacturing failure; performing a voltage contrast examination of NCEM-enabled fill cells in the third DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the third DOE represent instance(s) of the third manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the third manufacturing failure; and, (c) based, at least in part, on results from step (b), fabricating product masks that include: a standard cell area that includes a mix of at least one thousand logic cells, from the standard cell library, and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; and, a fourth DOE that includes a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area, each of the cells in the fourth DOE configured to enable evaluation of the first manufacturing failure by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the first manufacturing failure; and, the product masks not including any DOEs configured to enable evaluation of the second or third manufacturing failures; and, (d) using the product masks, performing initial processing steps on a product wafer, the initial processing steps including: patterning the standard cell area; and, patterning the fourth DOE; (e) determining a presence or absence of the first manufacturing failure on the product wafer by: performing a voltage contrast examination of NCEM-enabled fill cells in the fourth DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the fourth DOE represent instance(s) of the first manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the first manufacturing failure; and, (f) based, at least in part, on results from step (e), selectively performing additional processing, metrology or inspection steps on the product wafer, and/or on other product wafer(s) currently being manufactured using a process flow(s) relevant to the observed first manufacturing failure.
Again, generally speaking, and without intending to be limiting, another aspect of the invention relates to methods for making ICs that include, for example: (a) performing initial processing steps on an initial product wafer, the initial processing steps including, at least: patterning a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; and, patterning, within the standard cell area, a first DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area, each of the cells in the first DOE configured to enable evaluation of a first manufacturing failure by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the first manufacturing failure; patterning a second DOE by instantiating a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area and fill cells in the first DOE, each of the cells in the second DOE configured to enable evaluation of a second manufacturing failure, different from the first manufacturing failure, by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the second manufacturing failure; and, (b) determining a presence or absence of the first and second manufacturing failures on the initial product wafer by: performing a voltage contrast examination of NCEM-enabled fill cells in the first DOE; determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the first DOE represent instance(s) of the first manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the first manufacturing failure; performing a voltage contrast examination of NCEM-enabled fill cells in the second DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the second DOE represent instance(s) of the second manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the second manufacturing failure; and, (c) based, at least in part, on results from step (b), fabricating final product masks that include: a standard cell area that includes a mix of at least one thousand logic cells and fill cells of different widths and uniform heights, placed into at least twenty adjacent rows, with at least twenty cells placed side-by-side in each row; and, a third DOE that includes a plurality of similarly-configured NCEM-enabled fill cells in at least two variants, the NCEM-enabled fill cells configured for compatibility with logic cells in the standard cell area, each of the cells in the third DOE configured to enable evaluation of the first manufacturing failure by voltage contrast examination of a NCEM of a pad contained in the cell, the variants exhibiting different NCEM sensitivity to the first manufacturing failure; the final product masks not including any DOEs configured to enable evaluation of the second manufacturing failure; and, (d) using the final product masks, performing initial processing steps on a final product wafer, the initial processing steps including: patterning the standard cell area; and, patterning the third DOE; and, (e) determining a presence or absence of the first manufacturing failure on the final product wafer by: performing a voltage contrast examination of NCEM-enabled fill cells in the third DOE; and, determining whether NCEMs of pads contained in the NCEM-enabled fill cells of the third DOE represent instance(s) of the first manufacturing failure and, if so, determining whether different cell variants exhibit a different prevalence of the first manufacturing failure; and, (f) based, at least in part, on results from step (e), selectively performing additional processing, metrology or inspection steps on the final product wafer, and/or on other product wafer(s) currently being manufactured using a process flow(s) relevant to the observed first manufacturing failure.
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of tip-to-tip shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of tip-to-side shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of side-to-side shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of L-shape interlayer shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of diagonal shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of corner shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of interlayer-overlap shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of via-chamfer shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of merged-via shorts, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of snake opens, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of stitch opens, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of via opens, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of metal island opens, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of merged-via opens, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of tip-to-tip leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of tip-to-side leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of side-to-side leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of L-shape interlayer leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of diagonal leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of corner leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of interlayer-overlap leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of via-chamfer leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of merged-via leakages, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of snake resistances, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of stitch resistances, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of via resistances, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of metal island resistances, including but not limited to:
Still further aspects of the invention relate to wafers, chips, and processes for making them that include/utilize DOEs based on means/steps for enabling NC detection of merged-via resistances, including but not limited to:
Still further aspects of the invention relate to mesh-style NCEM pads, and their use with in-line process control/optimization, such pads comprising, for example: at least two parallel, elongated AACNT features, extending longitudinally in a first direction; at least two parallel, elongated GATECNT features, extending longitudinally in a second direction, perpendicular to the first direction; wherein the features are positioned such that each of the AANCT features intersects each of the GATECNT features. Such pads may include at least three (or four, or five, or six, etc.) parallel, elongated AACNT features that extend longitudinally in the first direction, and/or at least three (or four, or five, or six, etc.) parallel, elongated GATECNT features that extend longitudinally in the second direction. Such pads may be part of an assembly that includes: a mesh-style NCEM pad; and, an upper layer NCEM pad, overlying the mesh-style NCEM pad, said upper layer NCEM pad comprising: one or more mask-patterned features, in a first wiring layer (M1), that substantially cover the mesh-style NCEM pad; and, one or more mask-patterned features, in a via to interconnect stack (V0) layer, that provide electrical connection(s) between the M1 feature(s) and the mesh-style NCEM pad. Such V0 features may be positioned at the intersections of the underlying AACNT and GATECNT features, or may be positioned to avoid intersections of the underlying AACNT and GATECNT features. The one or more M1 features may include multiple, parallel, elongated M1 features. Any of the aforesaid features may be single-patterned, double-patterned, triple-patterned, etc. Such mesh-style NCEM pads may be used in NCEM-enabled fill cells, including but not limited to: AA-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-tip-short-configured, NCEM-enabled fill cells; AACNT-TS-tip-to-tip-short-configured, NCEM-enabled fill cells; TS-tip-to-tip-short-configured, NCEM-enabled fill cells; GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-tip-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V0-tip-to-tip-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-tip-short-configured, NCEM-enabled fill cells; V1-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-tip-to-tip-short-configured, NCEM-enabled fill cells; V2-tip-to-tip-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-tip-short-configured, NCEM-enabled fill cells; AA-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATE-AA-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; TS-GATECNT-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-tip-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-TS-tip-to-side-short-configured, NCEM-enabled fill cells; M1-tip-to-side-short-configured, NCEM-enabled fill cells; V0-tip-to-side-short-configured, NCEM-enabled fill cells; M1-V0-tip-to-side-short-configured, NCEM-enabled fill cells; V1-M1-tip-to-side-short-configured, NCEM-enabled fill cells; V1-tip-to-side-short-configured, NCEM-enabled fill cells; M2-tip-to-side-short-configured, NCEM-enabled fill cells; M2-V1-tip-to-side-short-configured, NCEM-enabled fill cells; V2-M2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-tip-to-side-short-configured, NCEM-enabled fill cells; V2-tip-to-side-short-configured, NCEM-enabled fill cells; M3-V2-tip-to-side-short-configured, NCEM-enabled fill cells; AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-AA-side-to-side-short-configured, NCEM-enabled fill cells; AACNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-GATE-side-to-side-short-configured, NCEM-enabled fill cells; TS-GATE-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-side-to-side-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-side-to-side-short-configured, NCEM-enabled fill cells; M1-side-to-side-short-configured, NCEM-enabled fill cells; V0-side-to-side-short-configured, NCEM-enabled fill cells; M1-V0-side-to-side-short-configured, NCEM-enabled fill cells; V1-M1-side-to-side-short-configured, NCEM-enabled fill cells; V1-side-to-side-short-configured, NCEM-enabled fill cells; M2-side-to-side-short-configured, NCEM-enabled fill cells; M2-V1-side-to-side-short-configured, NCEM-enabled fill cells; V2-M2-side-to-side-short-configured, NCEM-enabled fill cells; M3-side-to-side-short-configured, NCEM-enabled fill cells; V2-side-to-side-short-configured, NCEM-enabled fill cells; M3-V2-side-to-side-short-configured, NCEM-enabled fill cells; AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AACNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATE-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AA-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-TS-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATE-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V0-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-AACNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-GATECNT-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V1-V0-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-M1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-V1-L-shape-interlayer-short-configured, NCEM-enabled fill cells; V2-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-M2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; M3-V2-L-shape-interlayer-short-configured, NCEM-enabled fill cells; AA-diagonal-short-configured, NCEM-enabled fill cells; TS-diagonal-short-configured, NCEM-enabled fill cells; AACNT-diagonal-short-configured, NCEM-enabled fill cells; AACNT-AA-diagonal-short-configured, NCEM-enabled fill cells; GATE-diagonal-short-configured, NCEM-enabled fill cells; GATE-AACNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-GATE-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-diagonal-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-diagonal-short-configured, NCEM-enabled fill cells; M1-diagonal-short-configured, NCEM-enabled fill cells; V0-diagonal-short-configured, NCEM-enabled fill cells; M1-V0-diagonal-short-configured, NCEM-enabled fill cells; V1-M1-diagonal-short-configured, NCEM-enabled fill cells; V1-diagonal-short-configured, NCEM-enabled fill cells; M2-diagonal-short-configured, NCEM-enabled fill cells; M2-V1-diagonal-short-configured, NCEM-enabled fill cells; M3-diagonal-short-configured, NCEM-enabled fill cells; V2-M2-diagonal-short-configured, NCEM-enabled fill cells; V2-diagonal-short-configured, NCEM-enabled fill cells; M3-V2-diagonal-short-configured, NCEM-enabled fill cells; AA-corner-short-configured, NCEM-enabled fill cells; AACNT-corner-short-configured, NCEM-enabled fill cells; AACNT-AA-corner-short-configured, NCEM-enabled fill cells; GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-GATE-corner-short-configured, NCEM-enabled fill cells; GATECNT-TS-corner-short-configured, NCEM-enabled fill cells; GATECNT-corner-short-configured, NCEM-enabled fill cells; GATECNT-AA-corner-short-configured, NCEM-enabled fill cells; GATECNT-AACNT-corner-short-configured, NCEM-enabled fill cells; M1-corner-short-configured, NCEM-enabled fill cells; V0-corner-short-configured, NCEM-enabled fill cells; M1-V0-corner-short-configured, NCEM-enabled fill cells; V1-M1-corner-short-configured, NCEM-enabled fill cells; V1-corner-short-configured, NCEM-enabled fill cells; M2-corner-short-configured, NCEM-enabled fill cells; M2-V1-corner-short-configured, NCEM-enabled fill cells; M3-corner-short-configured, NCEM-enabled fill cells; V2-M2-corner-short-configured, NCEM-enabled fill cells; V2-corner-short-configured, NCEM-enabled fill cells; M3-V2-corner-short-configured, NCEM-enabled fill cells; GATE-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATE-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; GATECNT-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AA-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-TS-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATE-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-GATECNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; M1-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cells; V1-V0-interlayer-overlap-short-configured, NCEM-enabled fill cells; M2-M1-interlayer-overlap-short-configured, NCEM-enabled fill cells; V2-V1-interlayer-overlap-short-configured, NCEM-enabled fill cells; M3-M2-interlayer-overlap-short-configured, NCEM-enabled fill cells; V0-GATECNT-via-chamfer-short-configured, NCEM-enabled fill cells; V0-AACNT-via-chamfer-short-configured, NCEM-enabled fill cells; V1-M1-via-chamfer-short-configured, NCEM-enabled fill cells; V2-M2-via-chamfer-short-configured, NCEM-enabled fill cells; V3-M3-via-chamfer-short-configured, NCEM-enabled fill cells; V0-merged-via-short-configured, NCEM-enabled fill cells; V1-merged-via-short-configured, NCEM-enabled fill cells; V2-merged-via-short-configured, NCEM-enabled fill cells; AA-snake-open-configured, NCEM-enabled fill cells; TS-snake-open-configured, NCEM-enabled fill cells; AACNT-snake-open-configured, NCEM-enabled fill cells; GATE-snake-open-configured, NCEM-enabled fill cells; GATECNT-snake-open-configured, NCEM-enabled fill cells; V0-snake-open-configured, NCEM-enabled fill cells; M1-snake-open-configured, NCEM-enabled fill cells; M1-V0-AACNT-snake-open-configured, NCEM-enabled fill cells; V1-snake-open-configured, NCEM-enabled fill cells; M2-snake-open-configured, NCEM-enabled fill cells; V2-snake-open-configured, NCEM-enabled fill cells; M3-snake-open-configured, NCEM-enabled fill cells; AA-stitch-open-configured, NCEM-enabled fill cells; TS-stitch-open-configured, NCEM-enabled fill cells; AACNT-stitch-open-configured, NCEM-enabled fill cells; GATECNT-stitch-open-configured, NCEM-enabled fill cells; V0-stitch-open-configured, NCEM-enabled fill cells; M1-stitch-open-configured, NCEM-enabled fill cells; V1-stitch-open-configured, NCEM-enabled fill cells; M2-stitch-open-configured, NCEM-enabled fill cells; V2-stitch-open-configured, NCEM-enabled fill cells; M3-stitch-open-configured, NCEM-enabled fill cells; AACNT-TS-via-open-configured, NCEM-enabled fill cells; AACNT-AA-via-open-configured, NCEM-enabled fill cells; TS-AA-via-open-configured, NCEM-enabled fill cells; GATECNT-GATE-via-open-configured, NCEM-enabled fill cells; GATECNT-AACNT-via-open-configured, NCEM-enabled fill cells; GATECNT-AACNT-GATE-via-open-configured, NCEM-enabled fill cells; V0-GATECNT-via-open-configured, NCEM-enabled fill cells; V0-AA-via-open-configured, NCEM-enabled fill cells; V0-TS-via-open-configured, NCEM-enabled fill cells; V0-AACNT-via-open-configured, NCEM-enabled fill cells; V0-GATE-via-open-configured, NCEM-enabled fill cells; V0-via-open-configured, NCEM-enabled fill cells; M1-V0-via-open-configured, NCEM-enabled fill cells; V1-via-open-configured, NCEM-enabled fill cells; V1-M1-via-open-configured, NCEM-enabled fill cells; V1-M2-via-open-configured, NCEM-enabled fill cells; M1-GATECNT-via-open-configured, NCEM-enabled fill cells; M1-AANCT-via-open-configured, NCEM-enabled fill cells; V2-M2-via-open-configured, NCEM-enabled fill cells; V2-M3-via-open-configured, NCEM-enabled fill cells; V3-via-open-configured, NCEM-enabled fill cells; M4-V3-via-open-configured, NCEM-enabled fill cells; M5-V4-via-open-configured, NCEM-enabled fill cells; M1-metal-island-open-configured, NCEM-enabled fill cells; M2-metal-island-open-configured, NCEM-enabled fill cells; M3-metal-island-open-configured, NCEM-enabled fill cells; V0-merged-via-open-configured, NCEM-enabled fill cells; V0-AACNT-merged-via-open-configured, NCEM-enabled fill cells; V0-GATECNT-merged-via-open-configured, NCEM-enabled fill cells; V1-merged-via-open-configured, NCEM-enabled fill cells; V2-merged-via-open-configured, NCEM-enabled fill cells; V1-M1-merged-via-open-configured, NCEM-enabled fill cells; and/or V2-M2-merged-via-open-configured, NCEM-enabled fill cells. Using such mesh-style pads, a method for processing a semiconductor substrate may include: using a first mask to pattern a plurality of adjacent AACNT stripes on the substrate; using a second mask to pattern a plurality of adjacent GATECNT stripes on the substrate, where the GATECNT stripes perpendicularly overlap the AACNT stripes to form a mesh-style NCEM pad; and, obtaining in-line NCEM from the mesh-style NCEM pad. Such process may further include: using a third mask to pattern a plurality of V0 vias above at least some of the GATECNT and/or AACNT stripes of the mesh-style NCEM pad; and, using a fourth mask to pattern one or more M1 features above one or more of said V0 vias to form an M1 NCEM pad, and may further include: obtaining in-line NCEM from the M1 NCEM pad.
As claimed in this application, a monolithic integrated circuit (IC) preferably includes at least a source/drain (AA) layer, a source/drain contact (AACNT) layer, a source/drain silicide (TS) layer, a gate (GATE) layer, a gate contact (GATECNT) layer, a via to interconnect stack (V0) layer, a first wiring (M1) layer, a second wiring (M2) layer, and an M1-to-M2 via (V1) layer. Such IC preferably comprises at least: (i) a plurality of logic cells selected from a standard cell library in which each logic cell has a height, supply rail configuration, and GATE pitch (CPP) configured for abutted instantiation with other logic cells in the library; and (ii) a plurality of at least four different, non-contact electrical measurement (NCEM)-enabled fill cells, each of said NCEM-enabled fill cells having a height, supply rail configuration, and CPP configured for abutted instantiation with logic cells in the standard cell library, said plurality of NCEM-enabled fill cells including: (a) at least one via-open-configured, NCEM-enabled fill cell that includes standard patterning consistent with cells in the standard cell library and test area patterning configured to enable NCEM detection of at least one unintended open circuit condition that relates to via patterning; (b) at least one AACNT-short-configured, NCEM-enabled fill cell that includes standard patterning consistent with cells in the standard cell library and test gap patterning configured to enable NCEM detection of at least one unintended short circuit condition that relates to AACNT patterning; (c) at least one GATE-short-configured, NCEM-enabled fill cell that includes standard patterning consistent with cells in the standard cell library and test gap patterning configured to enable NCEM detection of at least one unintended short circuit condition that relates to GATE patterning; and (d) at least one TS-short-configured, NCEM-enabled fill cell that includes standard patterning consistent with cells in the standard cell library and test gap patterning configured to enable NCEM detection of at least one unintended short circuit condition that relates to TS patterning. In some embodiments, the at least one via-open-configured, NCEM-enabled fill cell comprises a V0-via-open-configured, NCEM-enabled fill cell. In some embodiments, the at least one via-open-configured, NCEM-enabled fill cell comprises an M1-V0-via-open-configured, NCEM-enabled fill cell. In some embodiments, the at least one via-open-configured, NCEM-enabled fill cell comprises an AACNT-AA-via-open-configured, NCEM-enabled fill cell. In some embodiments, the at least one via-open-configured, NCEM-enabled fill cell comprises a V0-GATECNT-via-open-configured, NCEM-enabled fill cell. In some embodiments, the IC additionally includes at least a third wiring (M3) layer, a fourth wiring (M4) layer, a fifth wiring (M5) layer, an M2-to-M3 via (V2) layer, an M3-M4 via (V3) layer, and an M4-to-M5 via (V4) layer, and the least one via-open-configured, NCEM-enabled fill cell comprises at least one of: an AACNT-TS-via-open-configured, NCEM-enabled fill cell; an AACNT-AA-via-open-configured, NCEM-enabled fill cell; a TS-AA-via-open-configured, NCEM-enabled fill cell; a GATECNT-GATE-via-open, NCEM-enabled fill cell; a GATECNT-AACNT-via-open-configured, NCEM-enabled fill cell; a GATECNT-AACNT-GATE-via-open-configured, NCEM-enabled fill cell; a V0-GATECNT-via-open-configured, NCEM-enabled fill cell; a V0-AACNT-via-open-configured, NCEM-enabled fill cell; a V1-via-open-configured, NCEM-enabled fill cell; a V1-M1-via-open-configured, NCEM-enabled fill cell; a V1-M2-via-open-configured, NCEM-enabled fill cell; an M1-GATECNT-via-open-configured, NCEM-enabled fill cell; an M1-AANCT-via-open-configured, NCEM-enabled fill cell; a V2-M2-via-open-configured, NCEM-enabled fill cell; a V2-M3-via-open-configured, NCEM-enabled fill cell; a V3-via-open-configured, NCEM-enabled fill cell; an M4-V3-via-open-configured, NCEM-enabled fill cell; and/or an M5-V4-via-open-configured, NCEM-enabled fill cell. In some embodiments, the IC additionally includes at least a third wiring (M3) layer and an M2-to-M3 via (V2) layer, and the at least one via-open-configured, NCEM-enabled fill cell comprises at least one of: a V0-merged-via-open-configured, NCEM-enabled fill cell; a V0-AACNT-merged-via-open-configured, NCEM-enabled fill cell; a V0-GATECNT-merged-via-open-configured, NCEM-enabled fill cell; a V1-merged-via-open-configured, NCEM-enabled fill cell; a V2-merged-via-open-configured, NCEM-enabled fill cell; a V1-M1-merged-via-open-configured, NCEM-enabled fill cell; and/or a V2-M2-merged-via-open-configured, NCEM-enabled fill cell. In some embodiments, the at least one AACNT-short-configured, NCEM-enabled fill cell comprises a V0-AACNT-chamfer-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one AACNT-short-configured, NCEM-enabled fill cell comprises an AACNT-tip-to-tip-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one AACNT-short-configured, NCEM-enabled fill cell comprises at least one of: an AACNT-AA-tip-to-tip-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-tip-to-tip-short-configured, NCEM-enabled fill cell; an AACNT-tip-to-side-short-configured, NCEM-enabled fill cell; an AACNT-AA-tip-to-side-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-tip-to-side-short-configured, NCEM-enabled fill cell; an AACNT-side-to-side-short-configured, NCEM-enabled fill cell; an AACNT-AA-side-to-side-short-configured, NCEM-enabled fill cell; an AACNT-GATE-side-to-side-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-side-to-side-short-configured, NCEM-enabled fill cell; an AACNT-diagonal-short-configured, NCEM-enabled fill cell; an AACNT-AA-diagonal-short-configured, NCEM-enabled fill cell; a GATE-diagonal-short-configured, NCEM-enabled fill cell; a GATE-AACNT-diagonal-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-diagonal-short-configured, NCEM-enabled fill cell; an AACNT-corner-short-configured, NCEM-enabled fill cell; an AACNT-AA-corner-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-corner-short-configured, NCEM-enabled fill cell; a GATE-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cell; an M1-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cell; and/or an AACNT-via-chamfer-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one GATE-short-configured, NCEM-enabled fill cell comprises a TS-GATE-side-to-side-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one GATE-short-configured, NCEM-enabled fill cell comprises a GATE-tip-to-tip-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one GATE-short-configured, NCEM-enabled fill cell comprises at least one of: a GATECNT-GATE-tip-to-tip-short-configured, NCEM-enabled fill cell; a GATE-AA-tip-to-side-short-configured, NCEM-enabled fill cell; a GATECNT-GATE-tip-to-side-short-configured, NCEM-enabled fill cell; an AACNT-GATE-side-to-side-short-configured, NCEM-enabled fill cell; a GATE-side-to-side-short-configured, NCEM-enabled fill cell; a GATECNT-GATE-side-to-side-short-configured, NCEM-enabled fill cell; a GATE-diagonal-short-configured, NCEM-enabled fill cell; a GATE-AACNT-diagonal-short-configured, NCEM-enabled fill cell; a GATECNT-GATE-diagonal-short-configured, NCEM-enabled fill cell; a GATE-corner-short-configured, NCEM-enabled fill cell; a GATECNT-GATE-corner-short-configured, NCEM-enabled fill cell; a GATE-AA-interlayer-overlap-short-configured, NCEM-enabled fill cell; a GATE-TS-interlayer-overlap-short-configured, NCEM-enabled fill cell; a GATE-AACNT-interlayer-overlap-short-configured, NCEM-enabled fill cell; and/or a V0-GATE-interlayer-overlap-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one TS-short-configured, NCEM-enabled fill cell comprises a GATECNT-TS-corner-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one TS-short-configured, NCEM-enabled fill cell comprises a TS-GATE-side-to-side-short-configured, NCEM-enabled fill cell. In some embodiments, the at least one TS-short-configured, NCEM-enabled fill cell comprises at least one of: an AACNT-TS-tip-to-tip-short-configured, NCEM-enabled fill cell; a TS-tip-to-tip-short-configured, NCEM-enabled fill cell; a TS-GATECNT-tip-to-side-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-TS-tip-to-side-short-configured, NCEM-enabled fill cell; a TS-diagonal-short-configured, NCEM-enabled fill cell; a GATE-TS-interlayer-overlap-short-configured, NCEM-enabled fill cell; a GATECNT-TS-interlayer-overlap-short-configured, NCEM-enabled fill cell; and/or a V0-TS-interlayer-overla p-short-configured, NCEM-enabled fill cell. In some embodiments, each of the (b) at least one AACNT-short-configured, (c) at least one GATE-short-configured, and (d) at least one TS-short-configured, NCEM-enabled fill cells is of the same color variety. In some embodiments, at least one of the (b) at least one AACNT-short-configured, (c) at least one GATE-short-configured, and (d) at least one TS-short-configured, NCEM-enabled fill cells is of the different color variety. In some embodiments, each of the (b) at least one AACNT-short-configured, (c) at least one GATE-short-configured, and (d) at least one TS-short-configured, NCEM-enabled fill cells includes an M1 pad. And in some embodiments, the IC includes at least one additional NCEM-enabled fill cell selected from the list consisting of: a V3-M3-chamfer-short-configured, NCEM-enabled fill cell; a GATECNT-AA-corner-short-configured, NCEM-enabled fill cell; an M1-corner-short-configured, NCEM-enabled fill cell; a GATECNT-diagonal-short-configured, NCEM-enabled fill cell; a GATECNT-AACNT-diagonal-short-configured, NCEM-enabled fill cell; a GATECNT-side-to-side-short-configured, NCEM-enabled fill cell; an M1-side-to-side-short-configured, NCEM-enabled fill cell; an M1-V0-side-to-side-short-configured, NCEM-enabled fill cell; a GATE-snake-open-configured, NCEM-enabled fill cell; an M1-snake-open-configured, NCEM-enabled fill cell; an M1-V0-AACNT-snake-open-configured, NCEM-enabled fill cell; an M1-stitch-open-configured, NCEM-enabled fill cell; a GATECNT-tip-to-side-short-configured, NCEM-enabled fill cell; an M1-tip-to-side-short-configured, NCEM-enabled fill cell; an AA-tip-to-tip-short-configured, NCEM-enabled fill cell; a GATECNT-tip-to-tip-short-configured, NCEM-enabled fill cell; and an M1-tip-to-tip-short-configured, NCEM-enabled fill cell.
To provide a more complete understanding of the present disclosure and features and advantages thereof, reference is made to the following set of figures, taken in conjunction with the accompanying description, in which:
[Note regarding the figures in this application, as well as in the '463 provisional application: Those figures numbered 52[A,B,C], 53[A,B,C], et seq. are to-scale layouts of the exemplified cells. While certain detail in these layouts may be difficult to see on the application or patent as published, persons skilled in the art will appreciate that the SCORE tab in USPTO's Public PAIR system provides access to the applicant's PDF drawings, as originally uploaded, which can be electronically downloaded and blown up to reveal any level of desired detail.]
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
As persons skilled in the art will appreciate, the configurations of
Reference is now made to
The substrate preferably comprises a wafer, die, or other portion of monocrystalline silicon, or another substrate suitable for forming semiconductor devices, such as silicon-on-insulator (SOI), Ge, C, GaAs, InP, GaInAs, AlAs, GaSb, (Ga,Mn)As, GaP, GaN, InAS, SiGe, SiSn, CdSe, CdTe, CdHgTe, ZnS, SiC, etc. Generally speaking, the substrate represents the object to which manufacturing steps (e.g., deposition, masking, etching, implantation) are initially applied, and is the object within which, or upon which, switching devices (e.g., FETs, bipolar transistors, photodiodes, magnetic devices, etc.) or storage devices (e.g., charged oxides, capacitors, phase change memories, etc.) are built.
The connector stack is a collection of multiple layers, generally formed on top of the substrate, that supports localized connections between devices in, or on, the substrate, and/or connections to wires in an interconnect stack located above. The layers that make up the connector stack need not be strictly “stacked”; some can be partially or fully co-planar. For example, as illustrated in
The connector stack supports various types of “connectors” and “jumpers,” as illustrated in
Above the connector stack lies the interconnect stack. The interconnect stack is comprised of conductive wiring layers (labeled “m1,” “m2,” etc.—that need only be conductive, not necessarily metallic) with conductive vias (labeled “v1,” “v2,” etc.) that connect adjacent wiring layers. While three wiring layers are shown in
Reference is now made to
The vendor-independent layers of
Indicated in parentheses are the names used to label these layers in
Persons skilled in the art will also understand that most of the above layers can—and often are—rendered in multiple patterning steps. Typically, in this application, the drawings will combine all exposures into a single depicted layer (e.g., M1=M1E1+M1E2, or M1E1+M1E2+M1E3). In most cases, such details are irrelevant to the operation of the invention, and are determined largely by requirements of the fabrication process. In certain cases (e.g., an M1-M1-stitch-overlap-open-configured, NCEM-enabled fill cell), some potentially relevant detail(s) may be obscured by the exposure merging; however, such obscured detail(s) will nonetheless be readily apparent to the skilled artisan (by, for example, the fact that the named structure, e.g., M1-M1-stitch-overlap-open-configured, NCEM-enabled fill cell, must contain at least one overlap test region, as per
Furthermore, short-configured cells can exist in both “same color” and “different color” varieties. For example, in a process that uses multi-patterned M1, the M1-tip-to-tip-configured, NCEM-enabled fill cells would come in two varieties: M1-tip-to-tip-same-color-short-configured cells, as well as M1-tip-to-tip-different-color-short-configured cells. The same applies to other short configurations, such as side-to-side, diagonal, etc.
Reference is now made to
Design of the NCEM-Enabled Fill Cells:
Such fill cells preferably have certain common elements (e.g., height, supply rails, and GATE pitch (CPP) that is consistent with standard cells in the library), then vary according to the measurement type, layer(s) involved, and structure(s) to be evaluated/tested. NCEM-enabled fill cells come in two basic types: short[/leakage] and open[/resistance]. Relevant layers typically involve either a single process layer (e.g., GATE-to-GATE) or two process layers (e.g. GATECNT-to-GATE). Structural configurations are many, and include a set of standard structures (e.g., tip-to-tip, tip-to-side, side-to-side, etc.), as well as reference or ad hoc structures.
As depicted in
As depicted in
In cases where the NCEM-enabled fill cells will be used with a highly regular style cell library, an additional constraint on the NCEM-enabled fill cells is that they preferably conform, as closely as reasonably possible, to the regular patterns used for the library's functional cells. Preferred methods for measuring compliance with regular patterns, and/or constructing pattern-compliant cells, are described in U.S. Pat. Applic. Nos. 61/887,271 (“Template Based Design with LibAnalyzer”) and 62/186,677 (“Template Based Design with LibAnalyzer”), both to Langnese et al., and both incorporated by reference herein. As those skilled in the art will appreciate, close, if not perfect, pattern compliance is feasible for those portions of the fill cell that do not affect the structure(s) or fail mode(s) to be evaluated. In general, however, perfect pattern compliance will prove infeasible for a several reasons. First, the structure to-be-evaluated may not, itself, be an “allowable” pattern (e.g., the pattern rules for the library may not allow any structure that spaces a GATE tip from a GATECNT side at minimum design rule dimensions, thus dictating that the “GATE-GATECNT-tip-to-side-short-configured, NCEM-enabled fill cell” will necessarily include at least one pattern violation). Second, DOEs typically involve several small variations in at least one minimum-spaced dimension, whereas regular patterning rules will typically only permit one of the variants. And third, the patterning used for the NCEM pad is preferably selected to match the operational capabilities of the scanner, but may well violate the library's pattern regularity constraints. Thus, ignoring these “necessary” pattern regularity violations, NCEM-enabled fill cells for use with highly regular libraries will preferably contain very few, if any, additional pattern regularity violations.
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
At FF2, processing of wafers is initiated using the initial product masks. Such processing preferably includes at least FEOL and/or MOL processing, but may also include BEOL processing. Before FF3, NCEM measurements are preferably obtained from some or all of the NCEM-enabled fill cells on the partially-processed initial product wafers.
At FF3, some or all of the obtained NCEM measurements are “used” to continue processing of the initial product wafers. Such “use” may include determining whether to continue or abandon processing of one or more of the wafers, modifying one or more processing, inspection or metrology steps in the continued processing of one or more of the wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures), and/or performing additional processing, metrology or inspection steps on one or more of the wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures).
At FF4, final product masks are produced (or otherwise obtained) “using” at least some of the NCEM measurements obtained during the processing of initial product wafers. Here, such “use” preferably includes selecting and instantiating a second collection of NCEM-enabled fill cells that is better and/or optimally matched to failure modes observed during processing of the initial product wafers. For example, if the first collection of NCEM-enabled fill cells included GATE-side-to-side-short-configured cells, yet no GATE side-to-side shorts were observed during processing of the initial product wafers, then the second collection of NCEM-enabled fill cells would preferably omit GATE-side-to-side-short-configured cells, and instead replace them with other NCEM-enabled fill cells that are better matched to the observed or expected failure modes on the final product wafers.
At FF5, processing of wafers is initiated using the final product masks. Such processing preferably includes at least FEOL and/or MOL processing, but may also include BEOL processing. Before FF6, NCEM measurements are preferably obtained from some or all of the NCEM-enabled fill cells on the partially-processed final product wafers.
At FF6, some or all of the obtained NCEM measurements are “used” to continue processing of the final product wafers. Such “use” may include determining whether to continue or abandon processing of one or more of the wafers, modifying one or more processing, inspection or metrology steps in the continued processing of one or more of the wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures), and/or performing additional processing, metrology or inspection steps on one or more of the wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures).
Reference is now made to
Reference is now made to
At GG2, processing of the test wafer(s) is initiated. Such processing preferably includes FEOL and/or MOL processing, but may also include BEOL processing.
At GG3, NCEM measurements are obtained from NCEM-enabled fill cells on the partially-processed test wafer(s).
At GG4, the obtained measurements are “used” to select a second collection of NCEM-enabled fill cells (preferably a subset of the first collection) for instantiation on product wafers. Here, such “use” preferably includes selecting a second collection of NCEM-enabled fill cells that, given the available fill cell space on the product wafers, is optimally matched to failure modes observed during processing of the test product wafers. For example, if the first collection of NCEM-enabled fill cells included GATE-side-to-side-short-configured cells, yet no GATE side-to-side shorts were observed during processing of test wafers, then the second collection of NCEM-enabled fill cells would preferably omit GATE-side-to-side-short-configured cells.
At GG5, product masks that include the second collection of NCEM-enabled fill cells are produced, or otherwise obtained.
At GG6, processing of the product wafer(s) is initiated. Such processing preferably includes at least FEOL and/or MOL processing, but may also include BEOL processing. Prior to GG7, NCEM measurements are obtained from at least some of the NCEM-enabled fill cells on the partially-processed product wafer(s).
At GG7, some or all of the obtained NCEM measurements are “used” to continue processing of the product wafer(s). Such “use” may include determining whether to continue or abandon processing of one or more of the product wafers, modifying one or more processing, inspection or metrology steps in the continued processing of one or more of the product wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures), and/or performing additional processing, metrology or inspection steps on one or more of the product wafers (and/or other product wafers currently being manufactured using process flows relevant to observed manufacturing failures).
In certain embodiments, FF1-3 and/or GG5-7 could be practiced as stand-alone process flows.
Reference is now made to
M1 snake open. In the depicted configuration, a passing response is grounded metal=bright NCEM, whereas a failing response is floating pad=dark NCEM.
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Reference is now made to
Parent FIGS. 160-162 depict three variants of the same cell. Parent FIGS. 161(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 163-165 depict three variants of the same cell. Parent FIGS. 164(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 166-168 depict three variants of the same cell. Parent FIGS. 167(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 169-171 depict three variants of the same cell. Parent FIGS. 170(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 172-173 depict two variants of the same cell. Parent FIGS. 173(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 174-175 depict two variants of the same cell. Parent FIGS. 175(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 176-177 depict two variants of the same cell. Parent FIGS. 177(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 178-179 depict two variants of the same cell. Parent FIGS. 179(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 180-181 depict two variants of the same cell. Parent FIGS. 181(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 182-183 depict two variants of the same cell. Parent FIGS. 183(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 184-185 depict two variants of the same cell. Parent FIGS. 184(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 191-193 depict three variants of the same cell. Parent FIGS. 192(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 194-196 depict three variants of the same cell. Parent FIGS. 195(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 197-199 depict three variants of the same cell. Parent FIGS. 198(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 200-202 depict three variants of the same cell. Parent FIGS. 201(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 203-205 depict three variants of the same cell. Parent FIGS. 204(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 206-208 depict three variants of the same cell. Parent FIGS. 207(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 209-211 depict three variants of the same cell. Parent FIGS. 210(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 212-214 depict three variants of the same cell. Parent FIGS. 213(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 215-217 depict three variants of the same cell. Parent FIGS. 216(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 218-220 depict three variants of the same cell. Parent FIGS. 219(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 221-223 depict three variants of the same cell. Parent FIGS. 222(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 224-226 depict three variants of the same cell. Parent FIGS. 225(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 227-229 depict three variants of the same cell. Parent FIGS. 228(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 230-232 depict three variants of the same cell. Parent FIGS. 231(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 233-235 depict three variants of the same cell. Parent FIGS. 234(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 236-238 depict three variants of the same cell. Parent FIGS. 237(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 239-241 depict three variants of the same cell. Parent FIGS. 240(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 242-244 depict three variants of the same cell. Parent FIGS. 243(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 245-247 depict three variants of the same cell. Parent FIGS. 246(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 248-250 depict three variants of the same cell. Parent FIGS. 249(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 251-253 depict three variants of the same cell. Parent FIGS. 252(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 254-256 depict three variants of the same cell. Parent FIGS. 255(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 257-259 depict three variants of the same cell. Parent FIGS. 258(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 260-262 depict three variants of the same cell. Parent FIGS. 261(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 263-265 depict three variants of the same cell. Parent FIGS. 264(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 266-268 depict three variants of the same cell. Parent FIGS. 267(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 269-271 depict three variants of the same cell. Parent FIGS. 219(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 272-274 depict three variants of the same cell. Parent FIGS. 273(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 275-277 depict three variants of the same cell. Parent FIGS. 276(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 278-280 depict three variants of the same cell. Parent FIGS. 279(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 281-283 depict three variants of the same cell. Parent FIGS. 2821(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 284-286 depict three variants of the same cell. Parent FIGS. 285(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 363-365 depict three variants of the same cell. Parent FIGS. 363(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 366-368 depict three variants of the same cell. Parent FIGS. 367(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 369-371 depict three variants of the same cell. Parent FIGS. 369(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 372-374 depict three variants of the same cell. Parent FIGS. 372(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 377-379 depict three variants of the same cell. Parent FIGS. 378(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 380-382 depict three variants of the same cell. Parent FIGS. 381(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 383-385 depict three variants of the same cell. Parent FIGS. 384(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 386-388 depict three variants of the same cell. Parent FIGS. 387(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 389-391 depict three variants of the same cell. Parent FIGS. 390(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 392-394 depict three variants of the same cell. Parent FIGS. 393(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 395-397 depict three variants of the same cell. Parent FIGS. 396(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 398-400 depict three variants of the same cell. Parent FIGS. 399(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 401-403 depict three variants of the same cell. Parent FIGS. 402(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 404-406 depict three variants of the same cell. Parent FIGS. 405(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 407-409 depict three variants of the same cell. Parent FIGS. 408(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 410-412 depict three variants of the same cell. Parent FIGS. 411(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 413-415 depict three variants of the same cell. Parent FIGS. 414(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 476-477 depict two variants of the same cell. Parent FIGS. 477(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 478-479 depict two variants of the same cell. Parent FIGS. 479(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 480-481 depict two variants of the same cell. Parent FIGS. 481(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 482-483 depict two variants of the same cell. Parent FIGS. 483(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 487-489 depict three variants of the same cell. Parent FIGS. 488(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 492-494 depict three variants of the same cell. Parent FIGS. 493(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 519-533 depict variants of the same cell. Parent FIGS. 519(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 522-536 depict variants of the same cell. Parent FIGS. 522(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 525-539 depict variants of the same cell. Parent FIGS. 525(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 528-542 depict variants of the same cell. Parent FIGS. 528(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 543-545 depict three variants of the same cell. Parent FIGS. 544(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 546-548 depict three variants of the same cell. Parent FIGS. 547(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 549-551 depict three variants of the same cell. Parent FIGS. 550(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 552-554 depict three variants of the same cell. Parent FIGS. 553(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 599-601 depict three variants of the same cell. Parent FIGS. 600(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 602-604 depict three variants of the same cell. Parent FIGS. 603(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 605-607 depict three variants of the same cell. Parent FIGS. 606(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 608-610 depict three variants of the same cell. Parent FIGS. 609(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 611-613 depict three variants of the same cell. Parent FIGS. 612(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 614-616 depict three variants of the same cell. Parent FIGS. 615(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 617-619 depict three variants of the same cell. Parent FIGS. 618(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 621-623 depict three variants of the same cell. Parent FIGS. 622(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 624-626 depict three variants of the same cell. Parent FIGS. 625(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 627-629 depict three variants of the same cell. Parent FIGS. 628(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 630-632 depict three variants of the same cell. Parent FIGS. 631(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 668-670 depict three variants of the same cell. Parent FIGS. 669(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 756-758 depict three variants of the same cell. Parent FIGS. 757(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 759-760 depict two variants of the same cell. Parent FIGS. 759(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 762-764 depict three variants of the same cell. Parent FIGS. 764(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 765-767 depict three variants of the same cell. Parent FIGS. 766(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 768-770 depict three variants of the same cell. Parent FIGS. 769(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 771-773 depict three variants of the same cell. Parent FIGS. 772(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 774-776 depict three variants of the same cell. Parent FIGS. 774(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 777-779 depict three variants of the same cell. Parent FIGS. 779(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 780-782 depict three variants of the same cell. Parent FIGS. 780(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 783-785 depict three variants of the same cell. Parent FIGS. 785(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 799-801 depict three variants of the same cell. Parent FIGS. 800(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 802-804 depict three variants of the same cell. Parent FIGS. 803(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 805-807 depict three variants of the same cell. Parent FIGS. 806(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 808-810 depict three variants of the same cell. Parent FIGS. 809(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 811-813 depict three variants of the same cell. Parent FIGS. 812(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 814-816 depict three variants of the same cell. Parent FIGS. 815(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 817-819 depict three variants of the same cell. Parent FIGS. 818(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 820-822 depict three variants of the same cell. Parent FIGS. 821(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 830-832 depict three variants of the same cell. Parent FIGS. 831(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 860-862 depict three variants of the same cell. Parent FIGS. 861(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 863-865 depict three variants of the same cell. Parent FIGS. 864(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 866-867 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 868-869 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 870-872 depict three variants of the same cell. Parent FIGS. 871(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 873-875 depict three variants of the same cell. Parent FIGS. 874(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 876-878 depict three variants of the same cell. Parent FIGS. 877(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 880-882 depict three variants of the same cell. Parent FIGS. 881(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 883-885 depict three variants of the same cell. Parent FIGS. 884(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 886-888 depict three variants of the same cell. Parent FIGS. 887(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 889-891 depict three variants of the same cell. Parent FIGS. 890(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 892-894 depict three variants of the same cell. Parent FIGS. 893(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 895-897 depict three variants of the same cell. Parent FIGS. 896(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 898-900 depict three variants of the same cell. Parent FIGS. 899(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 901-903 depict three variants of the same cell. Parent FIGS. 902(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1003-1005 depict three variants of the same cell. Parent FIGS. 1004(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1006-1008 depict three variants of the same cell. Parent FIGS. 1007(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1009-1011 depict three variants of the same cell. Parent FIGS. 1010(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1081-1082 depict two variants of the same cell. Parent FIGS. 1081(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1096-1098 depict three variants of the same cell. Parent FIGS. 1097(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1099-1101 depict three variants of the same cell. Parent FIGS. 1100(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1102-1104 depict three variants of the same cell. Parent FIGS. 1103(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1105-1107 depict three variants of the same cell. Parent FIGS. 1106(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1108-1110 depict three variants of the same cell. Parent FIGS. 1109(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1111-1113 depict three variants of the same cell. Parent FIGS. 1112(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1114-1116 depict three variants of the same cell. Parent FIGS. 1115(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1117-1119 depict three variants of the same cell. Parent FIGS. 1118(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1138-1140 depict three variants of the same cell. Parent FIGS. 1139(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1141-1143 depict three variants of the same cell. Parent FIGS. 1142(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1144-1145 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 1146-1147 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 1150-1152 depict three variants of the same cell. Parent FIGS. 1151(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1153-1155 depict three variants of the same cell. Parent FIGS. 1154(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1156-1158 depict three variants of the same cell. Parent FIGS. 1157(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1159-1161 depict three variants of the same cell. Parent FIGS. 1160(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1162-1164 depict three variants of the same cell. Parent FIGS. 1163(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1165-1167 depict three variants of the same cell. Parent FIGS. 1166(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1168-1170 depict three variants of the same cell. Parent FIGS. 1169(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1171-1173 depict three variants of the same cell. Parent FIGS. 1172(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1174-1176 depict three variants of the same cell. Parent FIGS. 1175(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1177-1179 depict three variants of the same cell. Parent FIGS. 1178(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1189-1191 depict three variants of the same cell. Parent FIGS. 1190(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1192-1194 depict three variants of the same cell. Parent FIGS. 1193(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1195-1197 depict three variants of the same cell. Parent FIGS. 1196(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1198-1200 depict three variants of the same cell. Parent FIGS. 1199(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1201-1203 depict two variants of the same cell. Parent FIGS. 1202(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1204-1206 depict three variants of the same cell. Parent FIGS. 1205(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1207-1209 depict three variants of the same cell. Parent FIGS. 1207(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1210-1212 depict three variants of the same cell. Parent FIGS. 1210(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1213-1215 depict three variants of the same cell. Parent FIGS. 1213(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1216-1218 depict three variants of the same cell. Parent FIGS. 1216(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1219-1221 depict three variants of the same cell. Parent FIGS. 1220(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1222-1224 depict three variants of the same cell. Parent FIGS. 1223(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1225-1227 depict three variants of the same cell. Parent FIGS. 1226(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1228-1230 depict three variants of the same cell. Parent FIGS. 1229(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1231-1233 depict three variants of the same cell. Parent FIGS. 1232(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1236-1238 depict three variants of the same cell. Parent FIGS. 1237(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1239-1242 depict variants of the same cell. Parent FIGS. 1242(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1240-1241 depict two variants of the same cell. Parent FIGS. 1240(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1249-1251 depict three variants of the same cell. Parent FIGS. 1250(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1252-1254 depict three variants of the same cell. Parent FIGS. 1253(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1255-1257 depict three variants of the same cell. Parent FIGS. 1256(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1258-1260 depict three variants of the same cell. Parent FIGS. 1259(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1261-1263 depict three variants of the same cell. Parent FIGS. 1262(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1293-1294 depict two variants of the same cell. Parent FIGS. 1294(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1295-1296 depict two variants of the same cell. Parent FIGS. 1296(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1367-1368 depict two variants of the same cell. Parent FIGS. 1368(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1369-1370 depict two variants of the same cell. Parent FIGS. 1370(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1371-1372 depict two variants of the same cell. Parent FIGS. 1372(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1373-1375 depict three variants of the same cell. Parent FIGS. 1374(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1376-1377 depict two variants of the same cell. Parent FIGS. 1377(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1378-1379 depict two variants of the same cell. Parent FIGS. 1379(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1386-1387 depict two variants of the same cell. Parent FIGS. 1386(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1388-1389 depict two variants of the same cell. Parent FIGS. 1389(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1390-1391 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 1392-1394 depict three variants of the same cell. Parent FIGS. 1392(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1399-1401 depict three variants of the same cell. Parent FIGS. 1400(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1402-1404 depict three variants of the same cell. Parent FIGS. 1403(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1406-1407 depict two variants of the same cell. Parent FIGS. 1407(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1410-1412 depict three variants of the same cell. Parent FIGS. 1411(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1451-1452 depict two variants of the same cell. Parent FIGS. 1452(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1456-1458 depict three variants of the same cell. Parent FIGS. 1457(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1510-1512 depict three variants of the same cell. Parent FIGS. 1511(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1513-1515 depict three variants of the same cell. Parent FIGS. 1514(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1516-1518 depict three variants of the same cell. Parent FIGS. 1517(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1522-1524 depict three variants of the same cell. Parent FIGS. 1523(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1525-1527 depict three variants of the same cell. Parent FIGS. 1526(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1528-1530 depict three variants of the same cell. Parent FIGS. 1528(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1531-1533 depict three variants of the same cell. Parent FIGS. 1531(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1534-1536 depict three variants of the same cell. Parent FIGS. 1534(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1537-1539 depict three variants of the same cell. Parent FIGS. 1537(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1543-1545 depict three variants of the same cell. Parent FIGS. 1544(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1546-1548 depict three variants of the same cell. Parent FIGS. 1547(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1553-1554 depict two variants of the same cell. Parent FIGS. 1554(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1555-1556 depict two variants of the same cell. Parent FIGS. 1556(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1557-1559 depict three variants of the same cell. Parent FIGS. 1558(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1560-1562 depict three variants of the same cell. Parent FIGS. 1561(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1563-1565 depict three variants of the same cell. Parent FIGS. 1564(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1566-1568 depict three variants of the same cell. Parent FIGS. 1567(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1569-1571 depict three variants of the same cell. Parent FIGS. 1570(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1572-1574 depict three variants of the same cell. Parent FIGS. 1573(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1575-1577 depict three variants of the same cell. Parent FIGS. 1576(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1578-1580 depict three variants of the same cell. Parent FIGS. 1579(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1581-1583 depict three variants of the same cell. Parent FIGS. 1582(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1584-1586 depict three variants of the same cell. Parent FIGS. 1585(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1587-1589 depict three variants of the same cell. Parent FIGS. 1588(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1590-1592 depict three variants of the same cell. Parent FIGS. 1591(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1593-1595 depict three variants of the same cell. Parent FIGS. 1594(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1596-1598 depict three variants of the same cell. Parent FIGS. 1597(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1599-1601 depict three variants of the same cell. Parent FIGS. 1600(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1602-1604 depict three variants of the same cell. Parent FIGS. 1603(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1605-1607 depict three variants of the same cell. Parent FIGS. 1606(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1608-1610 depict three variants of the same cell. Parent FIGS. 1609(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1611-1613 depict three variants of the same cell. Parent FIGS. 1612(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1614-1616 depict three variants of the same cell. Parent FIGS. 1615(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1617-1619 depict three variants of the same cell. Parent FIGS. 1618(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1620-1622 depict three variants of the same cell. Parent FIGS. 1621(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1623-1625 depict three variants of the same cell. Parent FIGS. 1624(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1626-1628 depict three variants of the same cell. Parent FIGS. 1627(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1646-1647 depict two variants of the same cell. Parent FIGS. 1646(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1648-1649 depict two variants of the same cell. Parent FIGS. 1648(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1650-1652 depict three variants of the same cell. Parent FIGS. 1651(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1653-1655 depict three variants of the same cell. Parent FIGS. 1654(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1656-1658 depict three variants of the same cell. Parent FIGS. 1657(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1659-1661 depict three variants of the same cell. Parent FIGS. 1660(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1663-1664 depict two variants of the same cell. Parent FIGS. 1663(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1665-1667 depict three variants of the same cell. Parent FIGS. 1666(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1669-1670 depict two variants of the same cell. Parent FIGS. 1669(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1671-1673 depict three variants of the same cell. Parent FIGS. 1672(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1674-1676 depict three variants of the same cell. Parent FIGS. 1675(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1677-1679 depict three variants of the same cell. Parent FIGS. 1678(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1680-1682 depict three variants of the same cell. Parent FIGS. 1681(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1687-1689 depict three variants of the same cell. Parent FIGS. 1688(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1690-1692 depict three variants of the same cell. Parent FIGS. 1691(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1693-1695 depict three variants of the same cell. Parent FIGS. 1694(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1696-1698 depict three variants of the same cell. Parent FIGS. 1697(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1715-1717 depict three variants of the same cell. Parent FIGS. 1716(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1718-1720 depict three variants of the same cell. Parent FIGS. 1719(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1800-1802 depict three variants of the same cell. Parent FIGS. 1801(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1813-1815 depict three variants of the same cell. Parent FIGS. 1814(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1816-1818 depict three variants of the same cell. Parent FIGS. 1817(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1819-1821 depict three variants of the same cell. Parent FIGS. 1820(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1822-1824 depict three variants of the same cell. Parent FIGS. 1823(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1825-1827 depict three variants of the same cell. Parent FIGS. 1826(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1828-1830 depict three variants of the same cell. Parent FIGS. 1829(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1831-1832 depict two variants of the same cell. Parent FIGS. 1831(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1833-1835 depict three variants of the same cell. Parent FIGS. 1833(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1836-1838 depict three variants of the same cell. Parent FIGS. 1836(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1839-1841 depict three variants of the same cell. Parent FIGS. 1839(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1842-1844 depict three variants of the same cell. Parent FIGS. 1842(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1845-1847 depict three variants of the same cell. Parent FIGS. 1845(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1848-1849 depict two variants of the same cell. Parent FIGS. 1848(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1850-1852 depict three variants of the same cell. Parent FIGS. 1850(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1853-1855 depict three variants of the same cell. Parent FIGS. 1853(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1856-1858 depict three variants of the same cell. Parent FIGS. 1856(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1859-1861 depict three variants of the same cell. Parent FIGS. 1859(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1867-1869 depict three variants of the same cell. Parent FIGS. 1868(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1870-1872 depict three variants of the same cell. Parent FIGS. 1871(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1873-1875 depict three variants of the same cell. Parent FIGS. 1874(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1876-1878 depict three variants of the same cell. Parent FIGS. 1877(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1879-1881 depict three variants of the same cell. Parent FIGS. 1880(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1882-1884 depict three variants of the same cell. Parent FIGS. 1883(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1885-1887 depict three variants of the same cell. Parent FIGS. 1886(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1888-1890 depict three variants of the same cell. Parent FIGS. 1889(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1891-1893 depict three variants of the same cell. Parent FIGS. 1892(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1894-1896 depict three variants of the same cell. Parent FIGS. 1895(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1897-1899 depict three variants of the same cell. Parent FIGS. 1898(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1900-1902 depict three variants of the same cell. Parent FIGS. 1901(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1903-1905 depict three variants of the same cell. Parent FIGS. 1904(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1906-1908 depict three variants of the same cell. Parent FIGS. 1907(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1909-1911 depict three variants of the same cell. Parent FIGS. 1910(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1912-1914 depict three variants of the same cell. Parent FIGS. 1913(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1915-1917 depict three variants of the same cell. Parent FIGS. 1916(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1918-1920 depict three variants of the same cell. Parent FIGS. 1919(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1921-1923 depict three variants of the same cell. Parent FIGS. 1922(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1924-1926 depict three variants of the same cell. Parent FIGS. 1925(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1927-1929 depict three variants of the same cell. Parent FIGS. 1928(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1930-1932 depict three variants of the same cell. Parent FIGS. 1931(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1933-1935 depict three variants of the same cell. Parent FIGS. 1934(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1936-1938 depict three variants of the same cell. Parent FIGS. 1937(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1939-1941 depict three variants of the same cell. Parent FIGS. 1940(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1943-1944 depict two variants of the same cell. Parent FIGS. 1943(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1945-1947 depict three variants of the same cell. Parent FIGS. 1946(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1948-1950 depict three variants of the same cell. Parent FIGS. 1949(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1951-1953 depict three variants of the same cell. Parent FIGS. 1952(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1954-1956 depict three variants of the same cell. Parent FIGS. 1955(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1957-1959 depict three variants of the same cell. Parent FIGS. 1958(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1960-1962 depict three variants of the same cell. Parent FIGS. 1961(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1963-1965 depict three variants of the same cell. Parent FIGS. 1964(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1966-1968 depict three variants of the same cell. Parent FIGS. 1967(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1969-1971 depict three variants of the same cell. Parent FIGS. 1970(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1972-1974 depict three variants of the same cell. Parent FIGS. 1973(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1975-1977 depict three variants of the same cell. Parent FIGS. 1976(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1978-1980 depict three variants of the same cell. Parent FIGS. 1979(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1981-1983 depict three variants of the same cell. Parent FIGS. 1982(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1984-1986 depict three variants of the same cell. Parent FIGS. 1985(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1987-1989 depict three variants of the same cell. Parent FIGS. 1988(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1990-1993 depict variants of the same cell. Parent FIGS. 1991(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1994-1996 depict three variants of the same cell. Parent FIGS. 1995(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 1997-1999 depict three variants of the same cell. Parent FIGS. 1998(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2000-2002 depict three variants of the same cell. Parent FIGS. 2001(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2003-2005 depict three variants of the same cell. Parent FIGS. 2003(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2006-2008 depict three variants of the same cell. Parent FIGS. 2007(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2009-2011 depict three variants of the same cell. Parent FIGS. 2010(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2012-2014 depict three variants of the same cell. Parent FIGS. 2013(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2015-2017 depict three variants of the same cell. Parent FIGS. 2016(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2018-2020 depict three variants of the same cell. Parent FIGS. 2019(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2021-2023 depict three variants of the same cell. Parent FIGS. 2022(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2024-2026 depict three variants of the same cell. Parent FIGS. 2025(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2027-2029 depict three variants of the same cell. Parent FIGS. 2028(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2030-2032 depict three variants of the same cell. Parent FIGS. 2031(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2033-2035 depict three variants of the same cell. Parent FIGS. 2034(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2036-2038 depict three variants of the same cell. Parent FIGS. 2037(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2039-2041 depict three variants of the same cell. Parent FIGS. 2040(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2042-2044 depict three variants of the same cell. Parent FIGS. 2043(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2045-2047 depict three variants of the same cell. Parent FIGS. 2046(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2048-2050 depict three variants of the same cell. Parent FIGS. 2049(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2051-2053 depict three variants of the same cell. Parent FIGS. 2052(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2054-2056 depict three variants of the same cell. Parent FIGS. 2055(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2057-2059 depict three variants of the same cell. Parent FIGS. 2058(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2111-2113 depict three variants of the same cell. Parent FIGS. 2112(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2114-2116 depict three variants of the same cell. Parent FIGS. 2115(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2117-2118 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 2219-2220 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 2121-22123 depict three variants of the same cell. Parent FIGS. 2122(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2124-2126 depict three variants of the same cell. Parent FIGS. 2125(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2127-2129 depict three variants of the same cell. Parent FIGS. 2128(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2130-2132 depict three variants of the same cell. Parent FIGS. 2131(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2133-2135 depict three variants of the same cell. Parent FIGS. 2133(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2136-2138 depict two variants of the same cell. Parent FIGS. 2136(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2138-2139 depict two variants of the same cell. Parent FIGS. 2138(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2140-2141 depict two variants of the same cell. Parent FIGS. 2140(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2142-2143 depict two variants of the same cell. Parent FIGS. 2142(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2144-2145 depict two variants of the same cell. Parent FIGS. 2144(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2146-2147 depict two variants of the same cell. Parent FIGS. 2146(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2148-2150 depict three variants of the same cell. Parent FIGS. 2148(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2151-2153 depict three variants of the same cell. Parent FIGS. 2151(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2154-2156 depict three variants of the same cell. Parent FIGS. 2154(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2157-2159 depict three variants of the same cell. Parent FIGS. 2158(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2160-2162 depict three variants of the same cell. Parent FIGS. 2161(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2163-2165 depict three variants of the same cell. Parent FIGS. 2164(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2166-2168 depict three variants of the same cell. Parent FIGS. 2167(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2171-2173 depict three variants of the same cell. Parent FIGS. 2172(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2174-2176 depict three variants of the same cell. Parent FIGS. 2175(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2177-2179 depict three variants of the same cell. Parent FIGS. 2178(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2180-2182 depict three variants of the same cell. Parent FIGS. 2181(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2183-2185 depict three variants of the same cell. Parent FIGS. 2184(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2186-2188 depict three variants of the same cell. Parent FIGS. 2187(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2189-2191 depict three variants of the same cell. Parent FIGS. 2190(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2192-2194 depict three variants of the same cell. Parent FIGS. 2193(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2195-2197 depict three variants of the same cell. Parent FIGS. 2196(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2200-2202 depict three variants of the same cell. Parent FIGS. 2201(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2203-2205 depict three variants of the same cell. Parent FIGS. 2204(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2206-2208 depict three variants of the same cell. Parent FIGS. 2207(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2209-2211 depict three variants of the same cell. Parent FIGS. 2210(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2212-2214 depict three variants of the same cell. Parent FIGS. 2213(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2215-2217 depict three variants of the same cell. Parent FIGS. 2216(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2218-2220 depict three variants of the same cell. Parent FIGS. 2219(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2221-2223 depict three variants of the same cell. Parent FIGS. 2222(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2224-2226 depict three variants of the same cell. Parent FIGS. 2225(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2227-2229 depict three variants of the same cell. Parent FIGS. 2228(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2230-2232 depict three variants of the same cell. Parent FIGS. 2231(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2233-2235 depict three variants of the same cell. Parent FIGS. 2234(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2236-2238 depict three variants of the same cell. Parent FIGS. 2237(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2239-2241 depict three variants of the same cell. Parent FIGS. 2240(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2242-2244 depict three variants of the same cell. Parent FIGS. 2243(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2245-2247 depict three variants of the same cell. Parent FIGS. 2246(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2248-2250 depict three variants of the same cell. Parent FIGS. 2249(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2251-2253 depict three variants of the same cell. Parent FIGS. 2252(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2254-2256 depict three variants of the same cell. Parent FIGS. 2255(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2257-2259 depict three variants of the same cell. Parent FIGS. 2258(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2260-2262 depict three variants of the same cell. Parent FIGS. 2261(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2263-2265 depict three variants of the same cell. Parent FIGS. 2264(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2266-2268 depict three variants of the same cell. Parent FIGS. 2267(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2269-2271 depict three variants of the same cell. Parent FIGS. 2270(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2272-2274 depict three variants of the same cell. Parent FIGS. 2273(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2275-2277 depict three variants of the same cell. Parent FIGS. 2276(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2278-2280 depict three variants of the same cell. Parent FIGS. 2279(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2281-2282 depict two variants of the same cell. Parent FIGS. 2282(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2283-2285 depict three variants of the same cell. Parent FIGS. 2284(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2286-2288 depict three variants of the same cell. Parent FIGS. 2287(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2289-2290 depict two variants of the same cell. Parent FIGS. 2290(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2291-2293 depict three variants of the same cell. Parent FIGS. 2292(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2294-2296 depict three variants of the same cell. Parent FIGS. 2295(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2297-2299 depict three variants of the same cell. Parent FIGS. 2298(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2300-2302 depict three variants of the same cell. Parent FIGS. 2301(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2303-2305 depict three variants of the same cell. Parent FIGS. 2304(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2306-2308 depict three variants of the same cell. Parent FIGS. 2307(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2309-2311 depict three variants of the same cell. Parent FIGS. 2310(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2312-2314 depict three variants of the same cell. Parent FIGS. 2313(A)-(B) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2345-2347 depict three variants of the same cell. Parent FIGS. 2346(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2348-2350 depict three variants of the same cell. Parent FIGS. 2349(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2351-2353 depict three variants of the same cell. Parent FIGS. 2351(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2354-2356 depict three variants of the same cell. Parent FIGS. 2354(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2357-2359 depict three variants of the same cell. Parent FIGS. 2358(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2360-2362 depict three variants of the same cell. Parent FIGS. 2361(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2363-2365 depict three variants of the same cell. Parent FIGS. 2364(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2366-2368 depict three variants of the same cell. Parent FIGS. 2367(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2369-2371 depict three variants of the same cell. Parent FIGS. 2370(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2372-2374 depict three variants of the same cell. Parent FIGS. 2373(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2375-2377 depict three variants of the same cell. Parent FIGS. 2376(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2378-2380 depict three variants of the same cell. Parent FIGS. 2379(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2381-2383 depict three variants of the same cell. Parent FIGS. 2382(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2384-2386 depict three variants of the same cell. Parent FIGS. 2385(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2387-2389 depict three variants of the same cell. Parent FIGS. 2388(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2390-2392 depict three variants of the same cell. Parent FIGS. 2391(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2399-2401 depict three variants of the same cell. Parent FIGS. 2399(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2402-2403 depict two variants of the same cell. The figure set represents intentionally misaligned conditions.
Parent FIGS. 2404-2406 depict three variants of the same cell. Parent FIGS. 2405(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2407-2409 depict three variants of the same cell. Parent FIGS. 2408(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2410-2412 depict three variants of the same cell. Parent FIGS. 2411(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2413-2415 depict three variants of the same cell. Parent FIGS. 2414(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2416-2418 depict three variants of the same cell. Parent FIGS. 2417(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2419-2421 depict three variants of the same cell. Parent FIGS. 2420(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2422-2424 depict three variants of the same cell. Parent FIGS. 2423(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2425-2427 depict three variants of the same cell. Parent FIGS. 2426(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2428-2430 depict three variants of the same cell. Parent FIGS. 2429(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2431-2433 depict three variants of the same cell. Parent FIGS. 2432(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2434-2436 depict three variants of the same cell. Parent FIGS. 2435(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2437-2439 depict three variants of the same cell. Parent FIGS. 2438(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2442-2444 depict three variants of the same cell. Parent FIGS. 2443(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2445-2447 depict three variants of the same cell. Parent FIGS. 2446(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2448-2450 depict three variants of the same cell. Parent FIGS. 2449(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2451-2453 depict three variants of the same cell. Parent FIGS. 2452(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2454-2456 depict three variants of the same cell. Parent FIGS. 2455(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 2457-2459 depict three variants of the same cell. Parent FIGS. 2458(A)-(C) show the nominal case, whereas the other figures represent intentionally misaligned conditions.
Parent FIGS. 203-223, 236-286, 389-397, 404-409, 485-494, 546-548, 552-554, 621-632, 682, 691, 731-734, 762-785, 848-859, 880-903, 1014-1040, 1096-1119, 1189-1200, 1222-1224, 1234-1238, 1249-1263, 1543-1548, 1687-1698, 1870-1872, 1876-1881, 1885-1902, 1912-1947, 1954-1980, 1984-1993, 2003-2005, 2157-2314, 2343-2344, 2357-2374, and 2404-2461 show depictions of NCEM-enabled fill cells without NCEM pads. Persons skilled in the art will understand that pads of any design (e.g.,
Certain of the claims that follow may contain one or more means-plus-function limitations of the form, “a <cell name> means for enabling NC detection of a GATE-tip-to-tip short.” It is applicant's intent that such limitations be construed, pursuant to 35 U.S.C. §112(f), as “the structure of the named cell, or an equivalent structure, that enables detection of a GATE-tip-to-tip short by non-contact measurement.”
Additionally, certain of the claims that follow may contain one or more step-plus-function limitations of the form, “a <cell name> step for enabling NC detection of a GATE-tip-to-tip short.” It is applicant's intent that such limitations be construed, pursuant to 35 U.S.C. §112(f), as “enabling voltage contrast detection of a GATE-tip-to-tip short by patterning an instance of the named cell, or an equivalent cell.”
While the invention has been illustrated with respect to one or more specific implementations, numerous alterations and/or modifications can be made to the illustrated examples without departing from the spirit and scope of the appended claims. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms “including,” “includes,” “having,” “has,” “with,” or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.” As used herein, the phrase “X comprises one or more of A, B, and C” means that X can include any of the following: either A, B, or C alone; or combinations of two, such as A and B, B and C, and A and C; or combinations of three A, B and C.
This application is a continuation of U.S. patent application Ser. No. 15/090,256, entitled “Integrated Circuit Containing DOEs of NCEM-enabled Fill Cells,” filed Apr. 4, 2016, by applicant PDF Solutions, Inc., which '256 application is incorporated by reference herein. This application is also a continuation of U.S. patent application Ser. No. 15/090,267, entitled “Process for Making Semiconductor Dies, Chips, and Wafers Using In-Line Measurements Obtained From DOEs of NCEM-enabled Fill Cells,” filed Apr. 4, 2016, by applicant PDF Solutions, Inc., which '267 application is incorporated by reference herein. This application is also a continuation of U.S. patent application Ser. No. 15/090,274, entitled “Mesh-Style NCEM Pads, and Process for Making Semiconductor Dies, Chips, and Wafers Using In-Line Measurements from Such Pads,” filed Apr. 4, 2016, by applicant PDF Solutions, Inc., which '274 application is incorporated by reference herein. The above-incorporated '256, '267, and '274 applications are referred to herein as the “Parent Applications,” while the set of figures contained in each of the the Parent Applications are referred to herein as the “Parent FIGS.” This application also claims priority from U.S. Pat. Applic. Ser. 62/268,463, entitled “Integrated Circuit Containing DOEs of NCEM-enabled Fill Cells+Process for Making Semiconductor Dies, Chips, and Wafers Using In-Line Measurements Obtained From DOEs of NCEM-enabled Fill Cells,” filed Dec. 16, 2015, which '463 application is incorporated by reference herein.
Number | Name | Date | Kind |
---|---|---|---|
5008727 | Katsura et al. | Apr 1991 | A |
5576223 | Zeininger et al. | Nov 1996 | A |
5576833 | Miyoshi et al. | Nov 1996 | A |
5773315 | Jarvis | Jun 1998 | A |
5959459 | Satya et al. | Sep 1999 | A |
6061814 | Sugasawara et al. | May 2000 | A |
6091249 | Talbot et al. | Jul 2000 | A |
6236222 | Sur, Jr. et al. | May 2001 | B1 |
6297644 | Jarvis et al. | Oct 2001 | B1 |
6348808 | Yakura | Feb 2002 | B1 |
6388315 | Clark et al. | May 2002 | B1 |
6433561 | Satya et al. | Aug 2002 | B1 |
6452412 | Jarvis et al. | Sep 2002 | B1 |
6509197 | Satya et al. | Jan 2003 | B1 |
6524873 | Satya et al. | Feb 2003 | B1 |
6539106 | Gallarda et al. | Mar 2003 | B1 |
6576923 | Satya et al. | Jun 2003 | B2 |
6633174 | Satya et al. | Oct 2003 | B1 |
6636064 | Satya et al. | Oct 2003 | B1 |
6771806 | Satya et al. | Aug 2004 | B1 |
6815345 | Zhao et al. | Nov 2004 | B2 |
6844550 | Yin et al. | Jan 2005 | B1 |
6861666 | Weiner et al. | Mar 2005 | B1 |
6897444 | Alder | May 2005 | B1 |
6949765 | Song et al. | Sep 2005 | B2 |
6967110 | Guldi et al. | Nov 2005 | B2 |
7026175 | Li et al. | Apr 2006 | B2 |
7101722 | Wang et al. | Sep 2006 | B1 |
7105436 | Zhao et al. | Sep 2006 | B2 |
7137092 | Maeda | Nov 2006 | B2 |
7198963 | Verma et al. | Apr 2007 | B2 |
7217579 | Ben-Porath et al. | May 2007 | B2 |
7223616 | Duan et al. | May 2007 | B2 |
7256055 | Aghababazadeh et al. | Aug 2007 | B2 |
7280945 | Weiner et al. | Oct 2007 | B1 |
7456636 | Patterson et al. | Nov 2008 | B2 |
7474107 | Patterson et al. | Jan 2009 | B2 |
7514681 | Marella et al. | Apr 2009 | B1 |
7518190 | Cote et al. | Apr 2009 | B2 |
7592827 | Brozek | Sep 2009 | B1 |
7642106 | Bae et al. | Jan 2010 | B2 |
7655482 | Satya et al. | Feb 2010 | B2 |
7656170 | Pinto et al. | Feb 2010 | B2 |
7679083 | Sun et al. | Mar 2010 | B2 |
7705666 | Hsu et al. | Apr 2010 | B1 |
7733109 | Ahsan et al. | Jun 2010 | B2 |
7736916 | Aghababazadeh et al. | Jun 2010 | B2 |
7739065 | Lee et al. | Jun 2010 | B1 |
7772866 | Patterson et al. | Aug 2010 | B2 |
7893703 | Rzepiela et al. | Feb 2011 | B2 |
7895548 | Lin et al. | Feb 2011 | B2 |
7902548 | Lim et al. | Mar 2011 | B2 |
7902849 | Bullock | Mar 2011 | B2 |
7930660 | Ruderer et al. | Apr 2011 | B2 |
7939348 | Lim et al. | May 2011 | B2 |
8001516 | Smith et al. | Aug 2011 | B2 |
8039837 | Patterson et al. | Oct 2011 | B2 |
8063402 | Sokel et al. | Nov 2011 | B2 |
8089297 | Xiao et al. | Jan 2012 | B2 |
8178876 | Hess et al. | May 2012 | B2 |
8339449 | Lim et al. | Dec 2012 | B2 |
8344745 | Aghababazadeh et al. | Jan 2013 | B2 |
8350583 | Cote et al. | Jan 2013 | B2 |
8399266 | Mo | Mar 2013 | B2 |
8421009 | Xiao | Apr 2013 | B2 |
8575955 | Brozek | Nov 2013 | B1 |
8754372 | Xiao | Jun 2014 | B2 |
8779400 | Shichi et al. | Jul 2014 | B2 |
8927989 | Arnold et al. | Jan 2015 | B2 |
9222969 | Liu et al. | Dec 2015 | B2 |
9653446 | Lam | May 2017 | B1 |
20020093350 | Yamada | Jul 2002 | A1 |
20040084671 | Song et al. | May 2004 | A1 |
20040133868 | Ichimiya | Jul 2004 | A1 |
20050272174 | Duan et al. | Dec 2005 | A1 |
20060164881 | Oki | Jul 2006 | A1 |
20060202231 | Yamamoto | Sep 2006 | A1 |
20070296435 | Eldridge et al. | Dec 2007 | A1 |
20080005712 | Charlebois | Jan 2008 | A1 |
20080246030 | Satya et al. | Oct 2008 | A1 |
20080267489 | Xiao et al. | Oct 2008 | A1 |
20080312875 | Yu et al. | Dec 2008 | A1 |
20090037131 | Hess et al. | Feb 2009 | A1 |
20090057664 | Lim et al. | Mar 2009 | A1 |
20090102501 | Guldi et al. | Apr 2009 | A1 |
20100055809 | Pak et al. | Mar 2010 | A1 |
20100258798 | Sokel et al. | Oct 2010 | A1 |
20110006794 | Sellathamby et al. | Jan 2011 | A1 |
20110013826 | Xiao | Jan 2011 | A1 |
20110080180 | Lavoie et al. | Apr 2011 | A1 |
20120139582 | Cocchi et al. | Jun 2012 | A1 |
20120286341 | Chen et al. | Nov 2012 | A1 |
20130020639 | Thompson et al. | Jan 2013 | A1 |
20130292633 | Pellizzer et al. | Nov 2013 | A1 |
20140151699 | Wu et al. | Jun 2014 | A1 |
20150270181 | De et al. | Sep 2015 | A1 |
20150356232 | Bomholt et al. | Dec 2015 | A1 |
20160086863 | Won et al. | Mar 2016 | A1 |
Number | Date | Country |
---|---|---|
WO03019456 | Mar 2003 | WO |
WO03034492 | Apr 2003 | WO |
WO03104921 | Dec 2003 | WO |
WO2004057649 | Jul 2004 | WO |
2005020297 | May 2005 | WO |
WO2006123281 | Nov 2006 | WO |
2009090516 | Aug 2009 | WO |
WO2015192069 | Dec 2015 | WO |
Entry |
---|
O.D. Patterson et al., “Voltage Contrast Test Structure for Measurement of Mask Misalignment,” Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI , pp. 334-340, Jul. 11, 2010. |
O.D. Patterson et al., “Test Structure and e-Beam Inspection Methodology for In-line Detection of (Non-visual) Missing Spacer Defects,” Advanced Semiconductor Manufacturing Conference, 2007 IEEE/SEMI , pp. 48-53, Jun. 11, 2007. |
H. Xiao et al., “Inspection of 32nm imprinted patterns with an advanced e-beam inspection system,” Proc. SPIE 7488, Photomask Technology 2009, Sep. 23, 2009. |
S.-M. Chon et al., “Development of Automated Contact Inspection System using In-line CD SEM,” 2001 IEEE International Semiconductor Manufacturing Symposium, Oct. 8, 2001. |
O.D. Patterson et al., “Rapid Reduction of Gate-Level Electrical Defectivity using Voltage Contrast Test Structures,” 2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, Mar. 31, 2003. |
J.-L. Baltzinger et al., “E-beam inspection of dislocations: product monitoring and process change validation,” IEEE Conference and Workshop Advanced Semiconductor Manufacturing, May 4, 2004. |
K. Mai et al., “SPC Based In-line Reticle Monitoring on Product Wafers,” 2005 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, Apr. 11, 2005. |
C. Holfeld et al., “Wafer Inspection as Alternative Approach to Mask Defect Qualification,” Proc. SPIE 6730, Photomask Technology 2007, Oct. 25, 2007. |
O.D. Patterson et al., “Detection of Resistive Shorts and Opens using Voltage Contrast Inspection,” 17th Annual SEMI/IEEE Advanced Semiconductor Manufacturing Conference, May 22, 2006. |
O.D. Patterson et al., “Enhancement of Voltage Contrast Inspection Signal Using Scan Direction,” International Symposium on Semiconductor Manufacturing, Oct. 15, 2007. |
O.D. Patterson et al., “In-Line Process Window Monitoring using Voltage Contrast Inspection,” IEEE/SEMI Advanced Semiconductor Manufacturing Conference, May 5, 2008. |
O.D. Patterson et al., “Methodology for Trench Capacitor Etch Optimization using Voltage Contrast Inspection and Special Processing,” ASMC 2010, Jul. 11, 2010. |
X.J. Zhou et al., “Characterization of Contact Module Failure Mechanisms for SOI Technology using E-beam Inspection and In-line TEM,” ASMC 2010, Jul. 11, 2010. |
H.-C. Liao et al., “Blind Contact Detection in the Irregularly Periphery Area Using Leap & Scan e-Beam Inspection,” Presentation Slides, International Symposium on Semiconductor Manufacturing (ISSM) and e-Manufacturing and Design Collaboration Symposium (eMDC), Sep. 5, 2011. |
C. Boye et al., “E-Beam Inspection for Combination Use of Defect Detection and CD Measurement,” 23rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), May 15, 2012. |
O.D. Patterson et al., “E-Beam Inspection for Detection of Sub-Design Rule Physical Defects,” ASMC 2012, May 15, 2012. |
O.D. Patterson et al., “Early Detection of Systematic Patterning Problems for a 22nm SOI Technology using E-Beam Hot Spot Inspection,” ASMC 2013, May 14, 2013. |
B. Donovan et al., “Early Detection of Electrical Defects in Deep Trench Capacitors using Voltage Contrast Inspection,” ASMC 2013, May 14, 2013. |
Presentation entitled, “tau-Metrix, Inc.: A Product Yield Enhancement Company,” 2009. |
Li, “Innovative E-Beam Applications for Advanced Technology Nano-defect Era,” SEMATECH Symposium Taiwan 2012, Oct. 18, 2012. |
T. Marwah, “System-on-Chip Design and Test with Embedded Debug Capabilities,” M.S. Thesis, Univ. of Tenn. at Knoxville, Aug. 2006. |
M. Bhushan et al., “Microelectronic Test Structures for CMOS Technology,” DOI 10.1007/978-1-4419-9377-9—1, (c) Springer Science+Business Media, LLC, 2011. |
M. Muehlberghuber et al., “Red Team vs. Blue Team Hardware Trojan Analysis: Detection of a Hardware Trojan on an Actual ASIC,” Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy, Jun. 24, 2013. |
R. J. Baker, “CMOS: circuit design, layout, and simulation,” 3rd ed., John Wiley & Sons, Inc., 2010. |
X. Meng et al., “Layout of Decoupling Capacitors in IP Blocks for 90-nm CMOS,” IEEE Trans. on VLSI, Oct. 3, 2008. |
W. T. Lee, “Engineering a Device for Electron-Beam Probing,” IEEE Design & Test of Computers, Jun. 1989. |
B. Vandewalle et al.,“Design technology co-optimization for a robust 10nm Metal1 solution for Logic design and SRAM,” Proc. SPIE, Mar. 28, 2014. |
A. J. Fixi et al., “Laser Stimulated Electron-Beam Prober for 15ps Resolution Internal Waveform Measurements of a 5 Gb/s ECL Circuit,” Reliability Physics Symposium, Mar. 23, 1993. |
J. M. Sebeson et al., “Noncontact Testing of Interconnections in Film Integrated Circuits Using an Electron Beam,” Reliability Physics Symposium, Apr. 1973. |
L. Remy et al., “Definition of an Innovative Filling Structure for Digital Blocks: the DFM Filler Cell,” ICECS 2009, Dec. 13, 2009. |
J. C. Eidson, “Fast electron-beam lithography: High blanking speeds may make this new system a serious challenger in producing submicrometer ICs,” IEEE Spectrum, Jul. 1981. |
M. T. Moreira, “Design and Implementation of a Standard Cell Library for Building Asynchronous ASICS,” Pontifícia Universidade Católica Do Rio Grande Do Sul, 2010. |
P. De Bisschop et al., “Joint-Optimization of Layout and Litho for SRAM and Logic towards the 20 nm node, using 193i,” Proc. SPIE, Mar. 23, 2011. |
Written Opinion of International Searching Authority, Applic. No. PCT/US2015/035647, dated Oct. 7, 2015. |
International Search Report Applic. No. PCT/US2015/035647, dated Oct. 7, 2015. |
M. Gupta, “Design and Implementation of a Scribe Line Measurement Transistor Test Array Structure in 14nm FinFET CMOS Technology,” M.S. Thesis, Univ. of Texas at Austin, May 2015. |
O.D. Patterson et al., “In-Line Process Window Monitoring using Voltage Contrast Inspection,” 2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, May 5, 2008. |
J. Jau et al., “A Novel Method for In-line Process Monitoring by Measuring the Gray Level Values of SEM Images,” IEEE International Symposium on Semiconductor Manufacturing, Sep. 13, 2005. |
M. Saito et al., “Study of ADI (After Develop Inspection) Using Electron Beam,” Proc. of SPIE vol. 6152, Feb. 19, 2006. |
H.Y. Li et al., “Built-in Via Module Test Structure for Backend Interconnection In-line Process Monitor,” Proceedings of the 12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, Jun. 27, 2005. |
Y. Hamamura et al., “An Advanced Defect-Monitoring Test Structure for Electrical Screening and Defect Localization,” IEEE Transactions on Semiconductor Manufacturing, May 10, 2004. |
S.-C. Lei et al., “Contact leakage and open monitoring with an advanced e-beam inspection system,” Proc. SPIE 6518, Apr. 5, 2007. |
H. Xiao et al., “Capturing Buried Defects in Metal Interconnections with Electron Beam Inspection System,” Proc. SPIE 8681, Apr. 18, 2013. |
T. Newell et al., “Detection of Electrical Defects with SEMVision in Semiconductor Production Mode Manufacturing,” Proc. of SPIE vol. 9778, Feb. 21, 2016. |
C. Hess et al., “Scribe Characterization Vehicle Test Chip for Ultra Fast Product Wafer Yield Monitoring,” 2006 IEEE International Conference on Microelectronic Test Structures, Mar. 6, 2006. |
J. Cong et al., “Optimizing routability in large-scale mixed-size placement,” Design Automation Conference (ASP-DAC), Jan. 22, 2013. |
C. Menezes et al., “Design of regular layouts to improve predictability,” Proceedings of the 6th IEEE International Caribbean Conference on Devices, Circuits and Systems, Apr. 26, 2006. |
X. Meng et al., “Novel Decoupling Capacitor Designs for sub-90nm CMOS Technology,” Proceedings of the 7th IEEE International Symposium on Quality Electronic Design, Mar. 27, 2006. |
T. Jungeblut et al., “A modular design flow for very large design space explorations,” CDNLive! EMEA 2010, May 4, 2010. |
J. Orbon et al., “Integrated electrical and SEM based defect characterization for rapid yield ramp,” Proc. of SPIE, vol. 5378, 2004. |
O.D. Patterson, “Use of Diodes to Enable μLoop® Test Structures for Buried Defects and Voltage to Grayscale Calibration,” 25th Annual SEMI Advanced Semiconductor Manufacturing Conference, May 19, 2014. |
Number | Date | Country | |
---|---|---|---|
62268463 | Dec 2015 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 15090256 | Apr 2016 | US |
Child | 15371955 | US | |
Parent | 15090267 | Apr 2016 | US |
Child | 15090256 | US | |
Parent | 15090274 | Apr 2016 | US |
Child | 15090267 | US |