Claims
- 1. A semiconductor integrated circuit comprised of a plurality of interconnected circuit modules, each said module having a circuit section and a dedicated testing pad section coupled to said circuit section, said integrated circuit having a control circuit connected to both a first said testing pad section of a first said module and to said circuit section of a second said module, said control circuit facilitating operation of said second module circuit section to test said first module circuit section from said first testing pad section.
- 2. The integrated circuit as specified in claim 1 wherein one said testing pad section is identical to at least one other said module testing pad section to permit testing of said circuit modules with a single piece of testing equipment.
- 3. The integrated circuit as specified in claim 1 wherein at least two said circuit modules have commonly located said testing pad sections relative to said circuit modules.
- 4. The integrated circuit as specified in claim 1 wherein said control circuit selectively electrically isolates said first testing pad section of said first module from said circuit section of said second circuit module.
- 5. The integrated circuit as specified in claim 1 wherein at least two said circuit modules are not identical to each other.
- 6. The integrated circuit as specified in claim 1 wherein at least two said circuit modules are identical to one another.
- 7. The integrated circuit as specified in claim 6 wherein said two identical circuit modules are coupled to a non-identical said circuit module.
- 8. The integrated circuit as specified in claim 1 wherein said circuit modules form an elongated said integrated circuit having a length greater than about 1 inch.
- 9. The integrated circuit as specified in claim 6 wherein said identical circuit modules comprise a spatial light modulator.
- 10. The integrated circuit as specified in claim 9 wherein said spatial light modulator is comprised of a plurality of micro mirrors.
Parent Case Info
CROSS REFERENCE TO A RELATED APPLICATION
Cross referenced is made to co-pending patent application Ser. No. 07/990,992, entitled "Large Die Photolithography", filed Dec. 16, 1992.
US Referenced Citations (15)