The present disclosure relates to patterned substrate and it's fabrication that will results in an improved optoelectronic devices including laser diode (LDs), light-emitting diodes (LEDs), and silicon integrated sensors (sensors on silicon substrate). More specifically, the present disclosure is related to an ultraviolet (UV) laser diodes (UV LDs), light emitting diodes (LEDs), and sensors on silicon and silicon dioxide on silicon temperate which can be manufactured without a low temperature buffer layer, with greatly reduced dislocation density thereby providing improved efficiency, and performance.
Group III nitride compound semiconductors such as, for instance, gallium nitride (GaN), aluminum nitride (AlN), and indium nitride (InN) (hereinafter also referred to as a “Group III-nitride semiconductor” or “III-nitrides”) have been gaining attention as a material for semiconductor devices that emit green, blue or ultraviolet light.
UV LDs, LEDs, and sensors are highly desirable for a number of applications and proposed applications. They are expected to find great utility in such diverse areas as bio chemical sensors, air and Water purification, food processing and packaging, displays, lighting and for high-density optical disk devices, and various forms of medical applications such as dentistry, dermatology and optometry.
These LDs, LEDs, and sensors are difficult to manufacture for a few reasons. For example, defects arise from lattice and thermal mismatch between the groups III-Nitride based active device layers and a substrate such as silicon, sapphire, Gallium Nitride, or silicon carbide on which they are constructed. In addition, impurities and tilt boundaries result in the formation of crystalline defects. These defects have been shown to reduce the efficiency and lifetime of LEDs and LDs fabricated from these materials. These defects have been observed for III-Nitride films grown on the above mentioned substrates with typical dislocation densities ranging from 108 cm−2 to 1010 cm' for films grown via metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE) and several other less common growth techniques. Therefore reducing the dislocation density has become one of focused research.
Many approaches were studied to reduce dislocation density. One of which is use of epitaxial lateral overgrowth (ELOG), and variations of this approach including lateral growth (PENDEO) epitaxy, and facet controlled epitaxial lateral overgrowth (FACELO), which are all well-known technique in the prior art. With these methods, the dislocation density can be reduced to about 105 cm−2 to 106 cm−2. These method, however, has been shown to be ineffective for the growth of aluminum-containing III-Nitride based semiconductors because of the tendency for the aluminum to stick to the masked material and disrupt the lateral overgrowth.
There are many other approaches to reduce defect densities.
In spite of the many developments and advancements there remains significant limitation for developing high power, LDs, reliable UVLEDs, and sensors integrated on silicon substrate. Hence there is an ongoing desire for LDs, LEDs, and silicon integrated sensors and method for forming LDs, LEDs, and silicon integrated sensors with a low defect density.
The present disclosure discloses three patterned substrates which enables greatly reduced dislocation density on films grown on them, and the designs and structures of laser diodes and methods of fabricating such devices on these patterned substrates. The patterned substrates will be made with (formed on) various wafers including Si, GaN-on-sapphire, or GaN, sapphire wafers.
The present disclosure presents a method to grow and fabricate high crystalline quality semiconductor optoelectronic device structures and devices on nano/micro patterned substrates. The optoelectronic device including LDs, LEDs, and silicon integrated sensors including SiGeSn on silicon and silicon oxides (SiOx, 1≤x) on silicon temperate. The present disclosure enables mass fabrication of high performance laser diodes (and other optoelectronic and photonic devices) on patterned substrates.
The present disclosure falls into the field of optoelectronics, particularly, is the design, epitaxial growth, fabrication, and characterization of Laser Diodes (LDs) operating in the ultraviolet (UV) to infrared (IR) spectral regime on patterned substrates (PSs) made with (formed on) low cost, large size Si, or GaN on sapphire, GaN, and other wafers. We disclose three types of PSs, which can be a universal substrates, allowing any materials (III-Vs, II-VIs, etc.) grown on top of it with low defect and/or dislocation density. Molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD) or any other epitaxial growth method can be employed to grow high quality nearly/perfectly dislocation free device structures on these three PSs. Therefore, these PSs enable mass fabrication of high performance LDs operating from UV to IR spectral range. These PSs also enable mass fabrication of other optoelectronic and photonic devices based on III-Vs, II-VIs and other materials including III-Nitride materials.
Decades of extensive efforts to develop III-Vs or II-VIs based LDs monolithically grown on planer Silicon substrates has been unsuccessful due to large lattice mismatch between LD materials and silicon substrate. Three PSs disclosed in the present disclosure enable monotheistic integration of these LDs with silicon based devices/circuits.
As the III-nitride based LDs an example, up to date, no low cost commercial UV and green LDs available due to lack of low cost/and or lattice matched substrates. Three types of PSs enable high quality GaN, AlGaN, and InGaN films on these PSs formed on silicon, GaN-on-sapphire, or GaN substrates, thereby enables commercial UV and green LDs on these PSs.
Three types of PSs are V-groove PS 2, trapezoidal-groove PS 13, and rectangular/square cuboid PS 20.
The PSs can be fabricated by either combination of e-beam lithography and wet-chemical etching or combination of e-beam lithography and dry etching or through Nanoimprint transfer of master mold patterns to various wafers followed by etching. For example, potassium hydroxide (KOH) can be used to selective etching to fabricate V-groove 2, or trapezoidal-groove PSs on (100) Si wafer with lithographic patterns made either with e-beam lithography or nanoimprint lithography. Reactive ion etching (RIE) also can be used to fabricate these PSs on Si or GaN on Sapphire or GaN wafers with lithographic patterns made either with e-beam lithography or nanoimprint lithography through transfer of the master mold patterns. The fabrication of PS via nanoimprint lithography followed by etching is described in
The discussion and description below should be taken to be exemplary in general which is not limited the overall scope of the current version of the present disclosure. PSs enables any laser structures with any materials combinations. We will take III-Nitride LDs as the example to demonstrate the use of three type PSs.
In this example, LDs are grown by MBE, MOCVD, CVD or any other epitaxial growth method. The PSs can be fabricated from regular substrate 1, for instance, Si, sapphire, GaN-on-sapphire, GaN wafers, or other suitable wafers.
Before the growth process of LDs, the PSs are cleaned via standard wafer cleaning processes using standard solvent and/or acid solution. The PS is then loaded into growth chamber. Further cleaning step (steps) is (are) used to remove native oxide which was formed on the surfaces of the PSs.
Next step is the epitaxial growth of LD structures on PSs, performed inside growth chamber.
The LD structures can be with single quantum well (for example, AlxGa1-xN/AlyGa1-yN or IniGa1-iN/AljGa1-jN), multiple quantum well, or quantum dots (single layer or multiple layers), served as the active region. The device structure may have n-AljGa1-jN (or n-InkGa1-kN) bottom cladding layer 3, n-AllGal-1N (or n-InmGa1-mN, or n-GaN) bottom waveguide layer 4, active region with single or multiple quantum wells, or quantum dots (single layer or multiple layers of IniGa1-iN, AlxGa1-xN, AlnInpGa(1-n-p)N, GaN, or AlN) 5, top waveguide layer (p-AllGa1-lN, p-GaN or p-InmGa1-mN) 6, and top cladding layer (P-AljGa1-jN or p-InkGa1-kN) 7, and final layer of p-contact layer which may be p++-GaN 8 to form ohmic contact on the laser device. For x is in the range of [0-1], y is in the range of [0-1], i is in the range of [0-1], j is in the range of [0-1], k is in the range of [0-1], 1 is in the range of [0-1], m is in the range of [0-1], n is in the range of [0-1], and p is in the range of [0-1]. Thickness of each layer can be designed and depends on emission wavelength of the LDs operating between UV and IR spectral range.
As was stated above herein, three types of PSs will be used in the present disclosure. The first demonstration/disclosure is the fabrication of LDs on V-groove PSs. Illustrated in
The LD sample will be taken out of the chamber for characterization and device fabrication.
The grown LD sample will be used to fabricate LD devices through standard LD fabrication procedures. Device fabrication process of LD on PSs includes the following steps. The LD sample is first cleaned with solvent and DI water. Dry the sample by nitrogen gas. The LD dimension can be defined by standard photolithography on substrate. Photoresist is then spin-coated for the subsequent photolithography step. The LD stripe, length and top contact is defined on the surface of the LD sample by photolithography. Top metal contact is then deposited at desired position defined previously by photolithography. The back metal contact is then deposited on the backside of the n-type doing Si substrate or GaN free standing substrate. Metal contacts can be Ti/Al, Ti/Au or Al for n-type contact and Ni/Au, Ni/Al, or Ni/Al/Au for p-type contacts. For GaN-on-sapphire substrate, the n-metal contact will be deposited on n-GaN layer after a certain photolithograph step which is necessary to open a window on n-GaN layer for metal deposition. The fabricated devices with metal contacts are annealed at between 400-600° C. (or higher) for 1 to 3 minutes in nitrogen ambient to form good ohmic contacts. The length of laser device will be defined with two end-facets by cleaving the wafer at desired positions. Cleaving wafer can be performed by hard-sharp objective such as diamond pen, or scriber.
The aspect ratio including L1, CL1, and W1, illustrated in
The second demonstration/disclosure is the fabrication of LDs on trapezoidal-groove PS 11. The epitaxial growth of LD on this type of substrate is similar to that of LDs on V-groove PS. The trapezoidal-groove PS is cleaned by standard cleaning procedure before loading into the growth chamber. The LD active region can have single quantum well or multiple quantum well, or quantum dots (single layer or multiple layers), served as the active region 14. The device structure may have n-type bottom cladding layer (can be n-AljGa1-jN or n-InkGa1-kN) 12, n-type bottom waveguide layer (can be n-AllGa1-lN or n-InmGa1-mN, or n-GaN) 13, active region with single or multiple quantum wells (for example, AlxGa1-xN/AlyGa1-yN or IniGa1-iN/GaN), or quantum dots (single layer or multiple layers of IniGa1-iN, AlxGa1-xN, AlnInpGa(1-n-p)N, GaN, or AlN) 14, p-type top waveguide layer (can be p-Al1Ga1-lN, p-GaN or p-InmGa1-mN) 15, p-type top cladding layer (can be AljGa1-jN or p-InkGa1-kN) 16, and heavily doped contact layer which may be p++-GaN 17. Presented in
The LD on trapezoidal-groove PS sample will be taken out of the chamber and process device fabrication. The fabrication procedure of LDs is similar to the one shown in the first demonstration/disclosures (presented in the device fabrication description above herein).
The aspect ratio including L2, CL2, and W2, illustrated in
The third demonstration/disclosure is the fabrication of LDs on rectangular/square cuboid-groove PS 20. The epitaxial growth of LDs on this type of substrate is similar to that of LDs on V-groove PS. Since the procedure for growing and fabricating rectangular cuboid-groove PS and square cuboid-groove PS is similar, in this description, only the rectangular cuboid-groove PS 20 is presented, shown in
The aspect ratio including L3, CL3, and W3, illustrated in
Similarly, the LD sample will be taken out of the chamber and going through device fabrication process similar to the one shown in the first or second demonstration/disclosures.
The embodiments described herein are exemplary and variations are contemplated. For example, P-N or P-I-N structures can be grown on these three patterned (or combinations of these three) substrates using one of the following materials: (including III-N), II-VI, IV-IV, and there ternaries, quaternaries and combination of them. More specifically, as an example, AlxGa1-x N or InxGa1-xN or Si1-x-y GexSny or InAsxSb1-x or HgxCd1-xTe or InSb or InAs with 0≤x≤1, 0≤y≤1, can be grown on the three (and or combination of these three) patterned substrates to form P-N or P-I-N structures.
It will be apparent to those skilled in the art of UV LDs, LEDs, and silicon integrated sensor that many modifications and substitutions can be made to the preferred embodiments described herein without departing from the spirit and scope of the present disclosure which is specifically set forth in the appended claims.
The present application is a continuation of U.S. patent application Ser. No. 16/947,726, filed Aug. 13, 2020, which is a continuation of U.S. patent application Ser. No. 15/680,345, filed Aug. 18, 2017. The entire contents of each of the foregoing applications are hereby incorporated by reference herein.
Number | Date | Country | |
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Parent | 16947726 | Aug 2020 | US |
Child | 17673983 | US | |
Parent | 15680345 | Aug 2017 | US |
Child | 16947726 | US |