In semiconductor devices, including high voltage devices, it is desirable to obtain a low on-resistance that is primarily determined by the drift region resistance. Typically, the drift region resistance of a transistor is lowered by increasing the doping level of the drift region. However, increasing the doping level of the drift region has the undesirable effect of reducing the breakdown voltage. The doping level of the drift region is therefore optimized to obtain the maximum on-resistance while still maintaining a sufficiently high breakdown voltage. As the requirements for breakdown voltages increase, the use of drift region doping concentrations to adjust on-resistance and breakdown voltages becomes more difficult.
In addition to breakdown voltages being affected by the doping concentration of the drift region, breakdown voltages are also affected by the electric field distribution inside and outside the active device. As a result, there have been efforts in the art to control the electric field distribution by field-shaping methods and therefore control the on-resistance and breakdown voltage of transistor devices. For example, lateral floating coupled capacitor (LFCC) structures have been used to control the electric fields in the drift region of a transistor and thereby improve on-resistance. These LFCC structures include insulated trenches formed in the drift region of a transistor, which contain isolated electrodes and are parallel to the direction of current flow. These LFCC structures improve transistor properties. For example, the drift region field-shaping provided by the LFCC regions can desirably provide high breakdown voltage and low on-resistance simultaneously. However, when sustaining source to drain voltages up to 700 volts, breakdown can occur at the ends and edges of the active transistor region. It is known in the art that termination regions which surround active device regions preferably have a breakdown voltage higher than that of active device region, to prevent premature breakdown at the ends and edges of the active region.
Therefore there is a need for an improved LFCC semiconductor device that has higher termination breakdown voltage by using similar LFCC structure in the termination region without introducing extra steps in the process flow.
Embodiments of the present invention provide a series of termination structures that prevent the premature breakdown of the LFCC device at the edges or ends. The LFCC device has voltage termination structures with one or more capacitively coupled trenches, which can be similar to the trenches in the drift regions of the active transistor. The capacitively coupled trenches in the termination regions are arranged with an orientation that is either parallel or perpendicular to the trenches in the active device drift region. Embodiments also provide for capacitively segmented trench structures having dielectric lined regions filled with conducting material and completely surrounded by a silicon mesa region. Embodiments further provide for continuous regions composed entirely of an electrically insulating layer extending a finite distance vertically from the device surface.
In one embodiment, a semiconductor device includes an active region including a plurality of capacitively coupled active trenches arranged parallel to each other along a first direction, and a voltage termination structure including at least one capacitively coupled termination trench arranged along a second direction. The second direction is perpendicular to the first direction.
In another embodiment, the active trenches and the termination trenches are substantially similar.
In yet another embodiment, the at least one termination pitch (trench+mesa) includes silicon regions that are either wider or narrower laterally from capacitor to capacitor than those used for conduction in the active device drift regions.
In yet another embodiment, the at least one termination pitch includes first silicon regions that are half the width from capacitor to capacitor than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment, the at least one termination pitch includes first silicon regions that are shorter or longer in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment, the at least one termination pitch includes first silicon regions that are twice as long in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment, the at least one termination pitch includes first silicon regions that are doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment, the termination structure includes metal field plates disposed at the source side, the drain side, or both sides. The field plates can be fabricated using processes used for forming metal interconnect layers.
In yet another embodiment, the semiconductor device further includes polysilicon connectors, which are disposed over polysilicon field plates that are located in at least one termination trench. The polysilicon connectors can be electrically coupled to at least one polysilicon field plate. The polysilicon connectors can be disposed perpendicular to the at least one termination trench and can have a spacing separating adjacent polysilicon connectors that varies. In one embodiment the spacing gets larger as the polysilicon connectors get closer to the drain side.
In yet another embodiment, the at least one termination pitch includes a transitional silicon mesa disposed between the termination trenches and the conduction trenches. The transitional mesa can be the same width, wider, or narrower than the conduction mesas.
In yet another embodiment, the termination structure includes one or more field plates formed by polysilicon, metal, or other conducting material extending from over the conduction trenches to over the termination trenches in a pattern that modifies the electric fields present in the termination trenches.
In another embodiment, a semiconductor device includes an active region including a plurality of capacitively coupled active trenches arranged parallel to each other along a first direction, and a voltage termination structure including at least one capacitively coupled termination trench arranged along a second direction. The second direction is parallel to the first direction.
In yet another embodiment where the termination trenches are parallel to the active trenches, the active trenches and the termination trenches are substantially similar.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes first silicon regions that are either wider or narrower laterally from capacitor to capacitor than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes first silicon regions that are half the width from capacitor to capacitor than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes first silicon regions that are shorter or longer in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes first silicon regions that are twice as long in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes first silicon regions that are doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment where the termination trenches are parallel to the active trenches, the termination structure includes metal field plates at the source side, the drain side, or both sides. The field plates can be fabricated by any or all of the process metal interconnect layers.
In yet another embodiment, the semiconductor device further includes polysilicon connectors disposed over polysilicon field plates. The polysilicon connectors can be electrically coupled to at least one polysilicon field plate, which is disposed in at least one termination trench. The polysilicon connectors can be disposed perpendicular to the at least one termination trench and can have a spacing separating adjacent polysilicon connectors that varies. In one embodiment the spacing gets larger as the polysilicon connectors get closer to the drain side.
In yet another embodiment where the termination trenches are parallel to the active trenches, the at least one termination pitch includes a transitional silicon mesa between the termination trenches and the conduction trenches. The transitional mesa can be the same width, wider, or narrower than the conduction mesas.
In yet another embodiment where the termination trenches are parallel to the active trenches, the termination structure includes one or more field plates formed by polysilicon, metal, or other conducting material extending from over the conduction trenches to over the termination trenches in a pattern that modifies the electric fields present in the termination trenches.
In another embodiment, a semiconductor device includes an active region including a plurality of capacitively coupled active trenches arranged parallel to each other along a first direction, and a voltage termination structure including at least one capacitively segmented trench structure having dielectric lined regions filled with conducting material and completely surrounded by a silicon mesa region.
In yet another embodiment, the at least one termination trench includes a width to length aspect ratio of about one.
In yet another embodiment, the at least one termination trench includes a width that is substantially the same, or wider, or narrower than the intrinsic device conduction trenches.
In yet another embodiment, the at least one termination trench shares one or more processing steps with the intrinsic device drain drift region conduction trenches.
In yet another embodiment, the at least one termination pitch includes first silicon regions doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device drift regions.
In yet another embodiment, the termination structure includes metal field plates at the source side, the drain side, or both sides and at least one termination trench which includes at least one polysilicon field plate. The semiconductor device can further include polysilicon connectors disposed over the polysilicon field plates. The polysilicon connectors can be electrically coupled to at least one polysilicon field plate. The polysilicon connectors can be disposed perpendicular to the at least one termination trench and can have a spacing separating adjacent polysilicon connectors that varies. In one embodiment the spacing gets larger as the polysilicon connectors get closer to the drain side.
In yet another embodiment, the at least one termination pitch includes a transitional silicon mesa between the termination trenches and the conduction trenches. The transitional mesa can be the same width, wider, or narrower than the conduction mesas.
In another embodiment, a semiconductor device includes an active region including a plurality of capacitively coupled active trenches arranged parallel to each other along a first direction, and a voltage termination structure including a continuous termination region composed entirely of an electrically insulating layer extending a finite distance vertically from the device surface.
In yet another embodiment, the insulating layer includes deposited silicon dioxide.
In yet another embodiment, the insulating layer includes thermally grown silicon dioxide.
In yet another embodiment, the insulating layer includes deposited silicon nitride.
In yet another embodiment, the insulating layer includes thermally grown silicon nitride.
Further areas of applicability of the present disclosure will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating various embodiments, are intended for purposes of illustration only and are not intended to necessarily limit the scope of the disclosure.
A further understanding of the nature and advantages of the invention may be realized by reference to the remaining portions of the specification and the drawings, presented below. The Figures are incorporated into the detailed description portion of the invention.
In the following description, for the purposes of explanation, specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details.
Embodiments of the present invention provide voltage termination structures having one or more capacitively coupled trenches, which can be similar to the trenches in the drift regions of the active transistor. The capacitively coupled trenches in the termination regions are arranged with an orientation that is either parallel or perpendicular to the trenches in the active device drift region. Embodiments also provide for capacitively segmented trench structures having dielectric lined regions filled with conducting material and completely surrounded by a silicon mesa region. Embodiments further provide for continuous region composed entirely of an electrically insulating layer extending a finite distance vertically from the device surface.
Embodiments also provide for polysilicon connectors disposed over polysilicon field plates, which are disposed in the termination trenches. The polysilicon connectors can be electrically coupled to at least one polysilicon field plate. The polysilicon connectors can be disposed perpendicular to the at least one termination trench and can have a spacing separating adjacent polysilicon connectors that varies. In some embodiments the spacing gets larger as the polysilicon connectors get closer to the drain side.
In an embodiment, the at least one termination pitch (termination trench 205+spacing between termination trench 205) includes silicon regions that are either wider or narrower laterally from capacitor to capacitor than those used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are half the width from capacitor to capacitor than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can include first silicon regions that are shorter or longer in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are twice as long in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can further include first silicon regions that are doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device 110 drift regions.
In an embodiment, the at least one termination pitch (termination trench 305+spacing between termination trench 305) includes silicon regions that are either wider or narrower laterally from capacitor to capacitor than those used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are half the width from capacitor to capacitor than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can include first silicon regions that are shorter or longer in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are twice as long in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can further include first silicon regions that are doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device 110 drift regions.
In one embodiment, the polysilicon field plates 305, which are located inside termination trenches 620, are coupled to polysilicon connections 605B which run perpendicular to the termination trenches 620. The polysilicon connections 605B are used to carry over the potential in the active region 110 into termination region 105 with increasing voltage from the source to the drain along the drift region through multiple electrically isolated LFCC regions (not shown). The polysilicon connections 605B run perpendicular to the active trenches 310. Each of the polysilicon connections 605B can overlay all the termination trenches 620, in a perpendicular direction, and make contact with at least one polysilicon field plate 305 disposed in a termination trench 620. Alternatively, each of the polysilicon connections 605B can overlay at least one of the termination trenches 620, in a perpendicular direction, and make contact with at least one polysilicon field plate 305 disposed in an overlaid termination trench 620. In one embodiment, each polysilicon connections 605B is set to make contact with polysilicon field plates 305 located in only a single termination trench 620. The polysilicon connections 605B can be laid out over the termination trenches 620 and polysilicon field plates 305 using various configurations such as those described with reference to
Although the embodiments illustrated in
The termination pitch (termination trench 705+spacing between termination trench 705) can also include first silicon regions that are doped differently. The first silicon regions can be doped, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device drift regions. The termination structure can also include metal field plates at the source side, the drain side, or both sides. The termination pitch can also include a transitional silicon mesa between the termination trenches and the conduction trenches. The transitional mesa can be the same width, wider, or narrower than the conduction mesas.
The fabrication process of the termination trenches 705 can share one or more processing steps with the intrinsic device drain drift region conduction trenches.
The polysilicon field plates, which are located inside the termination trenches 905A, are coupled to polysilicon connections 905B, which run perpendicular to the termination trenches 905B. The polysilicon connections 905B run parallel to the active trenches 910A. Each of the polysilicon connections 905B can overlay all the termination trenches 905A, in a perpendicular direction, and make contact with at least one polysilicon field plate disposed in a termination trench 905A. Alternatively, each of the polysilicon connections 905B can overlay at least one of the termination trenches 905A, in a perpendicular direction, and make contact with at least one polysilicon field plate disposed in an overlaid termination trench 905A. In one embodiment, each polysilicon connections 905B is set to make contact with polysilicon field plates located in only a single termination trench 905A. In another embodiment, each polysilicon connections 905B is set to make contact with polysilicon field plates located in only a single termination trench 905A and such that the first polysilicon connection 905B disposed closest to the drain (120A, 120B) makes contact with the polysilicon field plates located in the first termination trench 905A disposed closest to the drain region (120A, 120B). Consecutive polysilicon connections 905B can further make contact with polysilicon field plates located in consecutive termination trenches 905A, so that the second polysilicon connection 905B disposed away from the drain region (120A, 120B) makes contact with the polysilicon field plates located in the second termination trench 905A disposed away from the drain region (120A, 120B); the third polysilicon connection 905B disposed away from the drain region (120A, 120B) makes contact with the polysilicon field plates located in the third termination trench 905A disposed away from the drain region (120A, 120B); etc.
In the embodiment illustrated in
In an embodiment, the at least one termination pitch (termination trench 905A+spacing between termination trenches 905A) includes silicon regions that are either wider or narrower laterally from capacitor to capacitor than those used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are half the width from capacitor to capacitor than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can include first silicon regions that are shorter or longer in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can also include first silicon regions that are twice as long in a direction parallel to the termination trenches than second silicon regions used for conduction in the active device 110 drift regions. The at least one termination pitch can further include first silicon regions that are doped differently, either higher or lower, or with a different dopant species, than second silicon regions used for conduction in the active device 110 drift regions.
Although specific embodiments of the invention have been described, various modifications, alterations, alternative constructions, and equivalents are also encompassed within the scope of the invention. The described invention is not restricted to operation within certain specific embodiments, but is free to operate within other embodiments configurations as it should be apparent to those skilled in the art that the scope of the present invention is not limited to the described series of transactions and steps.
The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. It will, however, be evident that additions, subtractions, deletions, and other modifications and changes may be made thereunto without departing from the broader spirit and scope of the invention as set forth in the claim.
This application claims the benefit of U.S. Provisional Application No. 61/324,587, filed Apr. 15, 2010, which is incorporated herein by reference in its entirety for all purposes.
Number | Date | Country | |
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61324587 | Apr 2010 | US |