Claims
- 1. A shallow junction metal oxide semiconductor field effect transistor made in accordance with the steps of:
- depositing a buffer layer in direct contact with a substrate surface adjacent to a gate electrode;
- ion implanting a first dopant at a high dosage, low energy level into the buffer layer;
- ion implanting a second dopant at a low dosage, high energy level into the buffer layer;
- providing a graded sidewall spacer having a foot portion of variable thickness, the foot portion gradually diminishing in thickness away from the sidewall spacer, that permits a variable number of implanted ions to pass therethrough; and
- diffusing said ions from said buffer layer into said substrate vertically and laterally under the gate electrode to provide a lateral dopant concentration gradient under the gate electrode and to provide a junction-to-gate overlap without damage to the substrate.
- 2. A shallow junction metal oxide semiconductor field effect transistor according to claim 1 wherein said first and second dopants are the same.
- 3. A shallow junction metal oxide semiconductor field effect transistor according to claim 2 wherein said dopant is selected from the group consisting of phosphorus, arsenic, boron and BF2.
- 4. A shallow junction metal oxide semiconductor field effect transistor according to claim 1 wherein said ions are diffused during a subsequent planarization step.
- 5. A shallow junction metal oxide semiconductor field effect transistor according to claim 1 wherein said first and second dopants are different.
CROSS REFERENCE TO RELATED APPLICATION
This is a continuation of Ser. No. 08/707,019 filed Sept. 10, 1996 now abandoned, which is a continuation of Ser. No. 08/417,420 filed Apr. 5, 1995 now abandoned which is a divisional of Ser. No. 08/208,548 filed Mar. 9, 1994 now U.S. Pat. No. 5,439,831.
US Referenced Citations (8)
Divisions (1)
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208548 |
Mar 1994 |
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Continuations (2)
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707019 |
Sep 1996 |
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417420 |
Apr 1995 |
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