Patent Application
20140191345
The present disclosure relates to a magnetic memory device which is laminated by a plurality of vertical magnetization layers including a memory layer and a reference layer through a nonmagnetic substance, and memorizes information by reverse magnetization in a spin torque generated when a current flows between these layers, and a method of manufacturing the magnetic memory device.
In information devices such as computers, high density DRAM (Dynamic Random Access Memory) operating at high speed is widely used as a RAM (Random Access Memory). However, since DRAM is a volatile memory in which the information disappears when power is turned off, a nonvolatile memory from which the information does not disappear is necessary.
As a nonvolatile memory candidate, MRAM (Magnetic Random Access Memory) memorizing information by magnetizing magnetic material has attracted attention and is undergoing development.
As a method of memorizing MRAM memorization, there is a method of reversing the magnetization by a current magnetic field, for example, as disclosed in Japanese Unexamined Patent Application Publication No. 2004-193595, involving inducing a magnetization reversal by injecting spin polarized electrons into a memory layer directly. In particular, spin injection magnetization reversal, which can reduce current for memorization and reduce the size of the device, has received attention.
Furthermore, in order to refine the device, as disclosed in Japanese Unexamined Patent Application Publication No. 2009-81215, for example, a method for utilizing a vertically magnetized layer which enables the magnetization direction of a magnetic material to become vertical is being studied.
However, in order to realize an even higher density magnetic memory, a magnetic memory device operable at high speed with lower current is necessary.
Since the disclosure is based on recognition of this fact, it is desirable to realize a magnetic memory device operable at high speed with low current.
A magnetic memory device according to the present disclosure includes a memory layer having a vertical magnetization on the layer surface and changing the direction of the magnetization of the memory layer according to information, and a reference layer which is provided against the memory layer through a nonmagnetization layer and which is a basis of information while having vertical magnetization on the layer surface, wherein the memory device memorizes the information by reversing the magnetization of the memory layer by a spin torque generated when a current flows between layers made from the memory layer, the nonmagnetization layer, and the reference layer. Furthermore, a coercive force of the memory layer at a memorization temperature is equal to or less than 0.7 times a coercive force at room temperature, and the heat conductivity of a center portion of the electrode formed on one side of the memory layer in the direction of the layer surface is lower than the heat conductivity of its surroundings.
For example, the electrode is formed to substantially have a concave cross section, the thickness of the center portion of the electrode is thinner than that of the surroundings of the electrode, and an insulator of low heat conductivity is filled into a depressed portion formed at the center portion.
Alternatively, the electrode has a tube-like shape, and an inner part of the tube-like shape is filled with an insulator of low heat conductivity.
A method of manufacturing a magnetic memory device of the present disclosure includes forming a structure of layers of at least the reference layer, the nonmagnetization layer, and the memory layer on one side of the electrode of the reference layer, wherein a coercive force of the memory layer at a memorization temperature is 0.7 times or less than a coercive force at room temperature. Furthermore, the method includes forming another electrode on one side of the memory layer, wherein this another electrode is filled with an insulator of low heat conductivity, and the heat conductivity of a center portion of the electrode in the layer surface direction is lower than the heat conductivity of its surroundings.
As the magnetic memory device, although implementing memorization by use of a spin torque caused by spin injection magnetization reversal method can reduce the current during memorization, there is a limit on reducing current with this alone. Therefore, it is desirable to enable the current for magnetization reversal to be reduced by using heat in memorization effectively.
A demagnetizing field of the vertical magnetization layer which configures the memory layer is strong at the center portion in the direction of the layer surface. Also, magnetization reversal happens easily at the central part.
Therefore, in the electrode of the memory layer side, the heat conductivity is set to be lower at the center portion thereof in the direction of the layer surface rather than at the surroundings thereof. For example, it is preferable to facilitate the temperature increase by arranging a material of low heat conductivity. Therefore, it is possible to effectively raise the temperature at the center portion of the layer surface of a memory layer, reduce the voltage for magnetization reversal, and reduce current for memorization and time for memorization.
In particular, this effect is obtainable to a remarkable extent when the structure of the memory layer is formed such that a coercive force of the memory layer at a memorization temperature (about 200° C.) is 0.7 times or less than that at room temperature (for example, 23° C.)
It is possible to realize a nonvolatile memory operable at high speed with low current by the present disclosure.
Hereinafter, the embodiments of the disclosure are described in the following order.
<1. Overview of a magnetic memory structure>
<2. One example of the structure of a magnetic memory device of an embodiment >
<3. The first example of the structure and a manufacturing order>
<4. The second example of the structure and a manufacturing order>
<5. The third example of the structure and a manufacturing order>
<6. The fourth example of the structure and a manufacturing order>
First, the magnetic memory structure which is used as the magnetic memory device according to an embodiment of the present disclosure will be explained.
The magnetic memory 10 includes two types of address wirings intersecting each other, for example, a word line and a bit line, and the magnetic memory device 1 is located in the vicinity of the intersection between the two types of address wirings. The magnetic memory device 1 includes a structure as an embodiment described below.
In a magnetic memory 10, a drain area 8, a source area 7, and a gate electrode 3 configuring a transistor for selecting the corresponding memory device 1 are formed individually in a region separated by a device separating layer 2 of a semiconductor substrate, such as, for example, Si, or the like.
The gate electrode 3 also has a role as the wiring for addressing (for example, word line) which is elongated forward and backward in
The drain area 8 is commonly formed between transistors for selecting right and left in
The magnetic memory device 1 is also arranged between the source region 7 and the other side of wiring 6 (for example, bit line) for addressing which is extended to the left and right in
Also, the magnetic memory device 1 is located in the vicinity of intersection between the gate electrode 3 and the wiring 6 which are two types of address lines, and connected with the upper and lower contact layers 4. Therefore, it is possible to conduct electric current up and down to the magnetic memory device 1 through two types of lines, in other words, the gate electrode 3 and the wiring 6, and, by spin injection, it is possible to enable reversing of the magnetization direction of the memory layer corresponding to the information.
On the other hand, the structure shown in
As illustrated above, according to the disclosure, it is possible to operate the magnetic memory device using a vertical magnetization layer at high speed with a lower current.
The inventors of the present disclosure carried out varied research to accomplish above matters, and as a result found that it is preferable to form the magnetic memory device having the reference layer and the memory layer having a vertical magnetization and laminated through a nonmagnetization layer as follows.
In other words, while making a coercive force of the memory layer at a memorization temperature (about 200° C.) 0.7 times or less than a coercive force at room temperature (about 23° C.), the structure and material of the electrode has a property in which the heat conductivity of a center portion of the electrode is lower than the heat conductivity of its surroundings seen from the layer surface direction of the memory layer.
Then, because of the heat generated during a memorization process, the temperature at the center portion of the device becomes significantly higher than the temperature at the surroundings of the device so that a reverse magnetic area which causes reverse magnetization at the center portion of the device is likely to be formed. Therefore, a magnetic memory device capable of memorization at high speed with a lower current is realized.
As a simple structure capable of forming the above mentioned temperature distribution, a metal layer is formed to be thinner than the depth of the hollow in the hollow which is formed in the insulator separating the upper and lower electrodes of the magnetic memory device in order to take conductivity with the magnetic memory device, and an insulator of low heat conductivity is provided to the center portion where there is no metal to fill the hollow.
Because of this structure, the heat conductivity of the center portion of the memory layer declines and the heat conductivity of the surrounding rises, so that the temperature of the center portion is likely to rise during memorization.
Also, in order to augment the difference of heat conductivity, by removing at least one portion of the metal layer formed at the bottom of the hollow of the metals, making the layer thinner, or setting aside the periphery of the hollow, and thereby forming a cylindrical electrode, it is possible to generate a greater temperature difference in the memory layer.
The metals used as the electrode of the magnetic memory device of the present disclosure are preferably Cu and Al or the like with a high heat conductivity, but W and tantalum or the like with a slightly low heat conductivity may be sufficient. As an insulator with low heat conductivity, porous silicon oxide, organic matter or the like is applied, however, general silicon oxide or the like can be used.
One structure example of a general magnetic memory device 100 is shown in
As shown in
As shown in
In
The memory layer 14 is a ferromagnet having a magnetic moment, the magnetization direction of which freely changes vertically against the layer surface.
The reference layer 12 is a ferromagnet having a magnetic moment, the magnetization of which is fixed to the vertical direction against the layer surface.
The process of memorizing information is performed by the direction of magnetization of the memory layer 14 which has a property of single-axis anisotropy. The write operation is performed by applying a current to the direction vertical against the layer surface and generating spin torque magnetization reversal. In this way, since the reference layer 12 is provided as a magnetization fixed layer provided at an underlayer with respect to the memory layer 14 of which the magnetization direction is reversed by spin injection, the reference layer 12 is considered as a reference for the memory information (magnetization direction) of the memory layer 14.
The memory layer 14 includes magnetic materials which have a property of perpendicular anisotropy. These magnetic materials include rare earth element -transition metal alloys such as TbCoFe, metal multi-layers such as Co/Pd multi-layers, and ordered alloys such as FePt.
Also, it is preferable to use MgO as a nonmagnetization layer (tunnel barrier layer) 13 in order to realize a high magnetoresistance change ratio which provides a large read-out signal in the spin injection magnetic memory device 1.
A magnetic layer with a high reversion current is used as the reference layer 12. A high performance memory device is achieved by using a magnetic layer having a higher reversion current than the memory layer 14.
For example, an alloy with the main component Co, which includes at least one of Cr, Ta, Nb, V, W, Hf, Ti, Zr, Pt, Pd, Fe, and Ni, is used as the reference layer 12. For example, it is possible to use CoCr, CoPt, CoCrTa, CoCrPt, and the like. Also, it is possible to use amorphous alloys of Tb, Dy, Gd and transition metals. For example, it is possible to use TbFe, TbCo, TbFeCo, and the like.
Also, the reference layer 12 can be formed by only a ferromagnetic layer, and be formed as well by a laminated ferromagnetic structure laminated by a number of ferromagnetic layers through a tunnel barrier layer.
The basic layer structure explained above is the same as the general magnetic memory device 100, as can be seen by referring to
The magnetic memory device 1 of the present embodiment is different from the general magnetic memory device 100 in
For example, in
By the low heat conductivity part 18, it is possible to set the heat conductivity of surroundings seen from the layer surface direction of the memory layer 14 having a circular layer surface high and set the heat conductivity of the center portion low. Then, because of the heat generated during the memorization process, the temperature of the central part of the device becomes much higher than that of the circumference part of the device, whereby it becomes easy to form a reverse magnetic area which will be a cause of reverse magnetization in the central part of the device.
Also, although the reference layer 12 is located under the memory layer 14 in
Also, the shape of the memory layer 14 of the magnetic memory device 1 having a memory layer 14 with vertical magnetization may preferably be a cylindrical shape or a cone-like shape, and a shape such as a cylindroid or elliptical cone-like shape with low aspect ratio is preferable.
Although it is preferable to form the shape of the reference layer 12 with the same shape as the memory layer, the shape is not important if the reference layer 12 is under and larger than the memory layer 14.
Also, usually, as shown in
As shown in
As illustrated in
If it is supposed that the structure example of the magnetic memory device 1 of the embodiment shown in
First of all,
In other words, the reference layer 12, the nonmagnetization layer 13, the memory layer 14, and electrode material are laminated on the lower electrode 11. After that, a photoresist is coated along the area covering the device, and the shape of the device is formed under the resist by ion milling or reactive ion etching. Next, after providing insulator material, polishing is conducted until the upper electrode 15 is exposed so that a layer forming state is obtained in which the surroundings are made of an insulating layer 16 and the upper electrode 15 is filled therein as shown in
Then, from the state of
Next, as shown in
In order to satisfactorily deposit the material even on the wall in the hollow formed after removal of the upper electrode 15 as shown in
Then, the layer formed on the outside (the upper side) of the hollow is removed. Therefore, it becomes like
Then, the wiring 6 is formed so that a state like
As another embodiment, a second structure example and the manufacturing process will be explained with reference to
With regard to the shape of the magnetic memory device 1 in
In the example of the magnetic memory device in
After that, a low heat conductivity material 18A is filled therein as shown in
Then, if it is polished until it is thinner than the state of
In the magnetic memory device 1 shown in
As shown in
A third structure example capable of simplifying the making of the magnetic memory device 1 and the manufacturing process will be explained with reference to
If the device in
The material 18A with a low heat conductivity is filled in this depressed portion as shown in
Then, if polishing is conducted till the insulating layer 16 becomes thinner than the state of
In the magnetic memory device 1 shown in
After forming the magnetic memory device 1, the wiring 6 is provided on the surface as shown in
In this case, it is possible to improve the heat conductivity at the surroundings in the direction of layer surface of the memory layer 14, and allow the heat conductivity at the center portion to deteriorate.
Hereinafter, a fourth structure example and the manufacturing process will be explained with reference to
This is an example of the forming of the low heat conductivity part 18 in the forming process of the upper electrode 15.
Then, a column of low heat conductivity material 18A is formed as shown in
Next, an electrode material (metal layer) 15A which will be an upper electrode 15 is similarly formed as shown in
Then, as shown in
Then, after forming insulating layer 16 by applying insulating material around the device, a planarization process is performed on the upper surface to attain the state shown in
In the magnetic memory device 1 shown in
After forming the magnetic memory device 1 like this, the wiring 6 is formed on the upper surface as shown in
For example, in each example explained above, with respect to the memory layer 14, it is possible to obtain an upper electrode structure with high heat conductivity at the center portion in the direction of the layer surface, and promote the temperature rise at the center portion of the memory layer 14 at the time of memorization.
For example, an embodiment of the present disclosure when adopting the process of
First, a 5 nm Ta layer 21, which will be one part of the lower electrode 11 and functions as a protective layer, is provided on the lower electrode 11 made of W (tungsten). A 5 nm Ru layer 22 which is a base layer thereon in provided.
Then, as a reference layer 12, a 2 nm CoPt layer and a 1 nm CoFeB layer are provided.
Also, MgO with a thickness of 0.8 nm is formed to make a nonmagnetization layer 13.
The memory layer 14 is an alternately laminated layer of a 1 nm of CoFeB and Co/Pd. For example, as shown in
The 5 nm Ta layer 23 which is one part of the upper electrode and has a function as a protective layer is provided on the top surface of the memory layer 14, and a W layer is formed as the upper electrode 15.
Here, as explained in
The magnetic memory device 1 has a size of 150 nm in diameter, the thickness of surroundings of the upper electrode 15 is 80 nm, and the recess is formed such that the center portion has a thickness of 10 nm.
The low heat conductivity material which is provided for the depressed portion is SiO2.
The insulating layer 16 is using Al2O3.
Although not shown, in respect to this embodiment, a comparative example having the same layer structure except for the upper electrode 15 was prepared.
In the comparative example, the low heat conductivity part 18 is not formed in the upper electrode 15, and the thickness of the upper electrode 15 as a W layer is set to a constant 100 nm in the direction of the entire layer surface.
The device resistance in both the embodiment and the comparative example is 2 to 3 kΩ in a state of parallel magnetization.
The horizontal axis denotes the distance (nm) from the center of the layer surface of the device. The vertical axis denotes the ratio of temperature difference (Ts) and temperature difference (Te), wherein the temperature difference (Ts) means a difference between the ambient temperature and the temperature of the end portion of the device and the temperature difference (Te) means a difference between the temperature of the memory layer 14 and the surrounding temperature depending on the distance (0±75 μm) from the center.
Here, the expression “ambient temperature” means the temperature of the environment which is the temperature at a distance sufficiently removed from the magnetic memory device 1, for example, room temperature. Also, the “the end portion of the device” in this example means the surroundings of the circular part of the memory layer 14 as the layer has a circular layer surface.
Because the memory layer 14 has a circular layer surface, the temperature distribution is symmetrical about the center. The distance 0 is the center of the circular memory layer 14 and the distance ±75 μm is the end portion of the circle.
As shown in
In the structure of the embodiment and the comparative example described above,
Black circle denotes a sample of the embodiment, and white circle denotes a sample of the comparative example. In each structure, the ratio (Hc 200° C./Hc 23° C.) of the coercive force can vary by adjusting each layer and the entire thickness of the layers of the alternately laminated layers of Co/Pd of the memory layer 14. The memory layer 14 was adjusted in order to produce a coercive force of 400 to 600 Oe at a temperature of 23° C.
The memory voltage Vc shows the average of both positive and negative polarities at a pulse width of about 10 ns.
Meanwhile, regarding the coercive force of the memory layer 14 of the device, when there is no external magnetic field due to a leakage magnetic field from the reference layer 12, since a difference occurs in coercive force from parallel to semi-parallel, calculation was performed while applying a certain external magnetic field to cancel the leakage magnetic field from the reference layer 12.
In the comparative example, if the ratio of the coercive force at temperatures of 200° C. and 23° C. is lowered, the voltage for reversal is reduced little by little, but with only a small amount of change.
Meanwhile, in the embodiment, if the ratio (Hc 200° C./Hc 23° C.) of the coercive force at temperatures of 200° C. and 23° C. is 0.7 or less, the voltage for reversal is reduced rapidly.
Therefore, in a structure of the embodiment, it is possible to realize nonvolatile memory operable at high speed with low current by making the ratio (Hc 200° C./Hc 23° C.) of coercive force of the memory layer 14 0.7 or less.
Meanwhile, in order to hold true when the coercive force is 0 at a temperature of 200° C., although it is possible for the ratio of coercive force to be 0, the reason for the large deterioration in the coercive force at 200° C. is that the variance is high at room temperature. For this reason, it is preferable to have a stable coercive force at around room temperature, and it is more preferable to make the ratio of the coercive force 0.3 or greater.
Accordingly, although it is preferable to make the ratio (Hc 200° C./Hc 23° C.) of coercive force 0.7 or less, it is more effective to make it 0.3 or more and 0.7 or less.
As explained hereinbefore, the magnetic memory device 1 of the embodiment includes a memory layer 14 having a vertical magnetization on the layer surface and changing the direction of the magnetization according to information, and a reference layer 12 provided to the memory layer 14 through the nonmagnetization layer 13 and having a vertical magnetization on the layer surface while having a fixed magnetization direction. Furthermore, information is memorized by the magnetization reversal of the memory layer 14 caused by a spin torque generated when current flows between layers made from the memory layer 14, the nonmagnetization layer 13, and the reference layer 12.
In this structure, it is preferable to make the coercive force of the memory layer 14 at a memorization temperature 0.7 times or less than that at room temperature. Furthermore, it is preferable to make the heat conductivity of the center portion of the upper electrode 15 in the direction of the layer surface formed on one side of the memory layer 14 less than that of the peripheral part.
By structuring like this, effective magnetization reversal is realized by the temperature rise at the center portion of the memory layer 14, and a current for memorization and a time for memorization can be reduced.
In particular, as shown in
The embodiment has been explained, but the structure of the magnetic memory device 1 or the method for manufacturing the magnetic memory device 1 is not restricted to the embodiment. The materials of the memory layer 14, the nonmagnetization layer 13, the reference layer 12, the upper electrode 15, the low heat conductivity part 18, or the like, and the shape and the like of the upper electrode 15 for providing the low heat conductivity part 18 are variously considered.
The present disclosure contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2010-177104 filed in the Japan Patent Office on Aug. 6, 2010, the entire contents of which are hereby incorporated by reference.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-177104 | Aug 2010 | JP | national |
This application is a continuation of U.S. patent application Ser. No. 13/950,370 filed Jul. 25, 2013, which is a continuation of U.S. patent application Ser. No. 13/192995 filed Jul. 28, 2011, now U.S. Pat. No. 8,497,139 issued Jul. 30, 2013, the entirety of which is incorporated herein by reference to the extent permitted by law. The present application claims the benefit of priority to Japanese Patent Application No. JP 2010-177104 filed on Aug. 6, 2010 in the Japan Patent Office, the entirety of which is incorporated by reference herein to the extent permitted by law.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13950370 | Jul 2013 | US |
| Child | 14203762 | US | |
| Parent | 13192995 | Jul 2011 | US |
| Child | 13950370 | US |
