Claims
- 1. An electronic device comprising:
a first conductive material capable of conducting an electrical current; a second ferromagnetic material with a magnetization state that is magnetically coupled to a portion of the first material; and an isolation element coupled to the first material for isolating such first material.
- 2. The device of claim 1, wherein an electrical signal can be generated as an output from the first material based on the magnetic coupling, and the isolation element is coupled to and isolates such output.
- 3. The device of claim 2, further including a sensing circuit for receiving the electrical signal from the isolation element.
- 4. The device of claim 3, wherein the magnetization state corresponds to a data value, and the data value can be determined from the electrical signal received by the sensing circuit.
- 5. The device of claim 4, further including a bias source coupled to the first material for generating the electrical current.
- 6. The device of claim 5, wherein the isolation element includes a transistor, and the sensing circuit receives the electrical signal in response to a select signal applied to the transistor.
- 7. The device of claim 5, wherein the isolation element is a diode, resistor or capacitor, and the sensing circuit receives the electrical signal in response to a select signal applied to the first material.
- 8. The device of claim 1, further including a write circuit for setting the magnetization state of the ferromagnetic layer.
- 9. The memory circuit of claim 1, wherein the magnetization state of the ferromagnetic material is configurable and non-volatile.
- 10. A memory circuit comprising:
a memory element including:
(1) a hall effect device; and (2) a ferromagnetic layer with a magnetization state coupled to such hall effect device; and (3) wherein an electrical signal related to the magnetization state can be generated at an output of the hall effect device; and an isolation element coupled to the memory element for isolating any electrical signal output by the hall effect device.
- 11. The circuit of claim 10, further including a sensing circuit for receiving the electrical signals from the isolation element and for determining the magnetization state of the ferromagnetic layer.
- 12. The circuit of claim 11, wherein the magnetization state corresponds to a data value to be stored in said memory circuit, and the data value can be determined from the electrical signal received by the sensing circuit.
- 13. The circuit of claim 10, further including a bias source coupled to the hall effect device for generating an electrical current in such device.
- 14. The circuit of claim 11, wherein the isolation element includes a transistor, and the sensing circuit receives the electrical signal in response to a select signal applied to the transistor.
- 15. The circuit of claim 11, wherein the isolation element is a diode, resistor or capacitor, and the sensing circuit receives the electrical signal in response to a select signal applied to the hall effect device.
- 16. The circuit of claim 10, further including a write circuit for setting the magnetization state of the ferromagnetic layer.
- 17. The memory circuit of claim 10, wherein the magnetization state of the ferromagnetic material is configurable and non-volatile.
- 18. A memory circuit for storing a data value comprising:
a hall effect device; and a ferromagnetic material coupled to the hall effect device, and having a magnetization state corresponding to the stored data value; a selector for receiving an output signal from the hall effect device related to the magnetization state and corresponding data value; and wherein activating the selector permits the magnetization state of the ferromagnetic material and the corresponding data value to be determined from the output signal of the hall effect device.
- 19. The memory circuit of claim 18, wherein the magnetization state of the ferromagnetic material is configurable and non-volatile.
- 20. A memory array storing N*M data values comprising:
N rows by M columns of memory elements, each of the N*M memory elements including:
(1) a hall effect device; and (2) a ferromagnetic layer coupled to the hall effect device, and having a magnetization state corresponding to one of the N*M stored data values; (3) wherein an electrical signal related to the magnetization state can be generated at an output of the hall effect device; and wherein N*M distinct electrical signals can be generated corresponding to the N*M data values stored in the N*M memory elements; and isolation elements for isolating the N*M electrical signals and coupled to the N*M memory elements such that each of the N*M memory elements has at least one associated isolation element; and a common bias source coupled to each of the N*M memory elements.
- 21. The memory array of claim 20, further including one or more sensing circuits for receiving the N*M electrical signals from the isolation elements and for determining each of the N*M data values stored in the N*M memory elements.
- 22. The memory array of claim 21, wherein the isolation elements each include a transistor, and the data value of any one of the N*M memory elements can be determined applying a row selection signal to the isolation elements in such row, and by applying a column selection signal to the sensing circuits.
- 23. The memory array of claim 21, wherein the isolation elements each include a diode, resistor or capacitor, and the value of any one of the N*M memory elements can be determined by applying a row selection signal to the memory elements in such row, and by applying a column selection signal to the sensing circuit.
- 24. The memory array of claim 21, further including a write circuit for setting the magnetization states of each of the ferromagnetic layers of the N*M memory elements.
- 25. The memory array of claim 24, wherein the write circuit includes N*M write lines arranged in N rows and M columns, and whereby the magnetization state of any particular memory element at row I, column J is set by transmitting a signal on the Ith of N rows and a signal on the Jth of M columns.
- 26. The array of claim 22, wherein the isolation elements reduce cross-talk between memory elements in the array.
- 27. The array of claim 21, wherein the bias source is coupled to each memory element to increase levels of the N*M electrical signals, and their respective signal-to-noise ratios.
- 28. A memory array for storing a plurality of data items, wherein each of the data items has a data value, said array comprising:
a selection circuit; and a plurality of selectors coupled to the selection circuit; a bias source; and a plurality of memory elements, each of said elements including:
a hall effect plate and a ferromagnetic layer having a configurable magnetization state coupled to such plate, which state corresponds to the value of the data item stored in the memory element; p2 wherein each of the memory elements is coupled to the bias source and the selection circuit; and wherein the memory element has an output signal related to the value of the data, the output signal further being coupled to at least one associated selector; and a sensing circuit coupled to the selectors for receiving a plurality of output signals from the plurality of memory elements; and wherein the sensing circuit reads and determines the data values stored in the plurality of memory element based on the plurality of output signals.
- 29. The array of claim 28, wherein each of the selectors includes a transistor for reducing cross-talk in such array, and the sensing circuit receives the electrical signals in response to a select signal applied to the transistor of one or more of the selectors.
- 30. The device of claim 28, wherein each of the selectors includes a diode, resistor or capacitor for reducing cross-talk in such array, and the sensing circuit receives the electrical signals in response to a select signal applied to one or more of the memory elements.
- 31. The memory array of claim 28, further including a write circuit for setting the magnetization state of the ferromagnetic layer of each of the memory elements.
- 32. The array of claim 28, wherein the bias source is coupled to each memory element to increase levels of the output signals and their signal-to-noise ratios.
- 33. A method of storing data in a memory element, said element including a ferromagnetic material and a hall effect plate, the method comprising the steps of:
setting the ferromagnetic material to a magnetization state corresponding to said data; magnetically coupling the ferromagnetic material to a portion of the hall effect plate; isolating an output of the hall effect plate with an isolation element.
- 34. The method of claim 33, further including the steps of applying a bias to the hall effect plate, and generating an electrical signal at the output of such plate related to the magnetization state and said data.
- 35. The method of claim 34, further including the step of activating the isolation element so as to transmit the output electrical signal to a sensing circuit.
- 36. The method of claim 35, further including a step wherein the sensing circuit determines a value of the data based on the output electrical signal.
- 37. The method of claim 33, wherein the magnetization state corresponding to said data is configurable and is set by a write circuit.
- 38. The method of claim 33, wherein the magnetization state is non-volatile.
- 39. A method of storing data in a memory element, said memory element including a first conductive material, and a second ferromagnetic material, said method comprising the steps of:
generating an electrical current in the first conductive material; magnetically coupling a portion of the first material with the second ferromagnetic material having a magnetization state that corresponds to said data; and generating an output electrical signal from the first conductive material by magnetically coupling a portion of the first material with a second ferromagnetic material having a magnetization state corresponding to said data; wherein the output electrical signal in the first material is related to said data; and isolating the output electrical signal with an isolation element coupled to the first material.
- 40. The method of claim 39, further including a step of activating the isolation element so as to transmit the output electrical signal to a sensing circuit.
- 41. The method of claim 40, further including a step wherein the sensing circuit determines a value of the data based on the output electrical signal.
- 42. The method of claim 39, wherein the magnetization state corresponding to said data is set by a write circuit.
- 43. The method of claim 39, wherein the magnetization state is non-volatile, and configurable by a write circuit.
- 44. A method of storing data in an array of memory elements, each of said elements including a ferromagnetic material and a hall effect plate, comprising:
setting the ferromagnetic material of such memory elements to a magnetization state corresponding to said data; magnetically coupling the ferromagnetic material of each memory element to a respective portion of the hall effect plate of such memory element; isolating outputs of the hall effect plates of such memory elements with isolation elements.
- 45. The method of claim 44, further including the steps of applying a bias to the hall effect plate of one or more of the memory elements, and generating electrical signals at the outputs of such plates related to the magnetization state and data stored in such elements.
- 46. The method of claim 45, further including the step of activating one or more of the isolation element so as to transmit the output electrical signals to a sensing circuit.
- 47. The method of claim 46, further including a step wherein the sensing circuit determines a value of the data based on the output electrical signal.
- 48. The method of claim 47, wherein the magnetization state corresponding to said data is configurable and is set by a write circuit.
- 49. The method of claim 44, wherein the magnetization state is non-volatile.
BACKGROUND OF THE INVENTION
[0001] The government of the United States may have certain limited rights in the present invention. The present invention is a continuation-in-part of the following prior applications by the present applicant:
[0002] (1) an application titled “Magnetic Spin Transistor, Logic Gate & Method of Operation,” (Ser. No. 08/425,884, filed Apr. 21, 1995);
[0003] (2) an application titled “Magnetic Spin Transistor Hybrid Circuit Element,” (Ser. No. 08/493,815, issued Oct. 15, 1996 as U.S. Pat. No. 5,565,695);
[0004] (3) an application titled “Magnetic Spin Injected Field Effect Transistor and Method of Operation,” (Ser. No. 08/643,804 filed May 6, 1996);
[0005] (4) an application titled “Hybrid Hall Effect Device and Method of Operation,” (Ser. No. 08/643,805, filed May 6, 1996)
[0006] The above materials are expressly incorporated by reference herein.
Divisions (1)
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Number |
Date |
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Parent |
08806028 |
Feb 1997 |
US |
Child |
09532076 |
Mar 2000 |
US |
Continuations (1)
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Date |
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Parent |
09532076 |
Mar 2000 |
US |
Child |
08643805 |
May 1996 |
US |
Continuation in Parts (4)
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Number |
Date |
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Parent |
08425884 |
Apr 1995 |
US |
Child |
10100210 |
Mar 2002 |
US |
Parent |
08493815 |
Jun 1995 |
US |
Child |
10100210 |
Mar 2002 |
US |
Parent |
08643804 |
May 1996 |
US |
Child |
10100210 |
Mar 2002 |
US |
Parent |
08643805 |
May 1996 |
US |
Child |
10100210 |
Mar 2002 |
US |