Claims
- 1. In a printed circuit board having a plurality of first integrated circuit chip sockets mounted on sets of socket terminals on said printed circuit board, and printed circuit wiring electrically connected to said socket terminals, respectively, in a predetermined pattern, the improvement comprising,
- at least one redundant socket terminals therefor on said printed circuit board,
- printed circuit wiring means connecting said set of redundant socket terminals in parallel to one set of said sets of socket terminals so that in the event the integrated circuit chip for which said one of said first integrated circuit chip was designed is unavailable, a functionally equivalent integrated circuit chip can be received in said redundant integrated chip socket.
- 2. A method of avoiding production delay in the manufacture of electronic circuit boards due to unavailability of specified integrated circuit chip components for which the electronic circuit board was designed, comprising,
- constructing the circuit board with redundant printed circuit paths relative to integrated circuit chip sockets on said circuit board for receiving said specified integrated circuit chip components,
- providing connection points for discrete external components to be connected to said redundant printed circuit paths, in the event of unavailability of said specified components.
- 3. The invention defined in claim 2 wherein said redundant circuit paths include banks or plurality of closely spaced jumper terminal pairs and inserting jumper conductors between selected ones of pairs of said jumper terminals to electronically configure said circuit paths for an available chip component.
REFERENCE TO RELATED APPLICATIONS
This application is a continuation-in-part of my application Serial No. 742,448, filed June 7, 1985 for "Method and Apparatus for Facilitating Production of Electronic Circuit Boards" now abandonded.
US Referenced Citations (10)
Foreign Referenced Citations (6)
Number |
Date |
Country |
0070533 |
Jan 1983 |
EPX |
3209699 |
Sep 1983 |
DEX |
57-71166 |
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JPX |
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Non-Patent Literature Citations (1)
Entry |
Bond, G. L., "Dual-Redundant Logic System", IBM Technical Discl., vol. 15, No. 4, Sep. 1972, pp. 1145-1146. |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
742448 |
Jun 1985 |
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