Number | Name | Date | Kind |
---|---|---|---|
4938839 | Fujimura et al. | Jul 1990 | A |
5476719 | Sandell et al. | Dec 1995 | A |
5717251 | Hayashi et al. | Feb 1998 | A |
5739579 | Chiang et al. | Apr 1998 | A |
5854126 | Tobben et al. | Dec 1998 | A |
5962865 | Kerber et al. | Oct 1999 | A |
6011274 | Gu et al. | Jan 2000 | A |
6087251 | Hsu | Feb 2000 | A |
6184121 | Buchwalter et al. | Feb 2000 | B1 |
6071809 | Zhao | Jun 2000 | A |
6143646 | Wetzel | Nov 2000 | A |
20010013908 | Gu et al. | Aug 2001 | A1 |
Entry |
---|
Marathe et al. “Planarization techniques for multilevel HTS integrated circuit process” IEEE Trans. on Applied Superconductivity vol. 3 Mar. 1993 p. 2373-76.* |
G. L. Kerber, et al., “An Improved NbN Integrated Circuit Process Featuring Thick NbN Ground Plane and Lower Parasitic Circuit Inductances,” IEEE Transactions on Applied Superconductivity, vol. 7, No. 2, Jun. 1997, pp. 2638-2643. |