1. Field of the Invention
The present invention relates to a method for forming a semiconductor structure, and more particularly, to a method for forming a semiconductor structure having a MOS with a TiN layer as the barrier layer.
2. Description of the Prior Art
In modern society, the micro-processor systems comprising integrated circuits (IC) are ubiquitous devices, which are utilized in diverse fields such as automatic control electronics, mobile communication devices and personal computers. With the development of technologies and the increasingly imaginative applications of the electrical products, the IC devices become smaller, more delicate and more diversified.
Metal-oxide-semiconductors (MOS) transistors are usually used in the integrated circuits. Conventionally, a poly-silicon layer is used as the gate material of the MOS. However, with a trend toward scaling down the size of semiconductor devices, conventional poly-silicon gates face problems such as inferior performances due to boron penetration and unavoidable depletion effect, which increases the equivalent thickness of the gate dielectric layer, reduces the gate capacitance, and worsens a driving force of the devices. Therefore, metals with a work function that are suitable for use as the high-k gate dielectric layer, are used to replace the conventional poly-silicon gates to serve as the control electrode.
However, some issues still need to be overcome in the current metal gate MOS fabrication method.
It is one objective of the present invention to form a semiconductor structure such as a metal gate MOS, wherein the elements in the metal gate MOS are free from whisker defects.
According to one embodiment of the present invention, the method for forming a semiconductor structure primarily comprises providing a substrate. Then, a TiN layer is formed on the substrate at a rate between 0.3 to 0.8 angstrom/second. Lastly, a poly-silicon layer is formed directly on the TiN layer.
Since the TiN in the barrier layer is formed at a low rate to obtain a good quality, the problems, such as whisker defects in the TiN layer or the defects on the above layer, like a gate dummy layer or gate cap layer, can be avoided.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
To provide a better understanding of the presented invention, preferred embodiments will be described in detail. The preferred embodiments of the present invention are illustrated in the accompanying drawings with numbered elements.
Please refer to
As shown in
As shown in
As shown in
Subsequently, as shown in
As shown in
As shown in
As shown in
It is one salient feature of the present invention that the gate barrier layer 306 is a thin layer in order not to greatly influence the work function tuning capability of the metal gate 326. For example, the gate barrier layer 306 is between 10 and 30 angstroms, preferably 20 angstroms, which is relatively thin compared to other layers. Thus, the quality of the gate barrier layer 306 is important. The present invention therefore proposes forming the gate barrier layer 306 at a lower rate to generate a compact and smooth gate barrier layer 306. It can not only avoid the formation of the defects of the gate dummy layer 308 and all the above layers, but also provide good conductivity for the metal gate 326.
In summary, the present invention provides a method for forming a semiconductor structure having a TiN layer and a poly-silicon layer. The TiN in the barrier layer 305 is formed at a low rate so as to obtain a good quality. By doing this, the defects in the TiN layer or the defects on the above layer such as a gate dummy layer or a gate cap layer can be avoided. It is noted that the method of forming the semiconductor structure is not only applied to the above-mentioned embodiment that forms the transistor with a metal gate, but also can be applied to other semiconductor structures that have an interface between a TiN layer and a poly-silicon layer. By the method set forth in the present invention, the semiconductor structure can show good performances.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Number | Name | Date | Kind |
---|---|---|---|
5892282 | Hong | Apr 1999 | A |
6033963 | Huang | Mar 2000 | A |
6066533 | Yu | May 2000 | A |
6096659 | Gardner | Aug 2000 | A |
6177303 | Schmitz | Jan 2001 | B1 |
6271592 | Kim | Aug 2001 | B1 |
6303418 | Cha | Oct 2001 | B1 |
6458684 | Guo | Oct 2002 | B1 |
6492217 | Bai | Dec 2002 | B1 |
6552377 | Yu | Apr 2003 | B1 |
6573134 | Ma | Jun 2003 | B2 |
6653698 | Lee et al. | Nov 2003 | B2 |
6696345 | Chau | Feb 2004 | B2 |
6790719 | Adetutu | Sep 2004 | B1 |
6794234 | Polishchuk | Sep 2004 | B2 |
6858483 | Doczy | Feb 2005 | B2 |
6902969 | Adetutu | Jun 2005 | B2 |
6921711 | Cabral, Jr. | Jul 2005 | B2 |
6953719 | Doczy | Oct 2005 | B2 |
6960416 | Mui | Nov 2005 | B2 |
6967131 | Saenger | Nov 2005 | B2 |
6972225 | Doczy | Dec 2005 | B2 |
7029966 | Amos | Apr 2006 | B2 |
7030430 | Doczy | Apr 2006 | B2 |
7056794 | Ku | Jun 2006 | B2 |
7064050 | Cabral, Jr. | Jun 2006 | B2 |
7064066 | Metz | Jun 2006 | B1 |
7074664 | White | Jul 2006 | B1 |
7074680 | Doczy | Jul 2006 | B2 |
7109079 | Schaeffer, III | Sep 2006 | B2 |
7112851 | Saenger | Sep 2006 | B2 |
7126199 | Doczy | Oct 2006 | B2 |
7144783 | Datta | Dec 2006 | B2 |
7148548 | Doczy | Dec 2006 | B2 |
7153734 | Brask | Dec 2006 | B2 |
7153784 | Brask | Dec 2006 | B2 |
7157378 | Brask | Jan 2007 | B2 |
7176090 | Brask | Feb 2007 | B2 |
7183184 | Doczy | Feb 2007 | B2 |
7186605 | Cheng | Mar 2007 | B2 |
7193893 | Forbes | Mar 2007 | B2 |
7208361 | Shah | Apr 2007 | B2 |
7208366 | Tsai | Apr 2007 | B2 |
7217611 | Kavalieros | May 2007 | B2 |
7220635 | Brask | May 2007 | B2 |
7316949 | Doczy | Jan 2008 | B2 |
7317231 | Metz | Jan 2008 | B2 |
7326610 | Amos | Feb 2008 | B2 |
7351663 | Kabansky et al. | Apr 2008 | B1 |
7355281 | Brask | Apr 2008 | B2 |
7381619 | Wang | Jun 2008 | B2 |
7390709 | Doczy | Jun 2008 | B2 |
7407876 | Ishizaka | Aug 2008 | B2 |
7488656 | Cartier | Feb 2009 | B2 |
7556998 | Park | Jul 2009 | B2 |
7700479 | Huang | Apr 2010 | B2 |
7785958 | Doczy | Aug 2010 | B2 |
20020048937 | Selsley | Apr 2002 | A1 |
20020127888 | Cho | Sep 2002 | A1 |
20050095763 | Samavedam | May 2005 | A1 |
20050202659 | Li | Sep 2005 | A1 |
20050275035 | Mathew | Dec 2005 | A1 |
20060024953 | Papa Rao | Feb 2006 | A1 |
20060040482 | Yang | Feb 2006 | A1 |
20060054943 | Li | Mar 2006 | A1 |
20070037335 | Chambers | Feb 2007 | A1 |
20070082445 | Yang | Apr 2007 | A1 |
20070138559 | Bohr | Jun 2007 | A1 |
20070145591 | Yano | Jun 2007 | A1 |
20070148838 | Doris | Jun 2007 | A1 |
20070210354 | Nabatame | Sep 2007 | A1 |
20070259519 | Yang | Nov 2007 | A1 |
20070262451 | Rachmady | Nov 2007 | A1 |
20070272123 | Kennedy | Nov 2007 | A1 |
20080076216 | Pae | Mar 2008 | A1 |
20080224235 | Lavoie | Sep 2008 | A1 |
20080318371 | Lin | Dec 2008 | A1 |
20090039433 | Yang | Feb 2009 | A1 |
20090057769 | Wei | Mar 2009 | A1 |
20090057787 | Matsuki | Mar 2009 | A1 |
20090166769 | Metz | Jul 2009 | A1 |
20090186458 | Yu | Jul 2009 | A1 |
20090273087 | French et al. | Nov 2009 | A1 |
20100044783 | Chuang | Feb 2010 | A1 |
20100052066 | Yu | Mar 2010 | A1 |
20100052074 | Lin | Mar 2010 | A1 |
20100065926 | Yeh | Mar 2010 | A1 |
20100068877 | Yeh | Mar 2010 | A1 |
20100081262 | Lim | Apr 2010 | A1 |
20100087055 | Lai | Apr 2010 | A1 |
20100124818 | Lee | May 2010 | A1 |
20100178772 | Lin et al. | Jul 2010 | A1 |
20100244141 | Beyer | Sep 2010 | A1 |
20110195549 | Chuang et al. | Aug 2011 | A1 |
20110254060 | Yang et al. | Oct 2011 | A1 |